blob: 8d3d4ad4bbb5b9d212578af008de28fe93094d0e [file] [log] [blame]
Banajit Goswamide8271c2017-01-18 00:28:59 -08001/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/of_gpio.h>
16#include <linux/of_irq.h>
17#include <linux/of_device.h>
18#include <linux/slab.h>
19#include <linux/regmap.h>
20#include <linux/delay.h>
21#include <linux/sched.h>
22#include <linux/mfd/core.h>
23#include <linux/mfd/wcd9xxx/pdata.h>
24#include <linux/mfd/wcd9xxx/core.h>
25#include <linux/mfd/wcd9xxx/wcd9xxx-irq.h>
26#include <linux/mfd/msm-cdc-supply.h>
27#include <linux/mfd/msm-cdc-pinctrl.h>
28#include <linux/mfd/wcd9xxx/wcd9xxx-utils.h>
29
30#define REG_BYTES 2
31#define VAL_BYTES 1
32/*
33 * Page Register Address that APP Proc uses to
34 * access WCD9335 Codec registers is identified
35 * as 0x00
36 */
37#define PAGE_REG_ADDR 0x00
38
39static enum wcd9xxx_intf_status wcd9xxx_intf = -1;
40
41static struct mfd_cell tavil_devs[] = {
42 {
43 .name = "qcom-wcd-pinctrl",
44 .of_compatible = "qcom,wcd-pinctrl",
45 },
46 {
47 .name = "tavil_codec",
48 },
49};
50
51static struct mfd_cell tasha_devs[] = {
52 {
53 .name = "tasha_codec",
54 },
55};
56
57static struct mfd_cell tomtom_devs[] = {
58 {
59 .name = "tomtom_codec",
60 },
61};
62
63static int wcd9xxx_read_of_property_u32(struct device *dev, const char *name,
64 u32 *val)
65{
66 int rc = 0;
67
68 rc = of_property_read_u32(dev->of_node, name, val);
69 if (rc)
70 dev_err(dev, "%s: Looking up %s property in node %s failed",
71 __func__, name, dev->of_node->full_name);
72
73 return rc;
74}
75
76static void wcd9xxx_dt_parse_micbias_info(struct device *dev,
77 struct wcd9xxx_micbias_setting *mb)
78{
79 u32 prop_val;
80 int rc;
81
82 if (of_find_property(dev->of_node, "qcom,cdc-micbias-ldoh-v", NULL)) {
83 rc = wcd9xxx_read_of_property_u32(dev,
84 "qcom,cdc-micbias-ldoh-v",
85 &prop_val);
86 if (!rc)
87 mb->ldoh_v = (u8)prop_val;
88 }
89
90 /* MB1 */
91 if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt1-mv",
92 NULL)) {
93 rc = wcd9xxx_read_of_property_u32(dev,
94 "qcom,cdc-micbias-cfilt1-mv",
95 &prop_val);
96 if (!rc)
97 mb->cfilt1_mv = prop_val;
98
99 rc = wcd9xxx_read_of_property_u32(dev,
100 "qcom,cdc-micbias1-cfilt-sel",
101 &prop_val);
102 if (!rc)
103 mb->bias1_cfilt_sel = (u8)prop_val;
104
105 } else if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
106 NULL)) {
107 rc = wcd9xxx_read_of_property_u32(dev,
108 "qcom,cdc-micbias1-mv",
109 &prop_val);
110 if (!rc)
111 mb->micb1_mv = prop_val;
112 } else {
113 dev_info(dev, "%s: Micbias1 DT property not found\n",
114 __func__);
115 }
116
117 /* MB2 */
118 if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt2-mv",
119 NULL)) {
120 rc = wcd9xxx_read_of_property_u32(dev,
121 "qcom,cdc-micbias-cfilt2-mv",
122 &prop_val);
123 if (!rc)
124 mb->cfilt2_mv = prop_val;
125
126 rc = wcd9xxx_read_of_property_u32(dev,
127 "qcom,cdc-micbias2-cfilt-sel",
128 &prop_val);
129 if (!rc)
130 mb->bias2_cfilt_sel = (u8)prop_val;
131
132 } else if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
133 NULL)) {
134 rc = wcd9xxx_read_of_property_u32(dev,
135 "qcom,cdc-micbias2-mv",
136 &prop_val);
137 if (!rc)
138 mb->micb2_mv = prop_val;
139 } else {
140 dev_info(dev, "%s: Micbias2 DT property not found\n",
141 __func__);
142 }
143
144 /* MB3 */
145 if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt3-mv",
146 NULL)) {
147 rc = wcd9xxx_read_of_property_u32(dev,
148 "qcom,cdc-micbias-cfilt3-mv",
149 &prop_val);
150 if (!rc)
151 mb->cfilt3_mv = prop_val;
152
153 rc = wcd9xxx_read_of_property_u32(dev,
154 "qcom,cdc-micbias3-cfilt-sel",
155 &prop_val);
156 if (!rc)
157 mb->bias3_cfilt_sel = (u8)prop_val;
158
159 } else if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
160 NULL)) {
161 rc = wcd9xxx_read_of_property_u32(dev,
162 "qcom,cdc-micbias3-mv",
163 &prop_val);
164 if (!rc)
165 mb->micb3_mv = prop_val;
166 } else {
167 dev_info(dev, "%s: Micbias3 DT property not found\n",
168 __func__);
169 }
170
171 /* MB4 */
172 if (of_find_property(dev->of_node, "qcom,cdc-micbias4-cfilt-sel",
173 NULL)) {
174 rc = wcd9xxx_read_of_property_u32(dev,
175 "qcom,cdc-micbias4-cfilt-sel",
176 &prop_val);
177 if (!rc)
178 mb->bias4_cfilt_sel = (u8)prop_val;
179
180 } else if (of_find_property(dev->of_node, "qcom,cdc-micbias4-mv",
181 NULL)) {
182 rc = wcd9xxx_read_of_property_u32(dev,
183 "qcom,cdc-micbias4-mv",
184 &prop_val);
185 if (!rc)
186 mb->micb4_mv = prop_val;
187 } else {
188 dev_info(dev, "%s: Micbias4 DT property not found\n",
189 __func__);
190 }
191
192 mb->bias1_cap_mode =
193 (of_property_read_bool(dev->of_node, "qcom,cdc-micbias1-ext-cap") ?
194 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
195 mb->bias2_cap_mode =
196 (of_property_read_bool(dev->of_node, "qcom,cdc-micbias2-ext-cap") ?
197 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
198 mb->bias3_cap_mode =
199 (of_property_read_bool(dev->of_node, "qcom,cdc-micbias3-ext-cap") ?
200 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
201 mb->bias4_cap_mode =
202 (of_property_read_bool(dev->of_node, "qcom,cdc-micbias4-ext-cap") ?
203 MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
204
205 mb->bias2_is_headset_only =
206 of_property_read_bool(dev->of_node,
207 "qcom,cdc-micbias2-headset-only");
208
209 /* Print micbias info */
210 dev_dbg(dev, "%s: ldoh_v %u cfilt1_mv %u cfilt2_mv %u cfilt3_mv %u",
211 __func__, (u32)mb->ldoh_v, (u32)mb->cfilt1_mv,
212 (u32)mb->cfilt2_mv, (u32)mb->cfilt3_mv);
213
214 dev_dbg(dev, "%s: micb1_mv %u micb2_mv %u micb3_mv %u micb4_mv %u",
215 __func__, mb->micb1_mv, mb->micb2_mv,
216 mb->micb3_mv, mb->micb4_mv);
217
218 dev_dbg(dev, "%s: bias1_cfilt_sel %u bias2_cfilt_sel %u\n",
219 __func__, (u32)mb->bias1_cfilt_sel, (u32)mb->bias2_cfilt_sel);
220
221 dev_dbg(dev, "%s: bias3_cfilt_sel %u bias4_cfilt_sel %u\n",
222 __func__, (u32)mb->bias3_cfilt_sel, (u32)mb->bias4_cfilt_sel);
223
224 dev_dbg(dev, "%s: bias1_ext_cap %d bias2_ext_cap %d\n",
225 __func__, mb->bias1_cap_mode, mb->bias2_cap_mode);
226
227 dev_dbg(dev, "%s: bias3_ext_cap %d bias4_ext_cap %d\n",
228 __func__, mb->bias3_cap_mode, mb->bias4_cap_mode);
229
230 dev_dbg(dev, "%s: bias2_is_headset_only %d\n",
231 __func__, mb->bias2_is_headset_only);
232}
233
234/*
235 * wcd9xxx_validate_dmic_sample_rate:
236 * Given the dmic_sample_rate and mclk rate, validate the
237 * dmic_sample_rate. If dmic rate is found to be invalid,
238 * assign the dmic rate as undefined, so individual codec
239 * drivers can use their own defaults
240 * @dev: the device for which the dmic is to be configured
241 * @dmic_sample_rate: The input dmic_sample_rate
242 * @mclk_rate: The input codec mclk rate
243 * @dmic_rate_type: String to indicate the type of dmic sample
244 * rate, used for debug/error logging.
245 */
246static u32 wcd9xxx_validate_dmic_sample_rate(struct device *dev,
247 u32 dmic_sample_rate, u32 mclk_rate,
248 const char *dmic_rate_type)
249{
250 u32 div_factor;
251
252 if (dmic_sample_rate == WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED ||
253 mclk_rate % dmic_sample_rate != 0)
254 goto undefined_rate;
255
256 div_factor = mclk_rate / dmic_sample_rate;
257
258 switch (div_factor) {
259 case 2:
260 case 3:
261 case 4:
262 case 8:
263 case 16:
264 /* Valid dmic DIV factors */
265 dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
266 __func__, div_factor, mclk_rate);
267 break;
268 case 6:
269 /*
270 * DIV 6 is valid for both 9.6MHz and 12.288MHz
271 * MCLK on Tavil. Older codecs support DIV6 only
272 * for 12.288MHz MCLK.
273 */
274 if ((mclk_rate == WCD9XXX_MCLK_CLK_9P6HZ) &&
275 (of_device_is_compatible(dev->of_node,
276 "qcom,tavil-slim-pgd")))
277 dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
278 __func__, div_factor, mclk_rate);
279 else if (mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ)
280 goto undefined_rate;
281 break;
282 default:
283 /* Any other DIV factor is invalid */
284 goto undefined_rate;
285 }
286
287 return dmic_sample_rate;
288
289undefined_rate:
Karthikeyan Mani4b292df2016-11-15 11:09:20 -0800290 dev_dbg(dev, "%s: Invalid %s = %d, for mclk %d\n",
Banajit Goswamide8271c2017-01-18 00:28:59 -0800291 __func__, dmic_rate_type, dmic_sample_rate, mclk_rate);
292 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
293
294 return dmic_sample_rate;
295}
296
297/*
298 * wcd9xxx_populate_dt_data:
299 * Parse device tree properties for the given codec device
300 *
301 * @dev: pointer to codec device
302 *
303 * Returns pointer to the platform data resulting from parsing
304 * device tree.
305 */
306struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
307{
308 struct wcd9xxx_pdata *pdata;
309 u32 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
310 u32 mad_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
311 u32 ecpp_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
312 u32 dmic_clk_drive = WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED;
313 u32 prop_val;
314 int rc = 0;
315
316 if (!dev || !dev->of_node)
317 return NULL;
318
319 pdata = devm_kzalloc(dev, sizeof(struct wcd9xxx_pdata),
320 GFP_KERNEL);
321 if (!pdata)
322 return NULL;
323
324 /* Parse power supplies */
325 msm_cdc_get_power_supplies(dev, &pdata->regulator,
326 &pdata->num_supplies);
327 if (!pdata->regulator || (pdata->num_supplies <= 0)) {
328 dev_err(dev, "%s: no power supplies defined for codec\n",
329 __func__);
330 goto err_power_sup;
331 }
332
333 /* Parse micbias info */
334 wcd9xxx_dt_parse_micbias_info(dev, &pdata->micbias);
335
336 pdata->wcd_rst_np = of_parse_phandle(dev->of_node,
337 "qcom,wcd-rst-gpio-node", 0);
338 if (!pdata->wcd_rst_np) {
339 dev_err(dev, "%s: Looking up %s property in node %s failed\n",
340 __func__, "qcom,wcd-rst-gpio-node",
341 dev->of_node->full_name);
342 goto err_parse_dt_prop;
343 }
344
345 if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mclk-clk-rate",
346 &prop_val)))
347 pdata->mclk_rate = prop_val;
348
349 if (pdata->mclk_rate != WCD9XXX_MCLK_CLK_9P6HZ &&
350 pdata->mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ) {
351 dev_err(dev, "%s: Invalid mclk_rate = %u\n", __func__,
352 pdata->mclk_rate);
353 goto err_parse_dt_prop;
354 }
355
356 if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-dmic-sample-rate",
357 &prop_val)))
358 dmic_sample_rate = prop_val;
359
360 pdata->dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
361 dmic_sample_rate,
362 pdata->mclk_rate,
363 "audio_dmic_rate");
364 if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mad-dmic-rate",
365 &prop_val)))
366 mad_dmic_sample_rate = prop_val;
367
368 pdata->mad_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
369 mad_dmic_sample_rate,
370 pdata->mclk_rate,
371 "mad_dmic_rate");
372
373 if (of_find_property(dev->of_node, "qcom,cdc-ecpp-dmic-rate", NULL)) {
374 rc = wcd9xxx_read_of_property_u32(dev,
375 "qcom,cdc-ecpp-dmic-rate",
376 &prop_val);
377 if (!rc)
378 ecpp_dmic_sample_rate = prop_val;
379 }
380
381 pdata->ecpp_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
382 ecpp_dmic_sample_rate,
383 pdata->mclk_rate,
384 "ecpp_dmic_rate");
385
386 if (!(of_property_read_u32(dev->of_node,
387 "qcom,cdc-dmic-clk-drv-strength",
388 &prop_val))) {
389 dmic_clk_drive = prop_val;
390
391 if (dmic_clk_drive != 2 && dmic_clk_drive != 4 &&
392 dmic_clk_drive != 8 && dmic_clk_drive != 16)
393 dev_err(dev, "Invalid cdc-dmic-clk-drv-strength %d\n",
394 dmic_clk_drive);
395 }
396
397 pdata->dmic_clk_drv = dmic_clk_drive;
398
399 return pdata;
400
401err_parse_dt_prop:
402 devm_kfree(dev, pdata->regulator);
403 pdata->regulator = NULL;
404 pdata->num_supplies = 0;
405err_power_sup:
406 devm_kfree(dev, pdata);
407 return NULL;
408}
409EXPORT_SYMBOL(wcd9xxx_populate_dt_data);
410
411static bool is_wcd9xxx_reg_power_down(struct wcd9xxx *wcd9xxx, u16 rreg)
412{
413 bool ret = false;
414 int i;
415 struct wcd9xxx_power_region *wcd9xxx_pwr;
416
417 if (!wcd9xxx)
418 return ret;
419
420 for (i = 0; i < WCD9XXX_MAX_PWR_REGIONS; i++) {
421 wcd9xxx_pwr = wcd9xxx->wcd9xxx_pwr[i];
422 if (!wcd9xxx_pwr)
423 continue;
424 if (((wcd9xxx_pwr->pwr_collapse_reg_min == 0) &&
425 (wcd9xxx_pwr->pwr_collapse_reg_max == 0)) ||
426 (wcd9xxx_pwr->power_state ==
427 WCD_REGION_POWER_COLLAPSE_REMOVE))
428 ret = false;
429 else if (((wcd9xxx_pwr->power_state ==
430 WCD_REGION_POWER_DOWN) ||
431 (wcd9xxx_pwr->power_state ==
432 WCD_REGION_POWER_COLLAPSE_BEGIN)) &&
433 (rreg >= wcd9xxx_pwr->pwr_collapse_reg_min) &&
434 (rreg <= wcd9xxx_pwr->pwr_collapse_reg_max))
435 ret = true;
436 }
437 return ret;
438}
439
440/*
441 * wcd9xxx_page_write:
442 * Retrieve page number from register and
443 * write that page number to the page address.
444 * Called under io_lock acquisition.
445 *
446 * @wcd9xxx: pointer to wcd9xxx
447 * @reg: Register address from which page number is retrieved
448 *
449 * Returns 0 for success and negative error code for failure.
450 */
451int wcd9xxx_page_write(struct wcd9xxx *wcd9xxx, unsigned short *reg)
452{
453 int ret = 0;
454 unsigned short c_reg, reg_addr;
455 u8 pg_num, prev_pg_num;
456
457 if (wcd9xxx->type != WCD9335 && wcd9xxx->type != WCD934X)
458 return ret;
459
460 c_reg = *reg;
461 pg_num = c_reg >> 8;
462 reg_addr = c_reg & 0xff;
463 if (wcd9xxx->prev_pg_valid) {
464 prev_pg_num = wcd9xxx->prev_pg;
465 if (prev_pg_num != pg_num) {
466 ret = wcd9xxx->write_dev(
467 wcd9xxx, PAGE_REG_ADDR, 1,
468 (void *) &pg_num, false);
469 if (ret < 0)
470 pr_err("page write error, pg_num: 0x%x\n",
471 pg_num);
472 else {
473 wcd9xxx->prev_pg = pg_num;
474 dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
475 __func__, pg_num);
476 }
477 }
478 } else {
479 ret = wcd9xxx->write_dev(
480 wcd9xxx, PAGE_REG_ADDR, 1, (void *) &pg_num,
481 false);
482 if (ret < 0)
483 pr_err("page write error, pg_num: 0x%x\n", pg_num);
484 else {
485 wcd9xxx->prev_pg = pg_num;
486 wcd9xxx->prev_pg_valid = true;
487 dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
488 __func__, pg_num);
489 }
490 }
491 *reg = reg_addr;
492 return ret;
493}
494EXPORT_SYMBOL(wcd9xxx_page_write);
495
496static int regmap_bus_read(void *context, const void *reg, size_t reg_size,
497 void *val, size_t val_size)
498{
499 struct device *dev = context;
500 struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
501 unsigned short c_reg, rreg;
502 int ret, i;
503
504 if (!wcd9xxx) {
505 dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
506 return -EINVAL;
507 }
508 if (!reg || !val) {
509 dev_err(dev, "%s: reg or val is NULL\n", __func__);
510 return -EINVAL;
511 }
512
513 if (reg_size != REG_BYTES) {
514 dev_err(dev, "%s: register size %zd bytes, not supported\n",
515 __func__, reg_size);
516 return -EINVAL;
517 }
518
519 mutex_lock(&wcd9xxx->io_lock);
520 c_reg = *(u16 *)reg;
521 rreg = c_reg;
522
523 if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
524 ret = 0;
525 for (i = 0; i < val_size; i++)
526 ((u8 *)val)[i] = 0;
527 goto err;
528 }
529 ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
530 if (ret)
531 goto err;
532 ret = wcd9xxx->read_dev(wcd9xxx, c_reg, val_size, val, false);
533 if (ret < 0)
534 dev_err(dev, "%s: Codec read failed (%d), reg: 0x%x, size:%zd\n",
535 __func__, ret, rreg, val_size);
536 else {
537 for (i = 0; i < val_size; i++)
538 dev_dbg(dev, "%s: Read 0x%02x from 0x%x\n",
539 __func__, ((u8 *)val)[i], rreg + i);
540 }
541err:
542 mutex_unlock(&wcd9xxx->io_lock);
543
544 return ret;
545}
546
547static int regmap_bus_gather_write(void *context,
548 const void *reg, size_t reg_size,
549 const void *val, size_t val_size)
550{
551 struct device *dev = context;
552 struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
553 unsigned short c_reg, rreg;
554 int ret, i;
555
556 if (!wcd9xxx) {
557 dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
558 return -EINVAL;
559 }
560 if (!reg || !val) {
561 dev_err(dev, "%s: reg or val is NULL\n", __func__);
562 return -EINVAL;
563 }
564 if (reg_size != REG_BYTES) {
565 dev_err(dev, "%s: register size %zd bytes, not supported\n",
566 __func__, reg_size);
567 return -EINVAL;
568 }
569 mutex_lock(&wcd9xxx->io_lock);
570 c_reg = *(u16 *)reg;
571 rreg = c_reg;
572
573 if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
574 ret = 0;
575 goto err;
576 }
577 ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
578 if (ret)
579 goto err;
580
581 for (i = 0; i < val_size; i++)
582 dev_dbg(dev, "Write %02x to 0x%x\n", ((u8 *)val)[i],
583 rreg + i);
584
585 ret = wcd9xxx->write_dev(wcd9xxx, c_reg, val_size, (void *) val,
586 false);
587 if (ret < 0)
588 dev_err(dev, "%s: Codec write failed (%d), reg:0x%x, size:%zd\n",
589 __func__, ret, rreg, val_size);
590
591err:
592 mutex_unlock(&wcd9xxx->io_lock);
593 return ret;
594}
595
596static int regmap_bus_write(void *context, const void *data, size_t count)
597{
598 struct device *dev = context;
599 struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
600
601 if (!wcd9xxx)
602 return -EINVAL;
603
604 WARN_ON(count < REG_BYTES);
605
606 if (count > (REG_BYTES + VAL_BYTES)) {
607 if (wcd9xxx->multi_reg_write)
608 return wcd9xxx->multi_reg_write(wcd9xxx,
609 data, count);
610 } else
611 return regmap_bus_gather_write(context, data, REG_BYTES,
612 data + REG_BYTES,
613 count - REG_BYTES);
614
615 dev_err(dev, "%s: bus multi reg write failure\n", __func__);
616
617 return -EINVAL;
618}
619
620static struct regmap_bus regmap_bus_config = {
621 .write = regmap_bus_write,
622 .gather_write = regmap_bus_gather_write,
623 .read = regmap_bus_read,
624 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
625 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
626};
627
628/*
629 * wcd9xxx_regmap_init:
630 * Initialize wcd9xxx register map
631 *
632 * @dev: pointer to wcd device
633 * @config: pointer to register map config
634 *
635 * Returns pointer to regmap structure for success
636 * or NULL in case of failure.
637 */
638struct regmap *wcd9xxx_regmap_init(struct device *dev,
639 const struct regmap_config *config)
640{
641 return devm_regmap_init(dev, &regmap_bus_config, dev, config);
642}
643EXPORT_SYMBOL(wcd9xxx_regmap_init);
644
645/*
646 * wcd9xxx_reset:
647 * Reset wcd9xxx codec
648 *
649 * @dev: pointer to wcd device
650 *
651 * Returns 0 for success or negative error code in case of failure
652 */
653int wcd9xxx_reset(struct device *dev)
654{
655 struct wcd9xxx *wcd9xxx;
656 int rc;
657 int value;
658
659 if (!dev)
660 return -ENODEV;
661
662 wcd9xxx = dev_get_drvdata(dev);
663 if (!wcd9xxx)
664 return -EINVAL;
665
666 if (!wcd9xxx->wcd_rst_np) {
667 dev_err(dev, "%s: reset gpio device node not specified\n",
668 __func__);
669 return -EINVAL;
670 }
671
Walter Yang51cc41b2017-01-19 20:35:42 +0800672 value = msm_cdc_pinctrl_get_state(wcd9xxx->wcd_rst_np);
Banajit Goswamide8271c2017-01-18 00:28:59 -0800673 if (value > 0) {
674 wcd9xxx->avoid_cdc_rstlow = 1;
675 return 0;
676 }
677
678 rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
679 if (rc) {
680 dev_err(dev, "%s: wcd sleep state request fail!\n",
681 __func__);
682 return rc;
683 }
684
685 /* 20ms sleep required after pulling the reset gpio to LOW */
686 msleep(20);
687
688 rc = msm_cdc_pinctrl_select_active_state(wcd9xxx->wcd_rst_np);
689 if (rc) {
690 dev_err(dev, "%s: wcd active state request fail!\n",
691 __func__);
692 return rc;
693 }
694 msleep(20);
695
696 return rc;
697}
698EXPORT_SYMBOL(wcd9xxx_reset);
699
700/*
701 * wcd9xxx_reset_low:
702 * Pull the wcd9xxx codec reset_n to low
703 *
704 * @dev: pointer to wcd device
705 *
706 * Returns 0 for success or negative error code in case of failure
707 */
708int wcd9xxx_reset_low(struct device *dev)
709{
710 struct wcd9xxx *wcd9xxx;
711 int rc;
712
713 if (!dev)
714 return -ENODEV;
715
716 wcd9xxx = dev_get_drvdata(dev);
717 if (!wcd9xxx)
718 return -EINVAL;
719
720 if (!wcd9xxx->wcd_rst_np) {
721 dev_err(dev, "%s: reset gpio device node not specified\n",
722 __func__);
723 return -EINVAL;
724 }
725 if (wcd9xxx->avoid_cdc_rstlow) {
726 wcd9xxx->avoid_cdc_rstlow = 0;
727 dev_dbg(dev, "%s: avoid pull down of reset GPIO\n", __func__);
728 return 0;
729 }
730
731 rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
732 if (rc)
733 dev_err(dev, "%s: wcd sleep state request fail!\n",
734 __func__);
735
736 return rc;
737}
738EXPORT_SYMBOL(wcd9xxx_reset_low);
739
740/*
741 * wcd9xxx_bringup:
742 * Toggle reset analog and digital cores of wcd9xxx codec
743 *
744 * @dev: pointer to wcd device
745 *
746 * Returns 0 for success or negative error code in case of failure
747 */
748int wcd9xxx_bringup(struct device *dev)
749{
750 struct wcd9xxx *wcd9xxx;
751 int rc;
752 codec_bringup_fn cdc_bup_fn;
753
754 if (!dev)
755 return -ENODEV;
756
757 wcd9xxx = dev_get_drvdata(dev);
758 if (!wcd9xxx)
759 return -EINVAL;
760
761 cdc_bup_fn = wcd9xxx_bringup_fn(wcd9xxx->type);
762 if (!cdc_bup_fn) {
763 dev_err(dev, "%s: Codec bringup fn NULL!\n",
764 __func__);
765 return -EINVAL;
766 }
767 rc = cdc_bup_fn(wcd9xxx);
768 if (rc)
769 dev_err(dev, "%s: Codec bringup error, rc: %d\n",
770 __func__, rc);
771
772 return rc;
773}
774EXPORT_SYMBOL(wcd9xxx_bringup);
775
776/*
777 * wcd9xxx_bringup:
778 * Set analog and digital cores of wcd9xxx codec in reset state
779 *
780 * @dev: pointer to wcd device
781 *
782 * Returns 0 for success or negative error code in case of failure
783 */
784int wcd9xxx_bringdown(struct device *dev)
785{
786 struct wcd9xxx *wcd9xxx;
787 int rc;
788 codec_bringdown_fn cdc_bdown_fn;
789
790 if (!dev)
791 return -ENODEV;
792
793 wcd9xxx = dev_get_drvdata(dev);
794 if (!wcd9xxx)
795 return -EINVAL;
796
797 cdc_bdown_fn = wcd9xxx_bringdown_fn(wcd9xxx->type);
798 if (!cdc_bdown_fn) {
799 dev_err(dev, "%s: Codec bring down fn NULL!\n",
800 __func__);
801 return -EINVAL;
802 }
803 rc = cdc_bdown_fn(wcd9xxx);
804 if (rc)
805 dev_err(dev, "%s: Codec bring down error, rc: %d\n",
806 __func__, rc);
807
808 return rc;
809}
810EXPORT_SYMBOL(wcd9xxx_bringdown);
811
812/*
813 * wcd9xxx_get_codec_info:
814 * Fill codec specific information like interrupts, version
815 *
816 * @dev: pointer to wcd device
817 *
818 * Returns 0 for success or negative error code in case of failure
819 */
820int wcd9xxx_get_codec_info(struct device *dev)
821{
822 struct wcd9xxx *wcd9xxx;
823 int rc;
824 codec_type_fn cdc_type_fn;
825 struct wcd9xxx_codec_type *cinfo;
826
827 if (!dev)
828 return -ENODEV;
829
830 wcd9xxx = dev_get_drvdata(dev);
831 if (!wcd9xxx)
832 return -EINVAL;
833
834 cdc_type_fn = wcd9xxx_get_codec_info_fn(wcd9xxx->type);
835 if (!cdc_type_fn) {
836 dev_err(dev, "%s: Codec fill type fn NULL!\n",
837 __func__);
838 return -EINVAL;
839 }
840
841 cinfo = wcd9xxx->codec_type;
842 if (!cinfo)
843 return -EINVAL;
844
845 rc = cdc_type_fn(wcd9xxx, cinfo);
846 if (rc) {
847 dev_err(dev, "%s: Codec type fill failed, rc:%d\n",
848 __func__, rc);
849 return rc;
850
851 }
852
853 switch (wcd9xxx->type) {
854 case WCD934X:
855 cinfo->dev = tavil_devs;
856 cinfo->size = ARRAY_SIZE(tavil_devs);
857 break;
858 case WCD9335:
859 cinfo->dev = tasha_devs;
860 cinfo->size = ARRAY_SIZE(tasha_devs);
861 break;
862 case WCD9330:
863 cinfo->dev = tomtom_devs;
864 cinfo->size = ARRAY_SIZE(tomtom_devs);
865 break;
866 default:
867 cinfo->dev = NULL;
868 cinfo->size = 0;
869 break;
870 }
871
872 return rc;
873}
874EXPORT_SYMBOL(wcd9xxx_get_codec_info);
875
876/*
877 * wcd9xxx_core_irq_init:
878 * Initialize wcd9xxx codec irq instance
879 *
880 * @wcd9xxx_core_res: pointer to wcd core resource
881 *
882 * Returns 0 for success or negative error code in case of failure
883 */
884int wcd9xxx_core_irq_init(
885 struct wcd9xxx_core_resource *wcd9xxx_core_res)
886{
887 int ret = 0;
888
889 if (!wcd9xxx_core_res)
890 return -EINVAL;
891
892 if (wcd9xxx_core_res->irq != 1) {
893 ret = wcd9xxx_irq_init(wcd9xxx_core_res);
894 if (ret)
895 pr_err("IRQ initialization failed\n");
896 }
897
898 return ret;
899}
900EXPORT_SYMBOL(wcd9xxx_core_irq_init);
901
902/*
903 * wcd9xxx_assign_irq:
904 * Assign irq and irq_base to wcd9xxx core resource
905 *
906 * @wcd9xxx_core_res: pointer to wcd core resource
907 * @irq: irq number
908 * @irq_base: base irq number
909 *
910 * Returns 0 for success or negative error code in case of failure
911 */
912int wcd9xxx_assign_irq(
913 struct wcd9xxx_core_resource *wcd9xxx_core_res,
914 unsigned int irq,
915 unsigned int irq_base)
916{
917 if (!wcd9xxx_core_res)
918 return -EINVAL;
919
920 wcd9xxx_core_res->irq = irq;
921 wcd9xxx_core_res->irq_base = irq_base;
922
923 return 0;
924}
925EXPORT_SYMBOL(wcd9xxx_assign_irq);
926
927/*
928 * wcd9xxx_core_res_init:
929 * Initialize wcd core resource instance
930 *
931 * @wcd9xxx_core_res: pointer to wcd core resource
932 * @num_irqs: number of irqs for wcd9xxx core
933 * @num_irq_regs: number of irq registers
934 * @wcd_regmap: pointer to the wcd register map
935 *
936 * Returns 0 for success or negative error code in case of failure
937 */
938int wcd9xxx_core_res_init(
939 struct wcd9xxx_core_resource *wcd9xxx_core_res,
940 int num_irqs, int num_irq_regs, struct regmap *wcd_regmap)
941{
942 if (!wcd9xxx_core_res || !wcd_regmap)
943 return -EINVAL;
944
945 mutex_init(&wcd9xxx_core_res->pm_lock);
946 wcd9xxx_core_res->wlock_holders = 0;
947 wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
948 init_waitqueue_head(&wcd9xxx_core_res->pm_wq);
949 pm_qos_add_request(&wcd9xxx_core_res->pm_qos_req,
950 PM_QOS_CPU_DMA_LATENCY,
951 PM_QOS_DEFAULT_VALUE);
952
953 wcd9xxx_core_res->num_irqs = num_irqs;
954 wcd9xxx_core_res->num_irq_regs = num_irq_regs;
955 wcd9xxx_core_res->wcd_core_regmap = wcd_regmap;
956
957 pr_info("%s: num_irqs = %d, num_irq_regs = %d\n",
958 __func__, wcd9xxx_core_res->num_irqs,
959 wcd9xxx_core_res->num_irq_regs);
960
961 return 0;
962}
963EXPORT_SYMBOL(wcd9xxx_core_res_init);
964
965/*
966 * wcd9xxx_core_res_deinit:
967 * Deinit wcd core resource instance
968 *
969 * @wcd9xxx_core_res: pointer to wcd core resource
970 */
971void wcd9xxx_core_res_deinit(struct wcd9xxx_core_resource *wcd9xxx_core_res)
972{
973 if (!wcd9xxx_core_res)
974 return;
975
976 pm_qos_remove_request(&wcd9xxx_core_res->pm_qos_req);
977 mutex_destroy(&wcd9xxx_core_res->pm_lock);
978}
979EXPORT_SYMBOL(wcd9xxx_core_res_deinit);
980
981/*
982 * wcd9xxx_pm_cmpxchg:
983 * Check old state and exchange with pm new state
984 * if old state matches with current state
985 *
986 * @wcd9xxx_core_res: pointer to wcd core resource
987 * @o: pm old state
988 * @n: pm new state
989 *
990 * Returns old state
991 */
992enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(
993 struct wcd9xxx_core_resource *wcd9xxx_core_res,
994 enum wcd9xxx_pm_state o,
995 enum wcd9xxx_pm_state n)
996{
997 enum wcd9xxx_pm_state old;
998
999 if (!wcd9xxx_core_res)
1000 return o;
1001
1002 mutex_lock(&wcd9xxx_core_res->pm_lock);
1003 old = wcd9xxx_core_res->pm_state;
1004 if (old == o)
1005 wcd9xxx_core_res->pm_state = n;
1006 mutex_unlock(&wcd9xxx_core_res->pm_lock);
1007
1008 return old;
1009}
1010EXPORT_SYMBOL(wcd9xxx_pm_cmpxchg);
1011
1012/*
1013 * wcd9xxx_core_res_suspend:
1014 * Suspend callback function for wcd9xxx core
1015 *
1016 * @wcd9xxx_core_res: pointer to wcd core resource
1017 * @pm_message_t: pm message
1018 *
1019 * Returns 0 for success or negative error code for failure/busy
1020 */
1021int wcd9xxx_core_res_suspend(
1022 struct wcd9xxx_core_resource *wcd9xxx_core_res,
1023 pm_message_t pmesg)
1024{
1025 int ret = 0;
1026
1027 pr_debug("%s: enter\n", __func__);
1028 /*
1029 * pm_qos_update_request() can be called after this suspend chain call
1030 * started. thus suspend can be called while lock is being held
1031 */
1032 mutex_lock(&wcd9xxx_core_res->pm_lock);
1033 if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_SLEEPABLE) {
1034 pr_debug("%s: suspending system, state %d, wlock %d\n",
1035 __func__, wcd9xxx_core_res->pm_state,
1036 wcd9xxx_core_res->wlock_holders);
1037 wcd9xxx_core_res->pm_state = WCD9XXX_PM_ASLEEP;
1038 } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_AWAKE) {
1039 /*
1040 * unlock to wait for pm_state == WCD9XXX_PM_SLEEPABLE
1041 * then set to WCD9XXX_PM_ASLEEP
1042 */
1043 pr_debug("%s: waiting to suspend system, state %d, wlock %d\n",
1044 __func__, wcd9xxx_core_res->pm_state,
1045 wcd9xxx_core_res->wlock_holders);
1046 mutex_unlock(&wcd9xxx_core_res->pm_lock);
1047 if (!(wait_event_timeout(wcd9xxx_core_res->pm_wq,
1048 wcd9xxx_pm_cmpxchg(wcd9xxx_core_res,
1049 WCD9XXX_PM_SLEEPABLE,
1050 WCD9XXX_PM_ASLEEP) ==
1051 WCD9XXX_PM_SLEEPABLE,
1052 HZ))) {
1053 pr_debug("%s: suspend failed state %d, wlock %d\n",
1054 __func__, wcd9xxx_core_res->pm_state,
1055 wcd9xxx_core_res->wlock_holders);
1056 ret = -EBUSY;
1057 } else {
1058 pr_debug("%s: done, state %d, wlock %d\n", __func__,
1059 wcd9xxx_core_res->pm_state,
1060 wcd9xxx_core_res->wlock_holders);
1061 }
1062 mutex_lock(&wcd9xxx_core_res->pm_lock);
1063 } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
1064 pr_warn("%s: system is already suspended, state %d, wlock %dn",
1065 __func__, wcd9xxx_core_res->pm_state,
1066 wcd9xxx_core_res->wlock_holders);
1067 }
1068 mutex_unlock(&wcd9xxx_core_res->pm_lock);
1069
1070 return ret;
1071}
1072EXPORT_SYMBOL(wcd9xxx_core_res_suspend);
1073
1074/*
1075 * wcd9xxx_core_res_resume:
1076 * Resume callback function for wcd9xxx core
1077 *
1078 * @wcd9xxx_core_res: pointer to wcd core resource
1079 *
1080 * Returns 0 for success or negative error code for failure/busy
1081 */
1082int wcd9xxx_core_res_resume(
1083 struct wcd9xxx_core_resource *wcd9xxx_core_res)
1084{
1085 int ret = 0;
1086
1087 pr_debug("%s: enter\n", __func__);
1088 mutex_lock(&wcd9xxx_core_res->pm_lock);
1089 if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
1090 pr_debug("%s: resuming system, state %d, wlock %d\n", __func__,
1091 wcd9xxx_core_res->pm_state,
1092 wcd9xxx_core_res->wlock_holders);
1093 wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
1094 } else {
1095 pr_warn("%s: system is already awake, state %d wlock %d\n",
1096 __func__, wcd9xxx_core_res->pm_state,
1097 wcd9xxx_core_res->wlock_holders);
1098 }
1099 mutex_unlock(&wcd9xxx_core_res->pm_lock);
1100 wake_up_all(&wcd9xxx_core_res->pm_wq);
1101
1102 return ret;
1103}
1104EXPORT_SYMBOL(wcd9xxx_core_res_resume);
1105
1106/*
1107 * wcd9xxx_get_intf_type:
1108 * Get interface type of wcd9xxx core
1109 *
1110 * Returns interface type
1111 */
1112enum wcd9xxx_intf_status wcd9xxx_get_intf_type(void)
1113{
1114 return wcd9xxx_intf;
1115}
1116EXPORT_SYMBOL(wcd9xxx_get_intf_type);
1117
1118/*
1119 * wcd9xxx_set_intf_type:
1120 * Set interface type of wcd9xxx core
1121 *
1122 */
1123void wcd9xxx_set_intf_type(enum wcd9xxx_intf_status intf_status)
1124{
1125 wcd9xxx_intf = intf_status;
1126}
1127EXPORT_SYMBOL(wcd9xxx_set_intf_type);
1128
1129/*
1130 * wcd9xxx_set_power_state: set power state for the region
1131 * @wcd9xxx: handle to wcd core
1132 * @state: power state to be set
1133 * @region: region index
1134 *
1135 * Returns error code in case of failure or 0 for success
1136 */
1137int wcd9xxx_set_power_state(struct wcd9xxx *wcd9xxx,
1138 enum codec_power_states state,
1139 enum wcd_power_regions region)
1140{
1141 if (!wcd9xxx) {
1142 pr_err("%s: wcd9xxx is NULL\n", __func__);
1143 return -EINVAL;
1144 }
1145
1146 if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
1147 dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
1148 __func__, region);
1149 return -EINVAL;
1150 }
1151 if (!wcd9xxx->wcd9xxx_pwr[region]) {
1152 dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
1153 __func__, region);
1154 return -EINVAL;
1155 }
1156 mutex_lock(&wcd9xxx->io_lock);
1157 wcd9xxx->wcd9xxx_pwr[region]->power_state = state;
1158 mutex_unlock(&wcd9xxx->io_lock);
1159
1160 return 0;
1161}
1162EXPORT_SYMBOL(wcd9xxx_set_power_state);
1163
1164/*
1165 * wcd9xxx_get_current_power_state: Get power state of the region
1166 * @wcd9xxx: handle to wcd core
1167 * @region: region index
1168 *
1169 * Returns current power state of the region or error code for failure
1170 */
1171int wcd9xxx_get_current_power_state(struct wcd9xxx *wcd9xxx,
1172 enum wcd_power_regions region)
1173{
1174 int state;
1175
1176 if (!wcd9xxx) {
1177 pr_err("%s: wcd9xxx is NULL\n", __func__);
1178 return -EINVAL;
1179 }
1180
1181 if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
1182 dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
1183 __func__, region);
1184 return -EINVAL;
1185 }
1186 if (!wcd9xxx->wcd9xxx_pwr[region]) {
1187 dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
1188 __func__, region);
1189 return -EINVAL;
1190 }
1191
1192 mutex_lock(&wcd9xxx->io_lock);
1193 state = wcd9xxx->wcd9xxx_pwr[region]->power_state;
1194 mutex_unlock(&wcd9xxx->io_lock);
1195
1196 return state;
1197}
1198EXPORT_SYMBOL(wcd9xxx_get_current_power_state);