Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Red Hat |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #include <linux/hdmi.h> |
| 19 | #include "hdmi.h" |
| 20 | |
| 21 | |
| 22 | /* Supported HDMI Audio channels */ |
| 23 | #define MSM_HDMI_AUDIO_CHANNEL_2 0 |
| 24 | #define MSM_HDMI_AUDIO_CHANNEL_4 1 |
| 25 | #define MSM_HDMI_AUDIO_CHANNEL_6 2 |
| 26 | #define MSM_HDMI_AUDIO_CHANNEL_8 3 |
| 27 | |
| 28 | /* maps MSM_HDMI_AUDIO_CHANNEL_n consts used by audio driver to # of channels: */ |
| 29 | static int nchannels[] = { 2, 4, 6, 8 }; |
| 30 | |
| 31 | /* Supported HDMI Audio sample rates */ |
| 32 | #define MSM_HDMI_SAMPLE_RATE_32KHZ 0 |
| 33 | #define MSM_HDMI_SAMPLE_RATE_44_1KHZ 1 |
| 34 | #define MSM_HDMI_SAMPLE_RATE_48KHZ 2 |
| 35 | #define MSM_HDMI_SAMPLE_RATE_88_2KHZ 3 |
| 36 | #define MSM_HDMI_SAMPLE_RATE_96KHZ 4 |
| 37 | #define MSM_HDMI_SAMPLE_RATE_176_4KHZ 5 |
| 38 | #define MSM_HDMI_SAMPLE_RATE_192KHZ 6 |
| 39 | #define MSM_HDMI_SAMPLE_RATE_MAX 7 |
| 40 | |
| 41 | |
| 42 | struct hdmi_msm_audio_acr { |
| 43 | uint32_t n; /* N parameter for clock regeneration */ |
| 44 | uint32_t cts; /* CTS parameter for clock regeneration */ |
| 45 | }; |
| 46 | |
| 47 | struct hdmi_msm_audio_arcs { |
| 48 | unsigned long int pixclock; |
| 49 | struct hdmi_msm_audio_acr lut[MSM_HDMI_SAMPLE_RATE_MAX]; |
| 50 | }; |
| 51 | |
| 52 | #define HDMI_MSM_AUDIO_ARCS(pclk, ...) { (1000 * (pclk)), __VA_ARGS__ } |
| 53 | |
| 54 | /* Audio constants lookup table for hdmi_msm_audio_acr_setup */ |
| 55 | /* Valid Pixel-Clock rates: 25.2MHz, 27MHz, 27.03MHz, 74.25MHz, 148.5MHz */ |
| 56 | static const struct hdmi_msm_audio_arcs acr_lut[] = { |
| 57 | /* 25.200MHz */ |
| 58 | HDMI_MSM_AUDIO_ARCS(25200, { |
| 59 | {4096, 25200}, {6272, 28000}, {6144, 25200}, {12544, 28000}, |
| 60 | {12288, 25200}, {25088, 28000}, {24576, 25200} }), |
| 61 | /* 27.000MHz */ |
| 62 | HDMI_MSM_AUDIO_ARCS(27000, { |
| 63 | {4096, 27000}, {6272, 30000}, {6144, 27000}, {12544, 30000}, |
| 64 | {12288, 27000}, {25088, 30000}, {24576, 27000} }), |
| 65 | /* 27.027MHz */ |
| 66 | HDMI_MSM_AUDIO_ARCS(27030, { |
| 67 | {4096, 27027}, {6272, 30030}, {6144, 27027}, {12544, 30030}, |
| 68 | {12288, 27027}, {25088, 30030}, {24576, 27027} }), |
| 69 | /* 74.250MHz */ |
| 70 | HDMI_MSM_AUDIO_ARCS(74250, { |
| 71 | {4096, 74250}, {6272, 82500}, {6144, 74250}, {12544, 82500}, |
| 72 | {12288, 74250}, {25088, 82500}, {24576, 74250} }), |
| 73 | /* 148.500MHz */ |
| 74 | HDMI_MSM_AUDIO_ARCS(148500, { |
| 75 | {4096, 148500}, {6272, 165000}, {6144, 148500}, {12544, 165000}, |
| 76 | {12288, 148500}, {25088, 165000}, {24576, 148500} }), |
| 77 | }; |
| 78 | |
| 79 | static const struct hdmi_msm_audio_arcs *get_arcs(unsigned long int pixclock) |
| 80 | { |
| 81 | int i; |
| 82 | |
| 83 | for (i = 0; i < ARRAY_SIZE(acr_lut); i++) { |
| 84 | const struct hdmi_msm_audio_arcs *arcs = &acr_lut[i]; |
| 85 | if (arcs->pixclock == pixclock) |
| 86 | return arcs; |
| 87 | } |
| 88 | |
| 89 | return NULL; |
| 90 | } |
| 91 | |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 92 | int msm_hdmi_audio_update(struct hdmi *hdmi) |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 93 | { |
| 94 | struct hdmi_audio *audio = &hdmi->audio; |
| 95 | struct hdmi_audio_infoframe *info = &audio->infoframe; |
| 96 | const struct hdmi_msm_audio_arcs *arcs = NULL; |
| 97 | bool enabled = audio->enabled; |
| 98 | uint32_t acr_pkt_ctrl, vbi_pkt_ctrl, aud_pkt_ctrl; |
| 99 | uint32_t infofrm_ctrl, audio_config; |
| 100 | |
| 101 | DBG("audio: enabled=%d, channels=%d, channel_allocation=0x%x, " |
| 102 | "level_shift_value=%d, downmix_inhibit=%d, rate=%d", |
| 103 | audio->enabled, info->channels, info->channel_allocation, |
| 104 | info->level_shift_value, info->downmix_inhibit, audio->rate); |
| 105 | DBG("video: power_on=%d, pixclock=%lu", hdmi->power_on, hdmi->pixclock); |
| 106 | |
| 107 | if (enabled && !(hdmi->power_on && hdmi->pixclock)) { |
| 108 | DBG("disabling audio: no video"); |
| 109 | enabled = false; |
| 110 | } |
| 111 | |
| 112 | if (enabled) { |
| 113 | arcs = get_arcs(hdmi->pixclock); |
| 114 | if (!arcs) { |
| 115 | DBG("disabling audio: unsupported pixclock: %lu", |
| 116 | hdmi->pixclock); |
| 117 | enabled = false; |
| 118 | } |
| 119 | } |
| 120 | |
| 121 | /* Read first before writing */ |
| 122 | acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL); |
| 123 | vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL); |
| 124 | aud_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_AUDIO_PKT_CTRL1); |
| 125 | infofrm_ctrl = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0); |
| 126 | audio_config = hdmi_read(hdmi, REG_HDMI_AUDIO_CFG); |
| 127 | |
| 128 | /* Clear N/CTS selection bits */ |
| 129 | acr_pkt_ctrl &= ~HDMI_ACR_PKT_CTRL_SELECT__MASK; |
| 130 | |
| 131 | if (enabled) { |
| 132 | uint32_t n, cts, multiplier; |
| 133 | enum hdmi_acr_cts select; |
| 134 | uint8_t buf[14]; |
| 135 | |
| 136 | n = arcs->lut[audio->rate].n; |
| 137 | cts = arcs->lut[audio->rate].cts; |
| 138 | |
| 139 | if ((MSM_HDMI_SAMPLE_RATE_192KHZ == audio->rate) || |
| 140 | (MSM_HDMI_SAMPLE_RATE_176_4KHZ == audio->rate)) { |
| 141 | multiplier = 4; |
| 142 | n >>= 2; /* divide N by 4 and use multiplier */ |
| 143 | } else if ((MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) || |
| 144 | (MSM_HDMI_SAMPLE_RATE_88_2KHZ == audio->rate)) { |
| 145 | multiplier = 2; |
| 146 | n >>= 1; /* divide N by 2 and use multiplier */ |
| 147 | } else { |
| 148 | multiplier = 1; |
| 149 | } |
| 150 | |
| 151 | DBG("n=%u, cts=%u, multiplier=%u", n, cts, multiplier); |
| 152 | |
| 153 | acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_SOURCE; |
| 154 | acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_AUDIO_PRIORITY; |
| 155 | acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_N_MULTIPLIER(multiplier); |
| 156 | |
| 157 | if ((MSM_HDMI_SAMPLE_RATE_48KHZ == audio->rate) || |
| 158 | (MSM_HDMI_SAMPLE_RATE_96KHZ == audio->rate) || |
| 159 | (MSM_HDMI_SAMPLE_RATE_192KHZ == audio->rate)) |
| 160 | select = ACR_48; |
| 161 | else if ((MSM_HDMI_SAMPLE_RATE_44_1KHZ == audio->rate) || |
| 162 | (MSM_HDMI_SAMPLE_RATE_88_2KHZ == audio->rate) || |
| 163 | (MSM_HDMI_SAMPLE_RATE_176_4KHZ == audio->rate)) |
| 164 | select = ACR_44; |
| 165 | else /* default to 32k */ |
| 166 | select = ACR_32; |
| 167 | |
| 168 | acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_SELECT(select); |
| 169 | |
| 170 | hdmi_write(hdmi, REG_HDMI_ACR_0(select - 1), |
| 171 | HDMI_ACR_0_CTS(cts)); |
| 172 | hdmi_write(hdmi, REG_HDMI_ACR_1(select - 1), |
| 173 | HDMI_ACR_1_N(n)); |
| 174 | |
| 175 | hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL2, |
| 176 | COND(info->channels != 2, HDMI_AUDIO_PKT_CTRL2_LAYOUT) | |
| 177 | HDMI_AUDIO_PKT_CTRL2_OVERRIDE); |
| 178 | |
| 179 | acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_CONT; |
| 180 | acr_pkt_ctrl |= HDMI_ACR_PKT_CTRL_SEND; |
| 181 | |
| 182 | /* configure infoframe: */ |
| 183 | hdmi_audio_infoframe_pack(info, buf, sizeof(buf)); |
| 184 | hdmi_write(hdmi, REG_HDMI_AUDIO_INFO0, |
| 185 | (buf[3] << 0) || (buf[4] << 8) || |
| 186 | (buf[5] << 16) || (buf[6] << 24)); |
| 187 | hdmi_write(hdmi, REG_HDMI_AUDIO_INFO1, |
| 188 | (buf[7] << 0) || (buf[8] << 8)); |
| 189 | |
| 190 | hdmi_write(hdmi, REG_HDMI_GC, 0); |
| 191 | |
| 192 | vbi_pkt_ctrl |= HDMI_VBI_PKT_CTRL_GC_ENABLE; |
| 193 | vbi_pkt_ctrl |= HDMI_VBI_PKT_CTRL_GC_EVERY_FRAME; |
| 194 | |
| 195 | aud_pkt_ctrl |= HDMI_AUDIO_PKT_CTRL1_AUDIO_SAMPLE_SEND; |
| 196 | |
| 197 | infofrm_ctrl |= HDMI_INFOFRAME_CTRL0_AUDIO_INFO_SEND; |
| 198 | infofrm_ctrl |= HDMI_INFOFRAME_CTRL0_AUDIO_INFO_CONT; |
| 199 | infofrm_ctrl |= HDMI_INFOFRAME_CTRL0_AUDIO_INFO_SOURCE; |
| 200 | infofrm_ctrl |= HDMI_INFOFRAME_CTRL0_AUDIO_INFO_UPDATE; |
| 201 | |
| 202 | audio_config &= ~HDMI_AUDIO_CFG_FIFO_WATERMARK__MASK; |
| 203 | audio_config |= HDMI_AUDIO_CFG_FIFO_WATERMARK(4); |
| 204 | audio_config |= HDMI_AUDIO_CFG_ENGINE_ENABLE; |
| 205 | } else { |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 206 | acr_pkt_ctrl &= ~HDMI_ACR_PKT_CTRL_CONT; |
| 207 | acr_pkt_ctrl &= ~HDMI_ACR_PKT_CTRL_SEND; |
| 208 | vbi_pkt_ctrl &= ~HDMI_VBI_PKT_CTRL_GC_ENABLE; |
| 209 | vbi_pkt_ctrl &= ~HDMI_VBI_PKT_CTRL_GC_EVERY_FRAME; |
| 210 | aud_pkt_ctrl &= ~HDMI_AUDIO_PKT_CTRL1_AUDIO_SAMPLE_SEND; |
| 211 | infofrm_ctrl &= ~HDMI_INFOFRAME_CTRL0_AUDIO_INFO_SEND; |
| 212 | infofrm_ctrl &= ~HDMI_INFOFRAME_CTRL0_AUDIO_INFO_CONT; |
| 213 | infofrm_ctrl &= ~HDMI_INFOFRAME_CTRL0_AUDIO_INFO_SOURCE; |
| 214 | infofrm_ctrl &= ~HDMI_INFOFRAME_CTRL0_AUDIO_INFO_UPDATE; |
| 215 | audio_config &= ~HDMI_AUDIO_CFG_ENGINE_ENABLE; |
| 216 | } |
| 217 | |
| 218 | hdmi_write(hdmi, REG_HDMI_ACR_PKT_CTRL, acr_pkt_ctrl); |
| 219 | hdmi_write(hdmi, REG_HDMI_VBI_PKT_CTRL, vbi_pkt_ctrl); |
| 220 | hdmi_write(hdmi, REG_HDMI_AUDIO_PKT_CTRL1, aud_pkt_ctrl); |
| 221 | hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL0, infofrm_ctrl); |
| 222 | |
| 223 | hdmi_write(hdmi, REG_HDMI_AUD_INT, |
| 224 | COND(enabled, HDMI_AUD_INT_AUD_FIFO_URUN_INT) | |
| 225 | COND(enabled, HDMI_AUD_INT_AUD_SAM_DROP_INT)); |
| 226 | |
| 227 | hdmi_write(hdmi, REG_HDMI_AUDIO_CFG, audio_config); |
| 228 | |
| 229 | |
| 230 | DBG("audio %sabled", enabled ? "en" : "dis"); |
| 231 | |
| 232 | return 0; |
| 233 | } |
| 234 | |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 235 | int msm_hdmi_audio_info_setup(struct hdmi *hdmi, bool enabled, |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 236 | uint32_t num_of_channels, uint32_t channel_allocation, |
| 237 | uint32_t level_shift, bool down_mix) |
| 238 | { |
| 239 | struct hdmi_audio *audio; |
| 240 | |
| 241 | if (!hdmi) |
| 242 | return -ENXIO; |
| 243 | |
| 244 | audio = &hdmi->audio; |
| 245 | |
| 246 | if (num_of_channels >= ARRAY_SIZE(nchannels)) |
| 247 | return -EINVAL; |
| 248 | |
| 249 | audio->enabled = enabled; |
| 250 | audio->infoframe.channels = nchannels[num_of_channels]; |
| 251 | audio->infoframe.channel_allocation = channel_allocation; |
| 252 | audio->infoframe.level_shift_value = level_shift; |
| 253 | audio->infoframe.downmix_inhibit = down_mix; |
| 254 | |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 255 | return msm_hdmi_audio_update(hdmi); |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 256 | } |
| 257 | |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 258 | void msm_hdmi_audio_set_sample_rate(struct hdmi *hdmi, int rate) |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 259 | { |
| 260 | struct hdmi_audio *audio; |
| 261 | |
| 262 | if (!hdmi) |
| 263 | return; |
| 264 | |
| 265 | audio = &hdmi->audio; |
| 266 | |
| 267 | if ((rate < 0) || (rate >= MSM_HDMI_SAMPLE_RATE_MAX)) |
| 268 | return; |
| 269 | |
| 270 | audio->rate = rate; |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 271 | msm_hdmi_audio_update(hdmi); |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 272 | } |