Vineet Gupta | 9b28829 | 2014-11-18 17:36:11 +0530 | [diff] [blame] | 1 | * ARC HS Performance Counters |
| 2 | |
| 3 | The ARC HS can be configured with a pipeline performance monitor for counting |
| 4 | CPU and cache events like cache misses and hits. Like conventional PCT there |
Eric Engestrom | da67e68 | 2016-04-25 01:24:04 +0100 | [diff] [blame] | 5 | are 100+ hardware conditions dynamically mapped to up to 32 counters. |
Vineet Gupta | 9b28829 | 2014-11-18 17:36:11 +0530 | [diff] [blame] | 6 | It also supports overflow interrupts. |
| 7 | |
| 8 | Required properties: |
| 9 | |
| 10 | - compatible : should contain |
| 11 | "snps,archs-pct" |
| 12 | |
| 13 | Example: |
| 14 | |
| 15 | pmu { |
| 16 | compatible = "snps,archs-pct"; |
| 17 | }; |