Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2006-2007 Intel Corporation |
| 3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * Dave Airlie <airlied@linux.ie> |
| 27 | * Jesse Barnes <jesse.barnes@intel.com> |
| 28 | */ |
| 29 | |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 30 | #include <linux/dmi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 31 | #include <linux/i2c.h> |
| 32 | #include "drmP.h" |
| 33 | #include "drm.h" |
| 34 | #include "drm_crtc.h" |
| 35 | #include "drm_edid.h" |
| 36 | #include "intel_drv.h" |
| 37 | #include "i915_drm.h" |
| 38 | #include "i915_drv.h" |
| 39 | |
yakui_zhao | 7fb85bf | 2009-06-02 14:10:49 +0800 | [diff] [blame] | 40 | #define I915_LVDS "i915_lvds" |
| 41 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 42 | /* |
| 43 | * the following four scaling options are defined. |
| 44 | * #define DRM_MODE_SCALE_NON_GPU 0 |
| 45 | * #define DRM_MODE_SCALE_FULLSCREEN 1 |
| 46 | * #define DRM_MODE_SCALE_NO_SCALE 2 |
| 47 | * #define DRM_MODE_SCALE_ASPECT 3 |
| 48 | */ |
| 49 | |
| 50 | /* Private structure for the integrated LVDS support */ |
| 51 | struct intel_lvds_priv { |
| 52 | int fitting_mode; |
| 53 | u32 pfit_control; |
| 54 | u32 pfit_pgm_ratios; |
| 55 | }; |
| 56 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 57 | /** |
| 58 | * Sets the backlight level. |
| 59 | * |
| 60 | * \param level backlight level, from 0 to intel_lvds_get_max_backlight(). |
| 61 | */ |
| 62 | static void intel_lvds_set_backlight(struct drm_device *dev, int level) |
| 63 | { |
| 64 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 65 | u32 blc_pwm_ctl, reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 66 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 67 | if (IS_IGDNG(dev)) |
| 68 | reg = BLC_PWM_CPU_CTL; |
| 69 | else |
| 70 | reg = BLC_PWM_CTL; |
| 71 | |
| 72 | blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
| 73 | I915_WRITE(reg, (blc_pwm_ctl | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 74 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); |
| 75 | } |
| 76 | |
| 77 | /** |
| 78 | * Returns the maximum level of the backlight duty cycle field. |
| 79 | */ |
| 80 | static u32 intel_lvds_get_max_backlight(struct drm_device *dev) |
| 81 | { |
| 82 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 83 | u32 reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 84 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 85 | if (IS_IGDNG(dev)) |
| 86 | reg = BLC_PWM_PCH_CTL2; |
| 87 | else |
| 88 | reg = BLC_PWM_CTL; |
| 89 | |
| 90 | return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 91 | BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; |
| 92 | } |
| 93 | |
| 94 | /** |
| 95 | * Sets the power state for the panel. |
| 96 | */ |
| 97 | static void intel_lvds_set_power(struct drm_device *dev, bool on) |
| 98 | { |
| 99 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 100 | u32 pp_status, ctl_reg, status_reg; |
| 101 | |
| 102 | if (IS_IGDNG(dev)) { |
| 103 | ctl_reg = PCH_PP_CONTROL; |
| 104 | status_reg = PCH_PP_STATUS; |
| 105 | } else { |
| 106 | ctl_reg = PP_CONTROL; |
| 107 | status_reg = PP_STATUS; |
| 108 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 109 | |
| 110 | if (on) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 111 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 112 | POWER_TARGET_ON); |
| 113 | do { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 114 | pp_status = I915_READ(status_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 115 | } while ((pp_status & PP_ON) == 0); |
| 116 | |
| 117 | intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle); |
| 118 | } else { |
| 119 | intel_lvds_set_backlight(dev, 0); |
| 120 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 121 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 122 | ~POWER_TARGET_ON); |
| 123 | do { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 124 | pp_status = I915_READ(status_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 125 | } while (pp_status & PP_ON); |
| 126 | } |
| 127 | } |
| 128 | |
| 129 | static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) |
| 130 | { |
| 131 | struct drm_device *dev = encoder->dev; |
| 132 | |
| 133 | if (mode == DRM_MODE_DPMS_ON) |
| 134 | intel_lvds_set_power(dev, true); |
| 135 | else |
| 136 | intel_lvds_set_power(dev, false); |
| 137 | |
| 138 | /* XXX: We never power down the LVDS pairs. */ |
| 139 | } |
| 140 | |
| 141 | static void intel_lvds_save(struct drm_connector *connector) |
| 142 | { |
| 143 | struct drm_device *dev = connector->dev; |
| 144 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 145 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; |
| 146 | u32 pwm_ctl_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 147 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 148 | if (IS_IGDNG(dev)) { |
| 149 | pp_on_reg = PCH_PP_ON_DELAYS; |
| 150 | pp_off_reg = PCH_PP_OFF_DELAYS; |
| 151 | pp_ctl_reg = PCH_PP_CONTROL; |
| 152 | pp_div_reg = PCH_PP_DIVISOR; |
| 153 | pwm_ctl_reg = BLC_PWM_CPU_CTL; |
| 154 | } else { |
| 155 | pp_on_reg = PP_ON_DELAYS; |
| 156 | pp_off_reg = PP_OFF_DELAYS; |
| 157 | pp_ctl_reg = PP_CONTROL; |
| 158 | pp_div_reg = PP_DIVISOR; |
| 159 | pwm_ctl_reg = BLC_PWM_CTL; |
| 160 | } |
| 161 | |
| 162 | dev_priv->savePP_ON = I915_READ(pp_on_reg); |
| 163 | dev_priv->savePP_OFF = I915_READ(pp_off_reg); |
| 164 | dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg); |
| 165 | dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg); |
| 166 | dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 167 | dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL & |
| 168 | BACKLIGHT_DUTY_CYCLE_MASK); |
| 169 | |
| 170 | /* |
| 171 | * If the light is off at server startup, just make it full brightness |
| 172 | */ |
| 173 | if (dev_priv->backlight_duty_cycle == 0) |
| 174 | dev_priv->backlight_duty_cycle = |
| 175 | intel_lvds_get_max_backlight(dev); |
| 176 | } |
| 177 | |
| 178 | static void intel_lvds_restore(struct drm_connector *connector) |
| 179 | { |
| 180 | struct drm_device *dev = connector->dev; |
| 181 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 182 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; |
| 183 | u32 pwm_ctl_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 184 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 185 | if (IS_IGDNG(dev)) { |
| 186 | pp_on_reg = PCH_PP_ON_DELAYS; |
| 187 | pp_off_reg = PCH_PP_OFF_DELAYS; |
| 188 | pp_ctl_reg = PCH_PP_CONTROL; |
| 189 | pp_div_reg = PCH_PP_DIVISOR; |
| 190 | pwm_ctl_reg = BLC_PWM_CPU_CTL; |
| 191 | } else { |
| 192 | pp_on_reg = PP_ON_DELAYS; |
| 193 | pp_off_reg = PP_OFF_DELAYS; |
| 194 | pp_ctl_reg = PP_CONTROL; |
| 195 | pp_div_reg = PP_DIVISOR; |
| 196 | pwm_ctl_reg = BLC_PWM_CTL; |
| 197 | } |
| 198 | |
| 199 | I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL); |
| 200 | I915_WRITE(pp_on_reg, dev_priv->savePP_ON); |
| 201 | I915_WRITE(pp_off_reg, dev_priv->savePP_OFF); |
| 202 | I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR); |
| 203 | I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 204 | if (dev_priv->savePP_CONTROL & POWER_TARGET_ON) |
| 205 | intel_lvds_set_power(dev, true); |
| 206 | else |
| 207 | intel_lvds_set_power(dev, false); |
| 208 | } |
| 209 | |
| 210 | static int intel_lvds_mode_valid(struct drm_connector *connector, |
| 211 | struct drm_display_mode *mode) |
| 212 | { |
| 213 | struct drm_device *dev = connector->dev; |
| 214 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 215 | struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode; |
| 216 | |
| 217 | if (fixed_mode) { |
| 218 | if (mode->hdisplay > fixed_mode->hdisplay) |
| 219 | return MODE_PANEL; |
| 220 | if (mode->vdisplay > fixed_mode->vdisplay) |
| 221 | return MODE_PANEL; |
| 222 | } |
| 223 | |
| 224 | return MODE_OK; |
| 225 | } |
| 226 | |
| 227 | static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, |
| 228 | struct drm_display_mode *mode, |
| 229 | struct drm_display_mode *adjusted_mode) |
| 230 | { |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 231 | /* |
| 232 | * float point operation is not supported . So the PANEL_RATIO_FACTOR |
| 233 | * is defined, which can avoid the float point computation when |
| 234 | * calculating the panel ratio. |
| 235 | */ |
| 236 | #define PANEL_RATIO_FACTOR 8192 |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 237 | struct drm_device *dev = encoder->dev; |
| 238 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 239 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
| 240 | struct drm_encoder *tmp_encoder; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 241 | struct intel_output *intel_output = enc_to_intel_output(encoder); |
| 242 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; |
| 243 | u32 pfit_control = 0, pfit_pgm_ratios = 0; |
| 244 | int left_border = 0, right_border = 0, top_border = 0; |
| 245 | int bottom_border = 0; |
| 246 | bool border = 0; |
| 247 | int panel_ratio, desired_ratio, vert_scale, horiz_scale; |
| 248 | int horiz_ratio, vert_ratio; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 249 | |
| 250 | /* Should never happen!! */ |
| 251 | if (!IS_I965G(dev) && intel_crtc->pipe == 0) { |
| 252 | printk(KERN_ERR "Can't support LVDS on pipe A\n"); |
| 253 | return false; |
| 254 | } |
| 255 | |
| 256 | /* Should never happen!! */ |
| 257 | list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) { |
| 258 | if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) { |
| 259 | printk(KERN_ERR "Can't enable LVDS and another " |
| 260 | "encoder on the same pipe\n"); |
| 261 | return false; |
| 262 | } |
| 263 | } |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 264 | /* If we don't have a panel mode, there is nothing we can do */ |
| 265 | if (dev_priv->panel_fixed_mode == NULL) |
| 266 | return true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 267 | /* |
| 268 | * If we have timings from the BIOS for the panel, put them in |
| 269 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 270 | * with the panel scaling set up to source from the H/VDisplay |
| 271 | * of the original mode. |
| 272 | */ |
| 273 | if (dev_priv->panel_fixed_mode != NULL) { |
| 274 | adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay; |
| 275 | adjusted_mode->hsync_start = |
| 276 | dev_priv->panel_fixed_mode->hsync_start; |
| 277 | adjusted_mode->hsync_end = |
| 278 | dev_priv->panel_fixed_mode->hsync_end; |
| 279 | adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal; |
| 280 | adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay; |
| 281 | adjusted_mode->vsync_start = |
| 282 | dev_priv->panel_fixed_mode->vsync_start; |
| 283 | adjusted_mode->vsync_end = |
| 284 | dev_priv->panel_fixed_mode->vsync_end; |
| 285 | adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal; |
| 286 | adjusted_mode->clock = dev_priv->panel_fixed_mode->clock; |
| 287 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); |
| 288 | } |
| 289 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 290 | /* Make sure pre-965s set dither correctly */ |
| 291 | if (!IS_I965G(dev)) { |
| 292 | if (dev_priv->panel_wants_dither || dev_priv->lvds_dither) |
| 293 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; |
| 294 | } |
| 295 | |
| 296 | /* Native modes don't need fitting */ |
| 297 | if (adjusted_mode->hdisplay == mode->hdisplay && |
| 298 | adjusted_mode->vdisplay == mode->vdisplay) { |
| 299 | pfit_pgm_ratios = 0; |
| 300 | border = 0; |
| 301 | goto out; |
| 302 | } |
| 303 | |
| 304 | /* 965+ wants fuzzy fitting */ |
| 305 | if (IS_I965G(dev)) |
| 306 | pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) | |
| 307 | PFIT_FILTER_FUZZY; |
| 308 | |
| 309 | /* |
| 310 | * Deal with panel fitting options. Figure out how to stretch the |
| 311 | * image based on its aspect ratio & the current panel fitting mode. |
| 312 | */ |
| 313 | panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR / |
| 314 | adjusted_mode->vdisplay; |
| 315 | desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR / |
| 316 | mode->vdisplay; |
| 317 | /* |
| 318 | * Enable automatic panel scaling for non-native modes so that they fill |
| 319 | * the screen. Should be enabled before the pipe is enabled, according |
| 320 | * to register description and PRM. |
| 321 | * Change the value here to see the borders for debugging |
| 322 | */ |
| 323 | I915_WRITE(BCLRPAT_A, 0); |
| 324 | I915_WRITE(BCLRPAT_B, 0); |
| 325 | |
| 326 | switch (lvds_priv->fitting_mode) { |
| 327 | case DRM_MODE_SCALE_NO_SCALE: |
| 328 | /* |
| 329 | * For centered modes, we have to calculate border widths & |
| 330 | * heights and modify the values programmed into the CRTC. |
| 331 | */ |
| 332 | left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2; |
| 333 | right_border = left_border; |
| 334 | if (mode->hdisplay & 1) |
| 335 | right_border++; |
| 336 | top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2; |
| 337 | bottom_border = top_border; |
| 338 | if (mode->vdisplay & 1) |
| 339 | bottom_border++; |
| 340 | /* Set active & border values */ |
| 341 | adjusted_mode->crtc_hdisplay = mode->hdisplay; |
| 342 | adjusted_mode->crtc_hblank_start = mode->hdisplay + |
| 343 | right_border - 1; |
| 344 | adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_htotal - |
| 345 | left_border - 1; |
| 346 | adjusted_mode->crtc_hsync_start = |
| 347 | adjusted_mode->crtc_hblank_start; |
| 348 | adjusted_mode->crtc_hsync_end = |
| 349 | adjusted_mode->crtc_hblank_end; |
| 350 | adjusted_mode->crtc_vdisplay = mode->vdisplay; |
| 351 | adjusted_mode->crtc_vblank_start = mode->vdisplay + |
| 352 | bottom_border - 1; |
| 353 | adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal - |
| 354 | top_border - 1; |
| 355 | adjusted_mode->crtc_vsync_start = |
| 356 | adjusted_mode->crtc_vblank_start; |
| 357 | adjusted_mode->crtc_vsync_end = |
| 358 | adjusted_mode->crtc_vblank_end; |
| 359 | border = 1; |
| 360 | break; |
| 361 | case DRM_MODE_SCALE_ASPECT: |
| 362 | /* Scale but preserve the spect ratio */ |
| 363 | pfit_control |= PFIT_ENABLE; |
| 364 | if (IS_I965G(dev)) { |
| 365 | /* 965+ is easy, it does everything in hw */ |
| 366 | if (panel_ratio > desired_ratio) |
| 367 | pfit_control |= PFIT_SCALING_PILLAR; |
| 368 | else if (panel_ratio < desired_ratio) |
| 369 | pfit_control |= PFIT_SCALING_LETTER; |
| 370 | else |
| 371 | pfit_control |= PFIT_SCALING_AUTO; |
| 372 | } else { |
| 373 | /* |
| 374 | * For earlier chips we have to calculate the scaling |
| 375 | * ratio by hand and program it into the |
| 376 | * PFIT_PGM_RATIO register |
| 377 | */ |
| 378 | u32 horiz_bits, vert_bits, bits = 12; |
| 379 | horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/ |
| 380 | adjusted_mode->hdisplay; |
| 381 | vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/ |
| 382 | adjusted_mode->vdisplay; |
| 383 | horiz_scale = adjusted_mode->hdisplay * |
| 384 | PANEL_RATIO_FACTOR / mode->hdisplay; |
| 385 | vert_scale = adjusted_mode->vdisplay * |
| 386 | PANEL_RATIO_FACTOR / mode->vdisplay; |
| 387 | |
| 388 | /* retain aspect ratio */ |
| 389 | if (panel_ratio > desired_ratio) { /* Pillar */ |
| 390 | u32 scaled_width; |
| 391 | scaled_width = mode->hdisplay * vert_scale / |
| 392 | PANEL_RATIO_FACTOR; |
| 393 | horiz_ratio = vert_ratio; |
| 394 | pfit_control |= (VERT_AUTO_SCALE | |
| 395 | VERT_INTERP_BILINEAR | |
| 396 | HORIZ_INTERP_BILINEAR); |
| 397 | /* Pillar will have left/right borders */ |
| 398 | left_border = (adjusted_mode->hdisplay - |
| 399 | scaled_width) / 2; |
| 400 | right_border = left_border; |
| 401 | if (mode->hdisplay & 1) /* odd resolutions */ |
| 402 | right_border++; |
| 403 | adjusted_mode->crtc_hdisplay = scaled_width; |
| 404 | adjusted_mode->crtc_hblank_start = |
| 405 | scaled_width + right_border - 1; |
| 406 | adjusted_mode->crtc_hblank_end = |
| 407 | adjusted_mode->crtc_htotal - left_border - 1; |
| 408 | adjusted_mode->crtc_hsync_start = |
| 409 | adjusted_mode->crtc_hblank_start; |
| 410 | adjusted_mode->crtc_hsync_end = |
| 411 | adjusted_mode->crtc_hblank_end; |
| 412 | border = 1; |
| 413 | } else if (panel_ratio < desired_ratio) { /* letter */ |
| 414 | u32 scaled_height = mode->vdisplay * |
| 415 | horiz_scale / PANEL_RATIO_FACTOR; |
| 416 | vert_ratio = horiz_ratio; |
| 417 | pfit_control |= (HORIZ_AUTO_SCALE | |
| 418 | VERT_INTERP_BILINEAR | |
| 419 | HORIZ_INTERP_BILINEAR); |
| 420 | /* Letterbox will have top/bottom border */ |
| 421 | top_border = (adjusted_mode->vdisplay - |
| 422 | scaled_height) / 2; |
| 423 | bottom_border = top_border; |
| 424 | if (mode->vdisplay & 1) |
| 425 | bottom_border++; |
| 426 | adjusted_mode->crtc_vdisplay = scaled_height; |
| 427 | adjusted_mode->crtc_vblank_start = |
| 428 | scaled_height + bottom_border - 1; |
| 429 | adjusted_mode->crtc_vblank_end = |
| 430 | adjusted_mode->crtc_vtotal - top_border - 1; |
| 431 | adjusted_mode->crtc_vsync_start = |
| 432 | adjusted_mode->crtc_vblank_start; |
| 433 | adjusted_mode->crtc_vsync_end = |
| 434 | adjusted_mode->crtc_vblank_end; |
| 435 | border = 1; |
| 436 | } else { |
| 437 | /* Aspects match, Let hw scale both directions */ |
| 438 | pfit_control |= (VERT_AUTO_SCALE | |
| 439 | HORIZ_AUTO_SCALE | |
| 440 | VERT_INTERP_BILINEAR | |
| 441 | HORIZ_INTERP_BILINEAR); |
| 442 | } |
| 443 | horiz_bits = (1 << bits) * horiz_ratio / |
| 444 | PANEL_RATIO_FACTOR; |
| 445 | vert_bits = (1 << bits) * vert_ratio / |
| 446 | PANEL_RATIO_FACTOR; |
| 447 | pfit_pgm_ratios = |
| 448 | ((vert_bits << PFIT_VERT_SCALE_SHIFT) & |
| 449 | PFIT_VERT_SCALE_MASK) | |
| 450 | ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) & |
| 451 | PFIT_HORIZ_SCALE_MASK); |
| 452 | } |
| 453 | break; |
| 454 | |
| 455 | case DRM_MODE_SCALE_FULLSCREEN: |
| 456 | /* |
| 457 | * Full scaling, even if it changes the aspect ratio. |
| 458 | * Fortunately this is all done for us in hw. |
| 459 | */ |
| 460 | pfit_control |= PFIT_ENABLE; |
| 461 | if (IS_I965G(dev)) |
| 462 | pfit_control |= PFIT_SCALING_AUTO; |
| 463 | else |
| 464 | pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | |
| 465 | VERT_INTERP_BILINEAR | |
| 466 | HORIZ_INTERP_BILINEAR); |
| 467 | break; |
| 468 | default: |
| 469 | break; |
| 470 | } |
| 471 | |
| 472 | out: |
| 473 | lvds_priv->pfit_control = pfit_control; |
| 474 | lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 475 | /* |
| 476 | * XXX: It would be nice to support lower refresh rates on the |
| 477 | * panels to reduce power consumption, and perhaps match the |
| 478 | * user's requested refresh rate. |
| 479 | */ |
| 480 | |
| 481 | return true; |
| 482 | } |
| 483 | |
| 484 | static void intel_lvds_prepare(struct drm_encoder *encoder) |
| 485 | { |
| 486 | struct drm_device *dev = encoder->dev; |
| 487 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 488 | u32 reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 489 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 490 | if (IS_IGDNG(dev)) |
| 491 | reg = BLC_PWM_CPU_CTL; |
| 492 | else |
| 493 | reg = BLC_PWM_CTL; |
| 494 | |
| 495 | dev_priv->saveBLC_PWM_CTL = I915_READ(reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 496 | dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL & |
| 497 | BACKLIGHT_DUTY_CYCLE_MASK); |
| 498 | |
| 499 | intel_lvds_set_power(dev, false); |
| 500 | } |
| 501 | |
| 502 | static void intel_lvds_commit( struct drm_encoder *encoder) |
| 503 | { |
| 504 | struct drm_device *dev = encoder->dev; |
| 505 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 506 | |
| 507 | if (dev_priv->backlight_duty_cycle == 0) |
| 508 | dev_priv->backlight_duty_cycle = |
| 509 | intel_lvds_get_max_backlight(dev); |
| 510 | |
| 511 | intel_lvds_set_power(dev, true); |
| 512 | } |
| 513 | |
| 514 | static void intel_lvds_mode_set(struct drm_encoder *encoder, |
| 515 | struct drm_display_mode *mode, |
| 516 | struct drm_display_mode *adjusted_mode) |
| 517 | { |
| 518 | struct drm_device *dev = encoder->dev; |
| 519 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 520 | struct intel_output *intel_output = enc_to_intel_output(encoder); |
| 521 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 522 | |
| 523 | /* |
| 524 | * The LVDS pin pair will already have been turned on in the |
| 525 | * intel_crtc_mode_set since it has a large impact on the DPLL |
| 526 | * settings. |
| 527 | */ |
| 528 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 529 | /* No panel fitting yet, fixme */ |
| 530 | if (IS_IGDNG(dev)) |
| 531 | return; |
| 532 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 533 | /* |
| 534 | * Enable automatic panel scaling so that non-native modes fill the |
| 535 | * screen. Should be enabled before the pipe is enabled, according to |
| 536 | * register description and PRM. |
| 537 | */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 538 | I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios); |
| 539 | I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | /** |
| 543 | * Detect the LVDS connection. |
| 544 | * |
| 545 | * This always returns CONNECTOR_STATUS_CONNECTED. This connector should only have |
| 546 | * been set up if the LVDS was actually connected anyway. |
| 547 | */ |
| 548 | static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector) |
| 549 | { |
| 550 | return connector_status_connected; |
| 551 | } |
| 552 | |
| 553 | /** |
| 554 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
| 555 | */ |
| 556 | static int intel_lvds_get_modes(struct drm_connector *connector) |
| 557 | { |
| 558 | struct drm_device *dev = connector->dev; |
| 559 | struct intel_output *intel_output = to_intel_output(connector); |
| 560 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 561 | int ret = 0; |
| 562 | |
| 563 | ret = intel_ddc_get_modes(intel_output); |
| 564 | |
| 565 | if (ret) |
| 566 | return ret; |
| 567 | |
| 568 | /* Didn't get an EDID, so |
| 569 | * Set wide sync ranges so we get all modes |
| 570 | * handed to valid_mode for checking |
| 571 | */ |
| 572 | connector->display_info.min_vfreq = 0; |
| 573 | connector->display_info.max_vfreq = 200; |
| 574 | connector->display_info.min_hfreq = 0; |
| 575 | connector->display_info.max_hfreq = 200; |
| 576 | |
| 577 | if (dev_priv->panel_fixed_mode != NULL) { |
| 578 | struct drm_display_mode *mode; |
| 579 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 580 | mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); |
| 581 | drm_mode_probed_add(connector, mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 582 | |
| 583 | return 1; |
| 584 | } |
| 585 | |
| 586 | return 0; |
| 587 | } |
| 588 | |
| 589 | /** |
| 590 | * intel_lvds_destroy - unregister and free LVDS structures |
| 591 | * @connector: connector to free |
| 592 | * |
| 593 | * Unregister the DDC bus for this connector then free the driver private |
| 594 | * structure. |
| 595 | */ |
| 596 | static void intel_lvds_destroy(struct drm_connector *connector) |
| 597 | { |
| 598 | struct intel_output *intel_output = to_intel_output(connector); |
| 599 | |
| 600 | if (intel_output->ddc_bus) |
| 601 | intel_i2c_destroy(intel_output->ddc_bus); |
| 602 | drm_sysfs_connector_remove(connector); |
| 603 | drm_connector_cleanup(connector); |
| 604 | kfree(connector); |
| 605 | } |
| 606 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 607 | static int intel_lvds_set_property(struct drm_connector *connector, |
| 608 | struct drm_property *property, |
| 609 | uint64_t value) |
| 610 | { |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 611 | struct drm_device *dev = connector->dev; |
| 612 | struct intel_output *intel_output = |
| 613 | to_intel_output(connector); |
| 614 | |
| 615 | if (property == dev->mode_config.scaling_mode_property && |
| 616 | connector->encoder) { |
| 617 | struct drm_crtc *crtc = connector->encoder->crtc; |
| 618 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; |
| 619 | if (value == DRM_MODE_SCALE_NON_GPU) { |
| 620 | DRM_DEBUG_KMS(I915_LVDS, |
| 621 | "non_GPU property is unsupported\n"); |
| 622 | return 0; |
| 623 | } |
| 624 | if (lvds_priv->fitting_mode == value) { |
| 625 | /* the LVDS scaling property is not changed */ |
| 626 | return 0; |
| 627 | } |
| 628 | lvds_priv->fitting_mode = value; |
| 629 | if (crtc && crtc->enabled) { |
| 630 | /* |
| 631 | * If the CRTC is enabled, the display will be changed |
| 632 | * according to the new panel fitting mode. |
| 633 | */ |
| 634 | drm_crtc_helper_set_mode(crtc, &crtc->mode, |
| 635 | crtc->x, crtc->y, crtc->fb); |
| 636 | } |
| 637 | } |
| 638 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 639 | return 0; |
| 640 | } |
| 641 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 642 | static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { |
| 643 | .dpms = intel_lvds_dpms, |
| 644 | .mode_fixup = intel_lvds_mode_fixup, |
| 645 | .prepare = intel_lvds_prepare, |
| 646 | .mode_set = intel_lvds_mode_set, |
| 647 | .commit = intel_lvds_commit, |
| 648 | }; |
| 649 | |
| 650 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
| 651 | .get_modes = intel_lvds_get_modes, |
| 652 | .mode_valid = intel_lvds_mode_valid, |
| 653 | .best_encoder = intel_best_encoder, |
| 654 | }; |
| 655 | |
| 656 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 657 | .dpms = drm_helper_connector_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 658 | .save = intel_lvds_save, |
| 659 | .restore = intel_lvds_restore, |
| 660 | .detect = intel_lvds_detect, |
| 661 | .fill_modes = drm_helper_probe_single_connector_modes, |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 662 | .set_property = intel_lvds_set_property, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 663 | .destroy = intel_lvds_destroy, |
| 664 | }; |
| 665 | |
| 666 | |
| 667 | static void intel_lvds_enc_destroy(struct drm_encoder *encoder) |
| 668 | { |
| 669 | drm_encoder_cleanup(encoder); |
| 670 | } |
| 671 | |
| 672 | static const struct drm_encoder_funcs intel_lvds_enc_funcs = { |
| 673 | .destroy = intel_lvds_enc_destroy, |
| 674 | }; |
| 675 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 676 | static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) |
| 677 | { |
yakui_zhao | 7fb85bf | 2009-06-02 14:10:49 +0800 | [diff] [blame] | 678 | DRM_DEBUG_KMS(I915_LVDS, |
| 679 | "Skipping LVDS initialization for %s\n", id->ident); |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 680 | return 1; |
| 681 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 682 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 683 | /* These systems claim to have LVDS, but really don't */ |
Jaswinder Singh Rajput | 93c05f2 | 2009-06-04 09:41:19 +1000 | [diff] [blame] | 684 | static const struct dmi_system_id intel_no_lvds[] = { |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 685 | { |
| 686 | .callback = intel_no_lvds_dmi_callback, |
| 687 | .ident = "Apple Mac Mini (Core series)", |
| 688 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 689 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 690 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), |
| 691 | }, |
| 692 | }, |
| 693 | { |
| 694 | .callback = intel_no_lvds_dmi_callback, |
| 695 | .ident = "Apple Mac Mini (Core 2 series)", |
| 696 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 697 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 698 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), |
| 699 | }, |
| 700 | }, |
| 701 | { |
| 702 | .callback = intel_no_lvds_dmi_callback, |
| 703 | .ident = "MSI IM-945GSE-A", |
| 704 | .matches = { |
| 705 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), |
| 706 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), |
| 707 | }, |
| 708 | }, |
| 709 | { |
| 710 | .callback = intel_no_lvds_dmi_callback, |
| 711 | .ident = "Dell Studio Hybrid", |
| 712 | .matches = { |
| 713 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 714 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), |
| 715 | }, |
| 716 | }, |
Jarod Wilson | 70aa96c | 2009-05-27 17:20:39 -0400 | [diff] [blame] | 717 | { |
| 718 | .callback = intel_no_lvds_dmi_callback, |
| 719 | .ident = "AOpen Mini PC", |
| 720 | .matches = { |
| 721 | DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), |
| 722 | DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), |
| 723 | }, |
| 724 | }, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 725 | { |
| 726 | .callback = intel_no_lvds_dmi_callback, |
| 727 | .ident = "Aopen i945GTt-VFA", |
| 728 | .matches = { |
| 729 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
| 730 | }, |
| 731 | }, |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 732 | |
| 733 | { } /* terminating entry */ |
| 734 | }; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 735 | |
| 736 | /** |
| 737 | * intel_lvds_init - setup LVDS connectors on this device |
| 738 | * @dev: drm device |
| 739 | * |
| 740 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
| 741 | * modes we can display on the LVDS panel (if present). |
| 742 | */ |
| 743 | void intel_lvds_init(struct drm_device *dev) |
| 744 | { |
| 745 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 746 | struct intel_output *intel_output; |
| 747 | struct drm_connector *connector; |
| 748 | struct drm_encoder *encoder; |
| 749 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
| 750 | struct drm_crtc *crtc; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 751 | struct intel_lvds_priv *lvds_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 752 | u32 lvds; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 753 | int pipe, gpio = GPIOC; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 754 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 755 | /* Skip init on machines we know falsely report LVDS */ |
| 756 | if (dmi_check_system(intel_no_lvds)) |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 757 | return; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 758 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 759 | if (IS_IGDNG(dev)) { |
| 760 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
| 761 | return; |
| 762 | gpio = PCH_GPIOC; |
| 763 | } |
| 764 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 765 | intel_output = kzalloc(sizeof(struct intel_output) + |
| 766 | sizeof(struct intel_lvds_priv), GFP_KERNEL); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 767 | if (!intel_output) { |
| 768 | return; |
| 769 | } |
| 770 | |
| 771 | connector = &intel_output->base; |
| 772 | encoder = &intel_output->enc; |
| 773 | drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs, |
| 774 | DRM_MODE_CONNECTOR_LVDS); |
| 775 | |
| 776 | drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs, |
| 777 | DRM_MODE_ENCODER_LVDS); |
| 778 | |
| 779 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); |
| 780 | intel_output->type = INTEL_OUTPUT_LVDS; |
| 781 | |
| 782 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
| 783 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
| 784 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 785 | connector->interlace_allowed = false; |
| 786 | connector->doublescan_allowed = false; |
| 787 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 788 | lvds_priv = (struct intel_lvds_priv *)(intel_output + 1); |
| 789 | intel_output->dev_priv = lvds_priv; |
| 790 | /* create the scaling mode property */ |
| 791 | drm_mode_create_scaling_mode_property(dev); |
| 792 | /* |
| 793 | * the initial panel fitting mode will be FULL_SCREEN. |
| 794 | */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 795 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 796 | drm_connector_attach_property(&intel_output->base, |
| 797 | dev->mode_config.scaling_mode_property, |
| 798 | DRM_MODE_SCALE_FULLSCREEN); |
| 799 | lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 800 | /* |
| 801 | * LVDS discovery: |
| 802 | * 1) check for EDID on DDC |
| 803 | * 2) check for VBT data |
| 804 | * 3) check to see if LVDS is already on |
| 805 | * if none of the above, no panel |
| 806 | * 4) make sure lid is open |
| 807 | * if closed, act like it's not there for now |
| 808 | */ |
| 809 | |
| 810 | /* Set up the DDC bus. */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 811 | intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 812 | if (!intel_output->ddc_bus) { |
| 813 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " |
| 814 | "failed.\n"); |
| 815 | goto failed; |
| 816 | } |
| 817 | |
| 818 | /* |
| 819 | * Attempt to get the fixed panel mode from DDC. Assume that the |
| 820 | * preferred mode is the right one. |
| 821 | */ |
| 822 | intel_ddc_get_modes(intel_output); |
| 823 | |
| 824 | list_for_each_entry(scan, &connector->probed_modes, head) { |
| 825 | mutex_lock(&dev->mode_config.mutex); |
| 826 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
| 827 | dev_priv->panel_fixed_mode = |
| 828 | drm_mode_duplicate(dev, scan); |
| 829 | mutex_unlock(&dev->mode_config.mutex); |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 830 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 831 | } |
| 832 | mutex_unlock(&dev->mode_config.mutex); |
| 833 | } |
| 834 | |
| 835 | /* Failed to get EDID, what about VBT? */ |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 836 | if (dev_priv->lfp_lvds_vbt_mode) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 837 | mutex_lock(&dev->mode_config.mutex); |
| 838 | dev_priv->panel_fixed_mode = |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 839 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 840 | mutex_unlock(&dev->mode_config.mutex); |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 841 | if (dev_priv->panel_fixed_mode) { |
| 842 | dev_priv->panel_fixed_mode->type |= |
| 843 | DRM_MODE_TYPE_PREFERRED; |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 844 | goto out; |
| 845 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 846 | } |
| 847 | |
| 848 | /* |
| 849 | * If we didn't get EDID, try checking if the panel is already turned |
| 850 | * on. If so, assume that whatever is currently programmed is the |
| 851 | * correct mode. |
| 852 | */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 853 | |
| 854 | /* IGDNG: FIXME if still fail, not try pipe mode now */ |
| 855 | if (IS_IGDNG(dev)) |
| 856 | goto failed; |
| 857 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 858 | lvds = I915_READ(LVDS); |
| 859 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
| 860 | crtc = intel_get_crtc_from_pipe(dev, pipe); |
| 861 | |
| 862 | if (crtc && (lvds & LVDS_PORT_EN)) { |
| 863 | dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc); |
| 864 | if (dev_priv->panel_fixed_mode) { |
| 865 | dev_priv->panel_fixed_mode->type |= |
| 866 | DRM_MODE_TYPE_PREFERRED; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 867 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 868 | } |
| 869 | } |
| 870 | |
| 871 | /* If we still don't have a mode after all that, give up. */ |
| 872 | if (!dev_priv->panel_fixed_mode) |
| 873 | goto failed; |
| 874 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 875 | out: |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 876 | if (IS_IGDNG(dev)) { |
| 877 | u32 pwm; |
| 878 | /* make sure PWM is enabled */ |
| 879 | pwm = I915_READ(BLC_PWM_CPU_CTL2); |
| 880 | pwm |= (PWM_ENABLE | PWM_PIPE_B); |
| 881 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm); |
| 882 | |
| 883 | pwm = I915_READ(BLC_PWM_PCH_CTL1); |
| 884 | pwm |= PWM_PCH_ENABLE; |
| 885 | I915_WRITE(BLC_PWM_PCH_CTL1, pwm); |
| 886 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 887 | drm_sysfs_connector_add(connector); |
| 888 | return; |
| 889 | |
| 890 | failed: |
yakui_zhao | 7fb85bf | 2009-06-02 14:10:49 +0800 | [diff] [blame] | 891 | DRM_DEBUG_KMS(I915_LVDS, "No LVDS modes found, disabling.\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 892 | if (intel_output->ddc_bus) |
| 893 | intel_i2c_destroy(intel_output->ddc_bus); |
| 894 | drm_connector_cleanup(connector); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame^] | 895 | kfree(intel_output); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 896 | } |