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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer
3 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +00004 * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * CYPRESS CY82C693 chipset IDE controller
7 *
8 * The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards.
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 */
10
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/module.h>
12#include <linux/types.h>
13#include <linux/pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/ide.h>
15#include <linux/init.h>
16
17#include <asm/io.h>
18
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +020019#define DRV_NAME "cy82c693"
20
Linus Torvalds1da177e2005-04-16 15:20:36 -070021/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 * NOTE: the value for busmaster timeout is tricky and I got it by
23 * trial and error! By using a to low value will cause DMA timeouts
24 * and drop IDE performance, and by using a to high value will cause
25 * audio playback to scatter.
26 * If you know a better value or how to calc it, please let me know.
27 */
28
29/* twice the value written in cy82c693ub datasheet */
30#define BUSMASTER_TIMEOUT 0x50
31/*
32 * the value above was tested on my machine and it seems to work okay
33 */
34
35/* here are the offset definitions for the registers */
36#define CY82_IDE_CMDREG 0x04
37#define CY82_IDE_ADDRSETUP 0x48
38#define CY82_IDE_MASTER_IOR 0x4C
39#define CY82_IDE_MASTER_IOW 0x4D
40#define CY82_IDE_SLAVE_IOR 0x4E
41#define CY82_IDE_SLAVE_IOW 0x4F
42#define CY82_IDE_MASTER_8BIT 0x50
43#define CY82_IDE_SLAVE_8BIT 0x51
44
45#define CY82_INDEX_PORT 0x22
46#define CY82_DATA_PORT 0x23
47
Linus Torvalds1da177e2005-04-16 15:20:36 -070048#define CY82_INDEX_CHANNEL0 0x30
49#define CY82_INDEX_CHANNEL1 0x31
50#define CY82_INDEX_TIMEOUT 0x32
51
Linus Torvalds1da177e2005-04-16 15:20:36 -070052/*
53 * set DMA mode a specific channel for CY82C693
54 */
55
Bartlomiej Zolnierkiewicz8704de82008-01-26 20:13:00 +010056static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
Linus Torvalds1da177e2005-04-16 15:20:36 -070057{
Bartlomiej Zolnierkiewicz8704de82008-01-26 20:13:00 +010058 ide_hwif_t *hwif = drive->hwif;
59 u8 single = (mode & 0x10) >> 4, index = 0, data = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070060
Bartlomiej Zolnierkiewicz8704de82008-01-26 20:13:00 +010061 index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
Bartlomiej Zolnierkiewicz8704de82008-01-26 20:13:00 +010063 data = (mode & 3) | (single << 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010065 outb(index, CY82_INDEX_PORT);
66 outb(data, CY82_DATA_PORT);
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
Paolo Ciarrocchi175f3542008-04-26 17:36:42 +020068 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 * note: below we set the value for Bus Master IDE TimeOut Register
70 * I'm not absolutly sure what this does, but it solved my problem
71 * with IDE DMA and sound, so I now can play sound and work with
72 * my IDE driver at the same time :-)
73 *
74 * If you know the correct (best) value for this register please
75 * let me know - ASK
76 */
77
78 data = BUSMASTER_TIMEOUT;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010079 outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
80 outb(data, CY82_DATA_PORT);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081}
82
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020083static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -070084{
Bartlomiej Zolnierkiewicz898ec222009-01-06 17:20:52 +010085 ide_hwif_t *hwif = drive->hwif;
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +010086 struct pci_dev *dev = to_pci_dev(hwif->dev);
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +000087 int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
88 const unsigned long T = 1000000 / bus_speed;
Linus Torvalds1da177e2005-04-16 15:20:36 -070089 unsigned int addrCtrl;
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +000090 struct ide_timing t;
91 u8 time_16, time_8;
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
93 /* select primary or secondary channel */
94 if (hwif->index > 0) { /* drive is on the secondary channel */
Alan Cox652aa162006-10-03 01:14:35 -070095 dev = pci_get_slot(dev->bus, dev->devfn+1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 if (!dev) {
97 printk(KERN_ERR "%s: tune_drive: "
98 "Cannot find secondary interface!\n",
99 drive->name);
100 return;
101 }
102 }
103
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +0000104 ide_timing_compute(drive, XFER_PIO_0 + pio, &t, T, 1);
105
106 time_16 = clamp_val(t.recover - 1, 0, 15) |
107 (clamp_val(t.active - 1, 0, 15) << 4);
108 time_8 = clamp_val(t.act8b - 1, 0, 15) |
109 (clamp_val(t.rec8b - 1, 0, 15) << 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110
111 /* now let's write the clocks registers */
Bartlomiej Zolnierkiewicz123995b2008-10-13 21:39:40 +0200112 if ((drive->dn & 1) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113 /*
114 * set master drive
115 * address setup control register
116 * is 32 bit !!!
Paolo Ciarrocchi175f3542008-04-26 17:36:42 +0200117 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
Paolo Ciarrocchi175f3542008-04-26 17:36:42 +0200119
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120 addrCtrl &= (~0xF);
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +0000121 addrCtrl |= clamp_val(t.setup - 1, 0, 15);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122 pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
123
124 /* now let's set the remaining registers */
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +0000125 pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, time_16);
126 pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, time_16);
127 pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, time_8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 } else {
129 /*
130 * set slave drive
131 * address setup control register
132 * is 32 bit !!!
Paolo Ciarrocchi175f3542008-04-26 17:36:42 +0200133 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
135
136 addrCtrl &= (~0xF0);
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +0000137 addrCtrl |= (clamp_val(t.setup - 1, 0, 15) << 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138 pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
139
140 /* now let's set the remaining registers */
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +0000141 pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, time_16);
142 pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, time_16);
143 pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, time_8);
Paolo Ciarrocchi175f3542008-04-26 17:36:42 +0200144 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145}
146
Adrian Bunke851b622005-11-09 23:07:56 +0100147static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148{
Bartlomiej Zolnierkiewiczf32d26a2007-10-26 20:31:15 +0200149 static ide_hwif_t *primary;
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100150 struct pci_dev *dev = to_pci_dev(hwif->dev);
Bartlomiej Zolnierkiewiczf32d26a2007-10-26 20:31:15 +0200151
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100152 if (PCI_FUNC(dev->devfn) == 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 primary = hwif;
154 else {
155 hwif->mate = primary;
156 hwif->channel = 1;
157 }
158}
159
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200160static const struct ide_port_ops cy82c693_port_ops = {
161 .set_pio_mode = cy82c693_set_pio_mode,
162 .set_dma_mode = cy82c693_set_dma_mode,
163};
164
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200165static const struct ide_port_info cy82c693_chipset __devinitdata = {
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200166 .name = DRV_NAME,
Bartlomiej Zolnierkiewicz7b77d862007-02-17 02:40:24 +0100167 .init_iops = init_iops_cy82c693,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200168 .port_ops = &cy82c693_port_ops,
Bartlomiej Zolnierkiewicz951784b2008-04-26 17:36:38 +0200169 .host_flags = IDE_HFLAG_SINGLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200170 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz8704de82008-01-26 20:13:00 +0100171 .swdma_mask = ATA_SWDMA2,
172 .mwdma_mask = ATA_MWDMA2,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173};
174
175static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id)
176{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177 struct pci_dev *dev2;
178 int ret = -ENODEV;
179
180 /* CY82C693 is more than only a IDE controller.
181 Function 1 is primary IDE channel, function 2 - secondary. */
Paolo Ciarrocchi175f3542008-04-26 17:36:42 +0200182 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 PCI_FUNC(dev->devfn) == 1) {
Alan Cox652aa162006-10-03 01:14:35 -0700184 dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
Bartlomiej Zolnierkiewicz6cdf6eb2008-07-24 22:53:14 +0200185 ret = ide_pci_init_two(dev, dev2, &cy82c693_chipset, NULL);
Bartlomiej Zolnierkiewiczcd688412008-07-24 22:53:21 +0200186 if (ret)
187 pci_dev_put(dev2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 }
189 return ret;
190}
191
Bartlomiej Zolnierkiewiczcd688412008-07-24 22:53:21 +0200192static void __devexit cy82c693_remove(struct pci_dev *dev)
193{
194 struct ide_host *host = pci_get_drvdata(dev);
195 struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
196
197 ide_pci_remove(dev);
198 pci_dev_put(dev2);
199}
200
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200201static const struct pci_device_id cy82c693_pci_tbl[] = {
202 { PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203 { 0, },
204};
205MODULE_DEVICE_TABLE(pci, cy82c693_pci_tbl);
206
Bartlomiej Zolnierkiewicza9ab09e2008-10-13 21:39:41 +0200207static struct pci_driver cy82c693_pci_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 .name = "Cypress_IDE",
209 .id_table = cy82c693_pci_tbl,
210 .probe = cy82c693_init_one,
Adrian Bunka69999e2008-08-18 21:40:03 +0200211 .remove = __devexit_p(cy82c693_remove),
Bartlomiej Zolnierkiewiczfeb22b72008-10-10 22:39:32 +0200212 .suspend = ide_pci_suspend,
213 .resume = ide_pci_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214};
215
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100216static int __init cy82c693_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217{
Bartlomiej Zolnierkiewicza9ab09e2008-10-13 21:39:41 +0200218 return ide_pci_register_driver(&cy82c693_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219}
220
Bartlomiej Zolnierkiewiczcd688412008-07-24 22:53:21 +0200221static void __exit cy82c693_ide_exit(void)
222{
Bartlomiej Zolnierkiewicza9ab09e2008-10-13 21:39:41 +0200223 pci_unregister_driver(&cy82c693_pci_driver);
Bartlomiej Zolnierkiewiczcd688412008-07-24 22:53:21 +0200224}
225
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226module_init(cy82c693_ide_init);
Bartlomiej Zolnierkiewiczcd688412008-07-24 22:53:21 +0200227module_exit(cy82c693_ide_exit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228
Bartlomiej Zolnierkiewicz4d6b3282010-01-18 07:18:47 +0000229MODULE_AUTHOR("Andreas Krebs, Andre Hedrick, Bartlomiej Zolnierkiewicz");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230MODULE_DESCRIPTION("PCI driver module for the Cypress CY82C693 IDE");
231MODULE_LICENSE("GPL");