blob: 9a4dfc5eb24932b9e665cd593f159174b187b2ca [file] [log] [blame]
Aurelien Jacquiota7f626c2011-10-04 11:14:47 -04001/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_ELF_H
12#define _ASM_C6X_ELF_H
13
14/*
15 * ELF register definitions..
16 */
17#include <asm/ptrace.h>
18
19typedef unsigned long elf_greg_t;
20typedef unsigned long elf_fpreg_t;
21
22#define ELF_NGREG 58
23#define ELF_NFPREG 1
24
25typedef elf_greg_t elf_gregset_t[ELF_NGREG];
26typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
27
28/*
29 * This is used to ensure we don't load something for the wrong architecture.
30 */
31#define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000)
32
Mark Salterfce24472012-04-23 10:02:08 -040033#define elf_check_fdpic(x) (1)
34#define elf_check_const_displacement(x) (0)
35
36#define ELF_FDPIC_PLAT_INIT(_regs, _exec_map, _interp_map, _dynamic_addr) \
37do { \
38 _regs->b4 = (_exec_map); \
39 _regs->a6 = (_interp_map); \
40 _regs->b6 = (_dynamic_addr); \
41} while (0)
42
43#define ELF_FDPIC_CORE_EFLAGS 0
44
45#define ELF_CORE_COPY_FPREGS(...) 0 /* No FPU regs to copy */
Aurelien Jacquiota7f626c2011-10-04 11:14:47 -040046
47/*
48 * These are used to set parameters in the core dumps.
49 */
50#ifdef __LITTLE_ENDIAN__
51#define ELF_DATA ELFDATA2LSB
52#else
53#define ELF_DATA ELFDATA2MSB
54#endif
55
56#define ELF_CLASS ELFCLASS32
57#define ELF_ARCH EM_TI_C6000
58
59/* Nothing for now. Need to setup DP... */
60#define ELF_PLAT_INIT(_r)
61
62#define USE_ELF_CORE_DUMP
63#define ELF_EXEC_PAGESIZE 4096
64
65#define ELF_CORE_COPY_REGS(_dest, _regs) \
66 memcpy((char *) &_dest, (char *) _regs, \
67 sizeof(struct pt_regs));
68
69/* This yields a mask that user programs can use to figure out what
70 instruction set this cpu supports. */
71
72#define ELF_HWCAP (0)
73
74/* This yields a string that ld.so will use to load implementation
75 specific libraries for optimization. This is more specific in
76 intent than poking at uname or /proc/cpuinfo. */
77
78#define ELF_PLATFORM (NULL)
79
Aurelien Jacquiota7f626c2011-10-04 11:14:47 -040080/* C6X specific section types */
81#define SHT_C6000_UNWIND 0x70000001
82#define SHT_C6000_PREEMPTMAP 0x70000002
83#define SHT_C6000_ATTRIBUTES 0x70000003
84
85/* C6X specific DT_ tags */
86#define DT_C6000_DSBT_BASE 0x70000000
87#define DT_C6000_DSBT_SIZE 0x70000001
88#define DT_C6000_PREEMPTMAP 0x70000002
89#define DT_C6000_DSBT_INDEX 0x70000003
90
91/* C6X specific relocs */
92#define R_C6000_NONE 0
93#define R_C6000_ABS32 1
94#define R_C6000_ABS16 2
95#define R_C6000_ABS8 3
96#define R_C6000_PCR_S21 4
97#define R_C6000_PCR_S12 5
98#define R_C6000_PCR_S10 6
99#define R_C6000_PCR_S7 7
100#define R_C6000_ABS_S16 8
101#define R_C6000_ABS_L16 9
102#define R_C6000_ABS_H16 10
103#define R_C6000_SBR_U15_B 11
104#define R_C6000_SBR_U15_H 12
105#define R_C6000_SBR_U15_W 13
106#define R_C6000_SBR_S16 14
107#define R_C6000_SBR_L16_B 15
108#define R_C6000_SBR_L16_H 16
109#define R_C6000_SBR_L16_W 17
110#define R_C6000_SBR_H16_B 18
111#define R_C6000_SBR_H16_H 19
112#define R_C6000_SBR_H16_W 20
113#define R_C6000_SBR_GOT_U15_W 21
114#define R_C6000_SBR_GOT_L16_W 22
115#define R_C6000_SBR_GOT_H16_W 23
116#define R_C6000_DSBT_INDEX 24
117#define R_C6000_PREL31 25
118#define R_C6000_COPY 26
119#define R_C6000_ALIGN 253
120#define R_C6000_FPHEAD 254
121#define R_C6000_NOCMP 255
122
123#endif /*_ASM_C6X_ELF_H */