blob: 373817c3166b357637bda9cc9ccda7841c73fdc4 [file] [log] [blame]
Sanjay Lal858dd5d2012-11-21 18:34:05 -08001/*
Deng-Cheng Zhud116e812014-06-26 12:11:34 -07002 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS TLB handling, this file is part of the Linux host kernel so that
7 * TLB handlers run from KSEG0
8 *
9 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
10 * Authors: Sanjay Lal <sanjayl@kymasys.com>
11 */
Sanjay Lal858dd5d2012-11-21 18:34:05 -080012
Sanjay Lal858dd5d2012-11-21 18:34:05 -080013#include <linux/sched.h>
14#include <linux/smp.h>
15#include <linux/mm.h>
16#include <linux/delay.h>
James Hogan403015b2016-06-09 14:19:10 +010017#include <linux/export.h>
Sanjay Lal858dd5d2012-11-21 18:34:05 -080018#include <linux/kvm_host.h>
Sanjay Lal6d17c0d2013-05-18 06:54:24 -070019#include <linux/srcu.h>
20
Sanjay Lal858dd5d2012-11-21 18:34:05 -080021#include <asm/cpu.h>
22#include <asm/bootinfo.h>
23#include <asm/mmu_context.h>
24#include <asm/pgtable.h>
25#include <asm/cacheflush.h>
James Hogane36059e2014-01-17 12:01:30 +000026#include <asm/tlb.h>
Sanjay Lal858dd5d2012-11-21 18:34:05 -080027
28#undef CONFIG_MIPS_MT
29#include <asm/r4kcache.h>
30#define CONFIG_MIPS_MT
31
32#define KVM_GUEST_PC_TLB 0
33#define KVM_GUEST_SP_TLB 1
34
Sanjay Lal858dd5d2012-11-21 18:34:05 -080035atomic_t kvm_mips_instance;
James Hogancb1b4472015-12-16 23:49:30 +000036EXPORT_SYMBOL_GPL(kvm_mips_instance);
Sanjay Lal858dd5d2012-11-21 18:34:05 -080037
38/* These function pointers are initialized once the KVM module is loaded */
Dan Williamsba049e92016-01-15 16:56:11 -080039kvm_pfn_t (*kvm_mips_gfn_to_pfn)(struct kvm *kvm, gfn_t gfn);
James Hogancb1b4472015-12-16 23:49:30 +000040EXPORT_SYMBOL_GPL(kvm_mips_gfn_to_pfn);
Sanjay Lal858dd5d2012-11-21 18:34:05 -080041
Dan Williamsba049e92016-01-15 16:56:11 -080042void (*kvm_mips_release_pfn_clean)(kvm_pfn_t pfn);
James Hogancb1b4472015-12-16 23:49:30 +000043EXPORT_SYMBOL_GPL(kvm_mips_release_pfn_clean);
Sanjay Lal858dd5d2012-11-21 18:34:05 -080044
Dan Williamsba049e92016-01-15 16:56:11 -080045bool (*kvm_mips_is_error_pfn)(kvm_pfn_t pfn);
James Hogancb1b4472015-12-16 23:49:30 +000046EXPORT_SYMBOL_GPL(kvm_mips_is_error_pfn);
Sanjay Lal858dd5d2012-11-21 18:34:05 -080047
James Hogan403015b2016-06-09 14:19:10 +010048static u32 kvm_mips_get_kernel_asid(struct kvm_vcpu *vcpu)
Sanjay Lal858dd5d2012-11-21 18:34:05 -080049{
Paul Burton4edf00a2016-05-06 14:36:23 +010050 int cpu = smp_processor_id();
51
52 return vcpu->arch.guest_kernel_asid[cpu] &
53 cpu_asid_mask(&cpu_data[cpu]);
Sanjay Lal858dd5d2012-11-21 18:34:05 -080054}
55
James Hogan403015b2016-06-09 14:19:10 +010056static u32 kvm_mips_get_user_asid(struct kvm_vcpu *vcpu)
Sanjay Lal858dd5d2012-11-21 18:34:05 -080057{
Paul Burton4edf00a2016-05-06 14:36:23 +010058 int cpu = smp_processor_id();
59
60 return vcpu->arch.guest_user_asid[cpu] &
61 cpu_asid_mask(&cpu_data[cpu]);
Sanjay Lal858dd5d2012-11-21 18:34:05 -080062}
63
James Hoganbdb7ed82016-06-09 14:19:07 +010064inline u32 kvm_mips_get_commpage_asid(struct kvm_vcpu *vcpu)
Sanjay Lal858dd5d2012-11-21 18:34:05 -080065{
66 return vcpu->kvm->arch.commpage_tlb;
67}
68
Deng-Cheng Zhud116e812014-06-26 12:11:34 -070069/* Structure defining an tlb entry data set. */
Sanjay Lal858dd5d2012-11-21 18:34:05 -080070
71void kvm_mips_dump_host_tlbs(void)
72{
73 unsigned long old_entryhi;
74 unsigned long old_pagemask;
75 struct kvm_mips_tlb tlb;
76 unsigned long flags;
77 int i;
78
79 local_irq_save(flags);
80
81 old_entryhi = read_c0_entryhi();
82 old_pagemask = read_c0_pagemask();
83
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -070084 kvm_info("HOST TLBs:\n");
Paul Burton4edf00a2016-05-06 14:36:23 +010085 kvm_info("ASID: %#lx\n", read_c0_entryhi() &
86 cpu_asid_mask(&current_cpu_data));
Sanjay Lal858dd5d2012-11-21 18:34:05 -080087
88 for (i = 0; i < current_cpu_data.tlbsize; i++) {
89 write_c0_index(i);
90 mtc0_tlbw_hazard();
91
92 tlb_read();
93 tlbw_use_hazard();
94
95 tlb.tlb_hi = read_c0_entryhi();
96 tlb.tlb_lo0 = read_c0_entrylo0();
97 tlb.tlb_lo1 = read_c0_entrylo1();
98 tlb.tlb_mask = read_c0_pagemask();
99
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -0700100 kvm_info("TLB%c%3d Hi 0x%08lx ",
101 (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
102 i, tlb.tlb_hi);
James Hogan8cffd192016-06-09 14:19:08 +0100103 kvm_info("Lo0=0x%09llx %c%c attr %lx ",
104 (u64) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -0700105 (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
106 (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
107 (tlb.tlb_lo0 >> 3) & 7);
James Hogan8cffd192016-06-09 14:19:08 +0100108 kvm_info("Lo1=0x%09llx %c%c attr %lx sz=%lx\n",
109 (u64) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -0700110 (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
111 (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
112 (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800113 }
114 write_c0_entryhi(old_entryhi);
115 write_c0_pagemask(old_pagemask);
116 mtc0_tlbw_hazard();
117 local_irq_restore(flags);
118}
James Hogancb1b4472015-12-16 23:49:30 +0000119EXPORT_SYMBOL_GPL(kvm_mips_dump_host_tlbs);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800120
121void kvm_mips_dump_guest_tlbs(struct kvm_vcpu *vcpu)
122{
123 struct mips_coproc *cop0 = vcpu->arch.cop0;
124 struct kvm_mips_tlb tlb;
125 int i;
126
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -0700127 kvm_info("Guest TLBs:\n");
128 kvm_info("Guest EntryHi: %#lx\n", kvm_read_c0_guest_entryhi(cop0));
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800129
130 for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
131 tlb = vcpu->arch.guest_tlb[i];
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -0700132 kvm_info("TLB%c%3d Hi 0x%08lx ",
133 (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
134 i, tlb.tlb_hi);
James Hogan8cffd192016-06-09 14:19:08 +0100135 kvm_info("Lo0=0x%09llx %c%c attr %lx ",
136 (u64) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -0700137 (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
138 (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
139 (tlb.tlb_lo0 >> 3) & 7);
James Hogan8cffd192016-06-09 14:19:08 +0100140 kvm_info("Lo1=0x%09llx %c%c attr %lx sz=%lx\n",
141 (u64) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
Deng-Cheng Zhu6ad78a52014-06-26 12:11:35 -0700142 (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
143 (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
144 (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800145 }
146}
James Hogancb1b4472015-12-16 23:49:30 +0000147EXPORT_SYMBOL_GPL(kvm_mips_dump_guest_tlbs);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800148
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800149/* XXXKYMA: Must be called with interrupts disabled */
150/* set flush_dcache_mask == 0 if no dcache flush required */
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700151int kvm_mips_host_tlb_write(struct kvm_vcpu *vcpu, unsigned long entryhi,
152 unsigned long entrylo0, unsigned long entrylo1,
153 int flush_dcache_mask)
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800154{
155 unsigned long flags;
156 unsigned long old_entryhi;
Deng-Cheng Zhub045c402014-06-26 12:11:37 -0700157 int idx;
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800158
159 local_irq_save(flags);
160
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800161 old_entryhi = read_c0_entryhi();
162 write_c0_entryhi(entryhi);
163 mtc0_tlbw_hazard();
164
165 tlb_probe();
166 tlb_probe_hazard();
167 idx = read_c0_index();
168
169 if (idx > current_cpu_data.tlbsize) {
170 kvm_err("%s: Invalid Index: %d\n", __func__, idx);
171 kvm_mips_dump_host_tlbs();
Tapasweni Pathakcfec0e72015-02-22 21:48:21 +0530172 local_irq_restore(flags);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800173 return -1;
174 }
175
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800176 write_c0_entrylo0(entrylo0);
177 write_c0_entrylo1(entrylo1);
178 mtc0_tlbw_hazard();
179
James Hoganb5dfc6c2014-05-29 10:16:26 +0100180 if (idx < 0)
181 tlb_write_random();
182 else
183 tlb_write_indexed();
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800184 tlbw_use_hazard();
185
James Hogan3d654832014-05-29 10:16:41 +0100186 kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0(R): 0x%08lx, entrylo1(R): 0x%08lx\n",
187 vcpu->arch.pc, idx, read_c0_entryhi(),
188 read_c0_entrylo0(), read_c0_entrylo1());
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800189
190 /* Flush D-cache */
191 if (flush_dcache_mask) {
192 if (entrylo0 & MIPS3_PG_V) {
193 ++vcpu->stat.flush_dcache_exits;
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700194 flush_data_cache_page((entryhi & VPN2_MASK) &
195 ~flush_dcache_mask);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800196 }
197 if (entrylo1 & MIPS3_PG_V) {
198 ++vcpu->stat.flush_dcache_exits;
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700199 flush_data_cache_page(((entryhi & VPN2_MASK) &
200 ~flush_dcache_mask) |
201 (0x1 << PAGE_SHIFT));
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800202 }
203 }
204
205 /* Restore old ASID */
206 write_c0_entryhi(old_entryhi);
207 mtc0_tlbw_hazard();
208 tlbw_use_hazard();
209 local_irq_restore(flags);
210 return 0;
211}
James Hogan403015b2016-06-09 14:19:10 +0100212EXPORT_SYMBOL_GPL(kvm_mips_host_tlb_write);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800213
214int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
215 struct kvm_vcpu *vcpu)
216{
Dan Williamsba049e92016-01-15 16:56:11 -0800217 kvm_pfn_t pfn0, pfn1;
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800218 unsigned long flags, old_entryhi = 0, vaddr = 0;
219 unsigned long entrylo0 = 0, entrylo1 = 0;
220
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800221 pfn0 = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT;
222 pfn1 = 0;
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700223 entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) |
224 (1 << 2) | (0x1 << 1);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800225 entrylo1 = 0;
226
227 local_irq_save(flags);
228
229 old_entryhi = read_c0_entryhi();
230 vaddr = badvaddr & (PAGE_MASK << 1);
231 write_c0_entryhi(vaddr | kvm_mips_get_kernel_asid(vcpu));
232 mtc0_tlbw_hazard();
233 write_c0_entrylo0(entrylo0);
234 mtc0_tlbw_hazard();
235 write_c0_entrylo1(entrylo1);
236 mtc0_tlbw_hazard();
237 write_c0_index(kvm_mips_get_commpage_asid(vcpu));
238 mtc0_tlbw_hazard();
239 tlb_write_indexed();
240 mtc0_tlbw_hazard();
241 tlbw_use_hazard();
242
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700243 kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0 (R): 0x%08lx, entrylo1(R): 0x%08lx\n",
244 vcpu->arch.pc, read_c0_index(), read_c0_entryhi(),
245 read_c0_entrylo0(), read_c0_entrylo1());
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800246
247 /* Restore old ASID */
248 write_c0_entryhi(old_entryhi);
249 mtc0_tlbw_hazard();
250 tlbw_use_hazard();
251 local_irq_restore(flags);
252
253 return 0;
254}
James Hogancb1b4472015-12-16 23:49:30 +0000255EXPORT_SYMBOL_GPL(kvm_mips_handle_commpage_tlb_fault);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800256
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800257int kvm_mips_guest_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long entryhi)
258{
259 int i;
260 int index = -1;
261 struct kvm_mips_tlb *tlb = vcpu->arch.guest_tlb;
262
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800263 for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700264 if (TLB_HI_VPN2_HIT(tlb[i], entryhi) &&
265 TLB_HI_ASID_HIT(tlb[i], entryhi)) {
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800266 index = i;
267 break;
268 }
269 }
270
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800271 kvm_debug("%s: entryhi: %#lx, index: %d lo0: %#lx, lo1: %#lx\n",
272 __func__, entryhi, index, tlb[i].tlb_lo0, tlb[i].tlb_lo1);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800273
274 return index;
275}
James Hogancb1b4472015-12-16 23:49:30 +0000276EXPORT_SYMBOL_GPL(kvm_mips_guest_tlb_lookup);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800277
278int kvm_mips_host_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long vaddr)
279{
280 unsigned long old_entryhi, flags;
Deng-Cheng Zhub045c402014-06-26 12:11:37 -0700281 int idx;
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800282
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800283 local_irq_save(flags);
284
285 old_entryhi = read_c0_entryhi();
286
287 if (KVM_GUEST_KERNEL_MODE(vcpu))
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700288 write_c0_entryhi((vaddr & VPN2_MASK) |
289 kvm_mips_get_kernel_asid(vcpu));
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800290 else {
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700291 write_c0_entryhi((vaddr & VPN2_MASK) |
292 kvm_mips_get_user_asid(vcpu));
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800293 }
294
295 mtc0_tlbw_hazard();
296
297 tlb_probe();
298 tlb_probe_hazard();
299 idx = read_c0_index();
300
301 /* Restore old ASID */
302 write_c0_entryhi(old_entryhi);
303 mtc0_tlbw_hazard();
304 tlbw_use_hazard();
305
306 local_irq_restore(flags);
307
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800308 kvm_debug("Host TLB lookup, %#lx, idx: %2d\n", vaddr, idx);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800309
310 return idx;
311}
James Hogancb1b4472015-12-16 23:49:30 +0000312EXPORT_SYMBOL_GPL(kvm_mips_host_tlb_lookup);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800313
314int kvm_mips_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long va)
315{
316 int idx;
317 unsigned long flags, old_entryhi;
318
319 local_irq_save(flags);
320
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800321 old_entryhi = read_c0_entryhi();
322
323 write_c0_entryhi((va & VPN2_MASK) | kvm_mips_get_user_asid(vcpu));
324 mtc0_tlbw_hazard();
325
326 tlb_probe();
327 tlb_probe_hazard();
328 idx = read_c0_index();
329
330 if (idx >= current_cpu_data.tlbsize)
331 BUG();
332
333 if (idx > 0) {
334 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
335 mtc0_tlbw_hazard();
336
337 write_c0_entrylo0(0);
338 mtc0_tlbw_hazard();
339
340 write_c0_entrylo1(0);
341 mtc0_tlbw_hazard();
342
343 tlb_write_indexed();
344 mtc0_tlbw_hazard();
345 }
346
347 write_c0_entryhi(old_entryhi);
348 mtc0_tlbw_hazard();
349 tlbw_use_hazard();
350
351 local_irq_restore(flags);
352
James Hogan3d654832014-05-29 10:16:41 +0100353 if (idx > 0)
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800354 kvm_debug("%s: Invalidated entryhi %#lx @ idx %d\n", __func__,
James Hogan3d654832014-05-29 10:16:41 +0100355 (va & VPN2_MASK) | kvm_mips_get_user_asid(vcpu), idx);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800356
357 return 0;
358}
James Hogancb1b4472015-12-16 23:49:30 +0000359EXPORT_SYMBOL_GPL(kvm_mips_host_tlb_inv);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800360
361void kvm_mips_flush_host_tlb(int skip_kseg0)
362{
363 unsigned long flags;
364 unsigned long old_entryhi, entryhi;
365 unsigned long old_pagemask;
366 int entry = 0;
367 int maxentry = current_cpu_data.tlbsize;
368
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800369 local_irq_save(flags);
370
371 old_entryhi = read_c0_entryhi();
372 old_pagemask = read_c0_pagemask();
373
374 /* Blast 'em all away. */
375 for (entry = 0; entry < maxentry; entry++) {
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800376 write_c0_index(entry);
377 mtc0_tlbw_hazard();
378
379 if (skip_kseg0) {
380 tlb_read();
381 tlbw_use_hazard();
382
383 entryhi = read_c0_entryhi();
384
385 /* Don't blow away guest kernel entries */
Deng-Cheng Zhud116e812014-06-26 12:11:34 -0700386 if (KVM_GUEST_KSEGX(entryhi) == KVM_GUEST_KSEG0)
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800387 continue;
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800388 }
389
390 /* Make sure all entries differ. */
391 write_c0_entryhi(UNIQUE_ENTRYHI(entry));
392 mtc0_tlbw_hazard();
393 write_c0_entrylo0(0);
394 mtc0_tlbw_hazard();
395 write_c0_entrylo1(0);
396 mtc0_tlbw_hazard();
397
398 tlb_write_indexed();
399 mtc0_tlbw_hazard();
400 }
401
402 tlbw_use_hazard();
403
404 write_c0_entryhi(old_entryhi);
405 write_c0_pagemask(old_pagemask);
406 mtc0_tlbw_hazard();
407 tlbw_use_hazard();
408
409 local_irq_restore(flags);
410}
James Hogancb1b4472015-12-16 23:49:30 +0000411EXPORT_SYMBOL_GPL(kvm_mips_flush_host_tlb);
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800412
Sanjay Lal858dd5d2012-11-21 18:34:05 -0800413void kvm_local_flush_tlb_all(void)
414{
415 unsigned long flags;
416 unsigned long old_ctx;
417 int entry = 0;
418
419 local_irq_save(flags);
420 /* Save old context and create impossible VPN2 value */
421 old_ctx = read_c0_entryhi();
422 write_c0_entrylo0(0);
423 write_c0_entrylo1(0);
424
425 /* Blast 'em all away. */
426 while (entry < current_cpu_data.tlbsize) {
427 /* Make sure all entries differ. */
428 write_c0_entryhi(UNIQUE_ENTRYHI(entry));
429 write_c0_index(entry);
430 mtc0_tlbw_hazard();
431 tlb_write_indexed();
432 entry++;
433 }
434 tlbw_use_hazard();
435 write_c0_entryhi(old_ctx);
436 mtc0_tlbw_hazard();
437
438 local_irq_restore(flags);
439}
James Hogancb1b4472015-12-16 23:49:30 +0000440EXPORT_SYMBOL_GPL(kvm_local_flush_tlb_all);