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Narendra Muppalla1b0b3352015-09-29 10:16:51 -07001/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __SDE_KMS_H__
14#define __SDE_KMS_H__
15
16#include "msm_drv.h"
17#include "msm_kms.h"
18#include "mdp/mdp_kms.h"
19#include "sde_hw_catalog.h"
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040020#include "sde_hw_mdp_ctl.h"
21#include "sde_hw_lm.h"
Ben Chan78647cd2016-06-26 22:02:47 -040022#include "sde_hw_interrupts.h"
23
24/*
25 * struct sde_irq_callback - IRQ callback handlers
26 * @func: intr handler
27 * @arg: argument for the handler
28 */
29struct sde_irq_callback {
30 void (*func)(void *arg, int irq_idx);
31 void *arg;
32};
33
34/**
35 * struct sde_irq: IRQ structure contains callback registration info
36 * @total_irq: total number of irq_idx obtained from HW interrupts mapping
37 * @irq_cb_tbl: array of IRQ callbacks setting
38 * @cb_lock: callback lock
39 */
40struct sde_irq {
41 u32 total_irqs;
42 struct sde_irq_callback *irq_cb_tbl;
43 spinlock_t cb_lock;
44};
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070045
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040046/**
47 * struct sde_hw_res_map : Default resource table identifying default
48 * hw resource map. Primarily used for forcing DSI to use CTL_0/1
49 * and Pingpong 0/1, if the field is set to SDE_NONE means any HW
50 * intstance for that tpye is allowed as long as it is unused.
51 */
52struct sde_hw_res_map {
53 enum sde_intf intf;
54 enum sde_lm lm;
55 enum sde_pingpong pp;
56 enum sde_ctl ctl;
57};
58
59/* struct sde_hw_resource_manager : Resource mananger maintains the current
60 * platform configuration and manages shared
61 * hw resources ex:ctl_path hw driver context
62 * is needed by CRTCs/PLANEs/ENCODERs
63 * @ctl : table of control path hw driver contexts allocated
64 * @mixer : list of mixer hw drivers contexts allocated
65 * @intr : pointer to hw interrupt context
66 * @res_table : pointer to default hw_res table for this platform
67 * @feature_map :BIT map for default enabled features ex:specifies if PP_SPLIT
68 * is enabled/disabled by defalt for this platform
69 */
70struct sde_hw_resource_manager {
71 struct sde_hw_ctl *ctl[CTL_MAX];
72 struct sde_hw_mixer *mixer[LM_MAX];
73 struct sde_hw_intr *intr;
74 const struct sde_hw_res_map *res_table;
75 bool feature_map;
76};
77
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070078struct sde_kms {
Ben Chan78647cd2016-06-26 22:02:47 -040079 struct msm_kms base;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070080 struct drm_device *dev;
81 int rev;
82 struct sde_mdss_cfg *catalog;
83
84 struct msm_mmu *mmu;
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -040085 int mmu_id;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070086
87 /* io/register spaces: */
88 void __iomem *mmio, *vbif;
89
90 struct regulator *vdd;
91 struct regulator *mmagic;
92 struct regulator *venus;
93
94 struct clk *axi_clk;
95 struct clk *ahb_clk;
96 struct clk *src_clk;
97 struct clk *core_clk;
98 struct clk *lut_clk;
99 struct clk *mmagic_clk;
100 struct clk *iommu_clk;
101 struct clk *vsync_clk;
102
103 struct {
104 unsigned long enabled_mask;
105 struct irq_domain *domain;
106 } irqcontroller;
Ben Chan78647cd2016-06-26 22:02:47 -0400107
108 struct sde_hw_intr *hw_intr;
109 struct sde_irq irq_obj;
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400110 struct sde_hw_resource_manager hw_res;
Ben Chan78647cd2016-06-26 22:02:47 -0400111};
112
113struct vsync_info {
114 u32 frame_count;
115 u32 line_count;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700116};
117
118#define to_sde_kms(x) container_of(x, struct sde_kms, base)
119
120struct sde_plane_state {
121 struct drm_plane_state base;
122
123 /* aligned with property */
124 uint8_t premultiplied;
125 uint8_t zpos;
126 uint8_t alpha;
127
128 /* assigned by crtc blender */
129 enum sde_stage stage;
130
131 /* some additional transactional status to help us know in the
132 * apply path whether we need to update SMP allocation, and
133 * whether current update is still pending:
134 */
135 bool mode_changed : 1;
136 bool pending : 1;
137};
138
139#define to_sde_plane_state(x) \
140 container_of(x, struct sde_plane_state, base)
141
142int sde_disable(struct sde_kms *sde_kms);
143int sde_enable(struct sde_kms *sde_kms);
144
Ben Chan78647cd2016-06-26 22:02:47 -0400145/**
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400146 * HW resource manager functions
147 * @sde_rm_acquire_ctl_path : Allocates control path
148 * @sde_rm_get_ctl_path : returns control path driver context for already
149 * acquired ctl path
150 * @sde_rm_release_ctl_path : Frees control path driver context
151 * @sde_rm_acquire_mixer : Allocates mixer hw driver context
152 * @sde_rm_get_mixer : returns mixer context for already
153 * acquired mixer
154 * @sde_rm_release_mixer : Frees mixer hw driver context
155 * @sde_rm_get_hw_res_map : Returns map for the passed INTF
156 */
157struct sde_hw_ctl *sde_rm_acquire_ctl_path(struct sde_kms *sde_kms,
158 enum sde_ctl idx);
159struct sde_hw_ctl *sde_rm_get_ctl_path(struct sde_kms *sde_kms,
160 enum sde_ctl idx);
161void sde_rm_release_ctl_path(struct sde_kms *sde_kms,
162 enum sde_ctl idx);
163struct sde_hw_mixer *sde_rm_acquire_mixer(struct sde_kms *sde_kms,
164 enum sde_lm idx);
165struct sde_hw_mixer *sde_rm_get_mixer(struct sde_kms *sde_kms,
166 enum sde_lm idx);
167void sde_rm_release_mixer(struct sde_kms *sde_kms,
168 enum sde_lm idx);
169struct sde_hw_intr *sde_rm_acquire_intr(struct sde_kms *sde_kms);
170struct sde_hw_intr *sde_rm_get_intr(struct sde_kms *sde_kms);
171
172const struct sde_hw_res_map *sde_rm_get_res_map(struct sde_kms *sde_kms,
173 enum sde_intf idx);
174
175/**
Ben Chan78647cd2016-06-26 22:02:47 -0400176 * IRQ functions
177 */
178int sde_irq_domain_init(struct sde_kms *sde_kms);
179int sde_irq_domain_fini(struct sde_kms *sde_kms);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700180void sde_irq_preinstall(struct msm_kms *kms);
181int sde_irq_postinstall(struct msm_kms *kms);
182void sde_irq_uninstall(struct msm_kms *kms);
183irqreturn_t sde_irq(struct msm_kms *kms);
Ben Chan78647cd2016-06-26 22:02:47 -0400184
185/**
186 * sde_set_irqmask - IRQ helper function for writing IRQ mask
187 * to SDE HW interrupt register.
188 * @sde_kms: SDE handle
189 * @reg_off: SDE HW interrupt register offset
190 * @irqmask: IRQ mask
191 */
192void sde_set_irqmask(
193 struct sde_kms *sde_kms,
194 uint32_t reg_off,
195 uint32_t irqmask);
196
197/**
198 * sde_irq_idx_lookup - IRQ helper function for lookup irq_idx from HW
199 * interrupt mapping table.
200 * @sde_kms: SDE handle
201 * @intr_type: SDE HW interrupt type for lookup
202 * @instance_idx: SDE HW block instance defined in sde_hw_mdss.h
203 * @return: irq_idx or -EINVAL when fail to lookup
204 */
205int sde_irq_idx_lookup(
206 struct sde_kms *sde_kms,
207 enum sde_intr_type intr_type,
208 uint32_t instance_idx);
209
210/**
211 * sde_enable_irq - IRQ helper function for enabling one or more IRQs
212 * @sde_kms: SDE handle
213 * @irq_idxs: Array of irq index
214 * @irq_count: Number of irq_idx provided in the array
215 * @return: 0 for success enabling IRQ, otherwise failure
216 */
217int sde_enable_irq(
218 struct sde_kms *sde_kms,
219 int *irq_idxs,
220 uint32_t irq_count);
221
222/**
223 * sde_disable_irq - IRQ helper function for diabling one of more IRQs
224 * @sde_kms: SDE handle
225 * @irq_idxs: Array of irq index
226 * @irq_count: Number of irq_idx provided in the array
227 * @return: 0 for success disabling IRQ, otherwise failure
228 */
229int sde_disable_irq(
230 struct sde_kms *sde_kms,
231 int *irq_idxs,
232 uint32_t irq_count);
233
234/**
235 * sde_register_irq_callback - For registering callback function on IRQ
236 * interrupt
237 * @sde_kms: SDE handle
238 * @irq_idx: irq index
239 * @irq_cb: IRQ callback structure, containing callback function
240 * and argument. Passing NULL for irq_cb will unregister
241 * the callback for the given irq_idx
242 * @return: 0 for success registering callback, otherwise failure
243 */
244int sde_register_irq_callback(
245 struct sde_kms *sde_kms,
246 int irq_idx,
247 struct sde_irq_callback *irq_cb);
248
249/**
250 * sde_clear_all_irqs - Clearing all SDE IRQ interrupt status
251 * @sde_kms: SDE handle
252 */
253void sde_clear_all_irqs(struct sde_kms *sde_kms);
254
255/**
256 * sde_disable_all_irqs - Diabling all SDE IRQ interrupt
257 * @sde_kms: SDE handle
258 */
259void sde_disable_all_irqs(struct sde_kms *sde_kms);
260
261/**
262 * Vblank enable/disable functions
263 */
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700264int sde_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
265void sde_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
266
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400267/**
268 * Plane functions
269 */
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700270enum sde_sspp sde_plane_pipe(struct drm_plane *plane);
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400271struct drm_plane *sde_plane_init(struct drm_device *dev, uint32_t pipe,
272 bool private_plane);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700273
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400274/**
275 * CRTC functions
276 */
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700277uint32_t sde_crtc_vblank(struct drm_crtc *crtc);
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400278void sde_crtc_wait_for_commit_done(struct drm_crtc *crtc);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700279void sde_crtc_cancel_pending_flip(struct drm_crtc *crtc, struct drm_file *file);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700280struct drm_crtc *sde_crtc_init(struct drm_device *dev,
281 struct drm_encoder *encoder,
282 struct drm_plane *plane, int id);
283
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400284/**
285 * Encoder functions and data types
286 */
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400287struct sde_encoder_hw_resources {
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400288 enum sde_intf_mode intfs[INTF_MAX];
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400289 bool pingpongs[PINGPONG_MAX];
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400290 bool ctls[CTL_MAX];
291 bool pingpongsplit;
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400292};
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400293
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400294void sde_encoder_get_hw_resources(struct drm_encoder *encoder,
295 struct sde_encoder_hw_resources *hw_res);
296void sde_encoder_register_vblank_callback(struct drm_encoder *drm_enc,
297 void (*cb)(void *), void *data);
298void sde_encoders_init(struct drm_device *dev);
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400299void sde_encoder_get_vsync_info(struct drm_encoder *encoder,
300 struct vsync_info *vsync);
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400301
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700302
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700303
304#endif /* __sde_kms_H__ */