Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel 10 Gigabit PCI Express Linux driver |
Don Skidmore | 434c5e3 | 2013-01-08 05:02:28 +0000 | [diff] [blame] | 4 | Copyright(c) 1999 - 2013 Intel Corporation. |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 25 | |
| 26 | *******************************************************************************/ |
| 27 | |
| 28 | #include <linux/pci.h> |
| 29 | #include <linux/delay.h> |
Mark Rustad | b12babd | 2014-01-14 18:53:16 -0800 | [diff] [blame] | 30 | #include "ixgbe.h" |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 31 | #include "ixgbe_mbx.h" |
| 32 | |
| 33 | /** |
| 34 | * ixgbe_read_mbx - Reads a message from the mailbox |
| 35 | * @hw: pointer to the HW structure |
| 36 | * @msg: The message buffer |
| 37 | * @size: Length of buffer |
| 38 | * @mbx_id: id of mailbox to read |
| 39 | * |
Joe Perches | bfb9035 | 2011-08-17 06:58:04 -0700 | [diff] [blame] | 40 | * returns SUCCESS if it successfully read message from buffer |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 41 | **/ |
| 42 | s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) |
| 43 | { |
| 44 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 45 | s32 ret_val = IXGBE_ERR_MBX; |
| 46 | |
| 47 | /* limit read to size of mailbox */ |
| 48 | if (size > mbx->size) |
| 49 | size = mbx->size; |
| 50 | |
| 51 | if (mbx->ops.read) |
| 52 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); |
| 53 | |
| 54 | return ret_val; |
| 55 | } |
| 56 | |
| 57 | /** |
| 58 | * ixgbe_write_mbx - Write a message to the mailbox |
| 59 | * @hw: pointer to the HW structure |
| 60 | * @msg: The message buffer |
| 61 | * @size: Length of buffer |
| 62 | * @mbx_id: id of mailbox to write |
| 63 | * |
| 64 | * returns SUCCESS if it successfully copied message into the buffer |
| 65 | **/ |
| 66 | s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) |
| 67 | { |
| 68 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 69 | s32 ret_val = 0; |
| 70 | |
| 71 | if (size > mbx->size) |
| 72 | ret_val = IXGBE_ERR_MBX; |
| 73 | |
| 74 | else if (mbx->ops.write) |
| 75 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); |
| 76 | |
| 77 | return ret_val; |
| 78 | } |
| 79 | |
| 80 | /** |
| 81 | * ixgbe_check_for_msg - checks to see if someone sent us mail |
| 82 | * @hw: pointer to the HW structure |
| 83 | * @mbx_id: id of mailbox to check |
| 84 | * |
| 85 | * returns SUCCESS if the Status bit was found or else ERR_MBX |
| 86 | **/ |
| 87 | s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id) |
| 88 | { |
| 89 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 90 | s32 ret_val = IXGBE_ERR_MBX; |
| 91 | |
| 92 | if (mbx->ops.check_for_msg) |
| 93 | ret_val = mbx->ops.check_for_msg(hw, mbx_id); |
| 94 | |
| 95 | return ret_val; |
| 96 | } |
| 97 | |
| 98 | /** |
| 99 | * ixgbe_check_for_ack - checks to see if someone sent us ACK |
| 100 | * @hw: pointer to the HW structure |
| 101 | * @mbx_id: id of mailbox to check |
| 102 | * |
| 103 | * returns SUCCESS if the Status bit was found or else ERR_MBX |
| 104 | **/ |
| 105 | s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id) |
| 106 | { |
| 107 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 108 | s32 ret_val = IXGBE_ERR_MBX; |
| 109 | |
| 110 | if (mbx->ops.check_for_ack) |
| 111 | ret_val = mbx->ops.check_for_ack(hw, mbx_id); |
| 112 | |
| 113 | return ret_val; |
| 114 | } |
| 115 | |
| 116 | /** |
| 117 | * ixgbe_check_for_rst - checks to see if other side has reset |
| 118 | * @hw: pointer to the HW structure |
| 119 | * @mbx_id: id of mailbox to check |
| 120 | * |
| 121 | * returns SUCCESS if the Status bit was found or else ERR_MBX |
| 122 | **/ |
| 123 | s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id) |
| 124 | { |
| 125 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 126 | s32 ret_val = IXGBE_ERR_MBX; |
| 127 | |
| 128 | if (mbx->ops.check_for_rst) |
| 129 | ret_val = mbx->ops.check_for_rst(hw, mbx_id); |
| 130 | |
| 131 | return ret_val; |
| 132 | } |
| 133 | |
| 134 | /** |
| 135 | * ixgbe_poll_for_msg - Wait for message notification |
| 136 | * @hw: pointer to the HW structure |
| 137 | * @mbx_id: id of mailbox to write |
| 138 | * |
| 139 | * returns SUCCESS if it successfully received a message notification |
| 140 | **/ |
| 141 | static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id) |
| 142 | { |
| 143 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 144 | int countdown = mbx->timeout; |
| 145 | |
| 146 | if (!countdown || !mbx->ops.check_for_msg) |
| 147 | goto out; |
| 148 | |
| 149 | while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) { |
| 150 | countdown--; |
| 151 | if (!countdown) |
| 152 | break; |
| 153 | udelay(mbx->usec_delay); |
| 154 | } |
| 155 | |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 156 | out: |
| 157 | return countdown ? 0 : IXGBE_ERR_MBX; |
| 158 | } |
| 159 | |
| 160 | /** |
| 161 | * ixgbe_poll_for_ack - Wait for message acknowledgement |
| 162 | * @hw: pointer to the HW structure |
| 163 | * @mbx_id: id of mailbox to write |
| 164 | * |
| 165 | * returns SUCCESS if it successfully received a message acknowledgement |
| 166 | **/ |
| 167 | static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id) |
| 168 | { |
| 169 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 170 | int countdown = mbx->timeout; |
| 171 | |
| 172 | if (!countdown || !mbx->ops.check_for_ack) |
| 173 | goto out; |
| 174 | |
| 175 | while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) { |
| 176 | countdown--; |
| 177 | if (!countdown) |
| 178 | break; |
| 179 | udelay(mbx->usec_delay); |
| 180 | } |
| 181 | |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 182 | out: |
| 183 | return countdown ? 0 : IXGBE_ERR_MBX; |
| 184 | } |
| 185 | |
| 186 | /** |
| 187 | * ixgbe_read_posted_mbx - Wait for message notification and receive message |
| 188 | * @hw: pointer to the HW structure |
| 189 | * @msg: The message buffer |
| 190 | * @size: Length of buffer |
| 191 | * @mbx_id: id of mailbox to write |
| 192 | * |
| 193 | * returns SUCCESS if it successfully received a message notification and |
| 194 | * copied it into the receive buffer. |
| 195 | **/ |
Emil Tantilov | 5d5b7c3 | 2010-10-12 22:20:59 +0000 | [diff] [blame] | 196 | static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, |
| 197 | u16 mbx_id) |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 198 | { |
| 199 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 200 | s32 ret_val = IXGBE_ERR_MBX; |
| 201 | |
| 202 | if (!mbx->ops.read) |
| 203 | goto out; |
| 204 | |
| 205 | ret_val = ixgbe_poll_for_msg(hw, mbx_id); |
| 206 | |
| 207 | /* if ack received read message, otherwise we timed out */ |
| 208 | if (!ret_val) |
| 209 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); |
| 210 | out: |
| 211 | return ret_val; |
| 212 | } |
| 213 | |
| 214 | /** |
| 215 | * ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack |
| 216 | * @hw: pointer to the HW structure |
| 217 | * @msg: The message buffer |
| 218 | * @size: Length of buffer |
| 219 | * @mbx_id: id of mailbox to write |
| 220 | * |
| 221 | * returns SUCCESS if it successfully copied message into the buffer and |
| 222 | * received an ack to that message within delay * timeout period |
| 223 | **/ |
Emil Tantilov | 5d5b7c3 | 2010-10-12 22:20:59 +0000 | [diff] [blame] | 224 | static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 225 | u16 mbx_id) |
| 226 | { |
| 227 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 228 | s32 ret_val = IXGBE_ERR_MBX; |
| 229 | |
| 230 | /* exit if either we can't write or there isn't a defined timeout */ |
| 231 | if (!mbx->ops.write || !mbx->timeout) |
| 232 | goto out; |
| 233 | |
| 234 | /* send msg */ |
| 235 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); |
| 236 | |
| 237 | /* if msg sent wait until we receive an ack */ |
| 238 | if (!ret_val) |
| 239 | ret_val = ixgbe_poll_for_ack(hw, mbx_id); |
| 240 | out: |
| 241 | return ret_val; |
| 242 | } |
| 243 | |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 244 | static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) |
| 245 | { |
| 246 | u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index)); |
| 247 | s32 ret_val = IXGBE_ERR_MBX; |
| 248 | |
| 249 | if (mbvficr & mask) { |
| 250 | ret_val = 0; |
| 251 | IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask); |
| 252 | } |
| 253 | |
| 254 | return ret_val; |
| 255 | } |
| 256 | |
| 257 | /** |
| 258 | * ixgbe_check_for_msg_pf - checks to see if the VF has sent mail |
| 259 | * @hw: pointer to the HW structure |
| 260 | * @vf_number: the VF index |
| 261 | * |
| 262 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX |
| 263 | **/ |
| 264 | static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number) |
| 265 | { |
| 266 | s32 ret_val = IXGBE_ERR_MBX; |
| 267 | s32 index = IXGBE_MBVFICR_INDEX(vf_number); |
| 268 | u32 vf_bit = vf_number % 16; |
| 269 | |
| 270 | if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit, |
| 271 | index)) { |
| 272 | ret_val = 0; |
| 273 | hw->mbx.stats.reqs++; |
| 274 | } |
| 275 | |
| 276 | return ret_val; |
| 277 | } |
| 278 | |
| 279 | /** |
| 280 | * ixgbe_check_for_ack_pf - checks to see if the VF has ACKed |
| 281 | * @hw: pointer to the HW structure |
| 282 | * @vf_number: the VF index |
| 283 | * |
| 284 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX |
| 285 | **/ |
| 286 | static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number) |
| 287 | { |
| 288 | s32 ret_val = IXGBE_ERR_MBX; |
| 289 | s32 index = IXGBE_MBVFICR_INDEX(vf_number); |
| 290 | u32 vf_bit = vf_number % 16; |
| 291 | |
| 292 | if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit, |
| 293 | index)) { |
| 294 | ret_val = 0; |
| 295 | hw->mbx.stats.acks++; |
| 296 | } |
| 297 | |
| 298 | return ret_val; |
| 299 | } |
| 300 | |
| 301 | /** |
| 302 | * ixgbe_check_for_rst_pf - checks to see if the VF has reset |
| 303 | * @hw: pointer to the HW structure |
| 304 | * @vf_number: the VF index |
| 305 | * |
| 306 | * returns SUCCESS if the VF has set the Status bit or else ERR_MBX |
| 307 | **/ |
| 308 | static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number) |
| 309 | { |
| 310 | u32 reg_offset = (vf_number < 32) ? 0 : 1; |
| 311 | u32 vf_shift = vf_number % 32; |
| 312 | u32 vflre = 0; |
| 313 | s32 ret_val = IXGBE_ERR_MBX; |
| 314 | |
Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 315 | switch (hw->mac.type) { |
| 316 | case ixgbe_mac_82599EB: |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 317 | vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); |
Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 318 | break; |
Greg Rose | 3377eba79 | 2010-12-07 08:16:45 +0000 | [diff] [blame] | 319 | case ixgbe_mac_X540: |
| 320 | vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset)); |
| 321 | break; |
Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 322 | default: |
| 323 | break; |
| 324 | } |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 325 | |
| 326 | if (vflre & (1 << vf_shift)) { |
| 327 | ret_val = 0; |
| 328 | IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift)); |
| 329 | hw->mbx.stats.rsts++; |
| 330 | } |
| 331 | |
| 332 | return ret_val; |
| 333 | } |
| 334 | |
| 335 | /** |
| 336 | * ixgbe_obtain_mbx_lock_pf - obtain mailbox lock |
| 337 | * @hw: pointer to the HW structure |
| 338 | * @vf_number: the VF index |
| 339 | * |
| 340 | * return SUCCESS if we obtained the mailbox lock |
| 341 | **/ |
| 342 | static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number) |
| 343 | { |
| 344 | s32 ret_val = IXGBE_ERR_MBX; |
| 345 | u32 p2v_mailbox; |
| 346 | |
| 347 | /* Take ownership of the buffer */ |
| 348 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU); |
| 349 | |
| 350 | /* reserve mailbox for vf use */ |
| 351 | p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number)); |
| 352 | if (p2v_mailbox & IXGBE_PFMAILBOX_PFU) |
| 353 | ret_val = 0; |
| 354 | |
| 355 | return ret_val; |
| 356 | } |
| 357 | |
| 358 | /** |
| 359 | * ixgbe_write_mbx_pf - Places a message in the mailbox |
| 360 | * @hw: pointer to the HW structure |
| 361 | * @msg: The message buffer |
| 362 | * @size: Length of buffer |
| 363 | * @vf_number: the VF index |
| 364 | * |
| 365 | * returns SUCCESS if it successfully copied message into the buffer |
| 366 | **/ |
| 367 | static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, |
| 368 | u16 vf_number) |
| 369 | { |
| 370 | s32 ret_val; |
| 371 | u16 i; |
| 372 | |
| 373 | /* lock the mailbox to prevent pf/vf race condition */ |
| 374 | ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number); |
| 375 | if (ret_val) |
| 376 | goto out_no_write; |
| 377 | |
| 378 | /* flush msg and acks as we are overwriting the message buffer */ |
| 379 | ixgbe_check_for_msg_pf(hw, vf_number); |
| 380 | ixgbe_check_for_ack_pf(hw, vf_number); |
| 381 | |
| 382 | /* copy the caller specified message to the mailbox memory buffer */ |
| 383 | for (i = 0; i < size; i++) |
| 384 | IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]); |
| 385 | |
| 386 | /* Interrupt VF to tell it a message has been sent and release buffer*/ |
| 387 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS); |
| 388 | |
| 389 | /* update stats */ |
| 390 | hw->mbx.stats.msgs_tx++; |
| 391 | |
| 392 | out_no_write: |
| 393 | return ret_val; |
| 394 | |
| 395 | } |
| 396 | |
| 397 | /** |
| 398 | * ixgbe_read_mbx_pf - Read a message from the mailbox |
| 399 | * @hw: pointer to the HW structure |
| 400 | * @msg: The message buffer |
| 401 | * @size: Length of buffer |
| 402 | * @vf_number: the VF index |
| 403 | * |
| 404 | * This function copies a message from the mailbox buffer to the caller's |
| 405 | * memory buffer. The presumption is that the caller knows that there was |
| 406 | * a message due to a VF request so no polling for message is needed. |
| 407 | **/ |
| 408 | static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, |
| 409 | u16 vf_number) |
| 410 | { |
| 411 | s32 ret_val; |
| 412 | u16 i; |
| 413 | |
| 414 | /* lock the mailbox to prevent pf/vf race condition */ |
| 415 | ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number); |
| 416 | if (ret_val) |
| 417 | goto out_no_read; |
| 418 | |
| 419 | /* copy the message to the mailbox memory buffer */ |
| 420 | for (i = 0; i < size; i++) |
| 421 | msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i); |
| 422 | |
| 423 | /* Acknowledge the message and release buffer */ |
| 424 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK); |
| 425 | |
| 426 | /* update stats */ |
| 427 | hw->mbx.stats.msgs_rx++; |
| 428 | |
| 429 | out_no_read: |
| 430 | return ret_val; |
| 431 | } |
| 432 | |
Don Skidmore | 8fecce6 | 2011-01-28 02:28:36 +0000 | [diff] [blame] | 433 | #ifdef CONFIG_PCI_IOV |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 434 | /** |
| 435 | * ixgbe_init_mbx_params_pf - set initial values for pf mailbox |
| 436 | * @hw: pointer to the HW structure |
| 437 | * |
| 438 | * Initializes the hw->mbx struct to correct values for pf mailbox |
| 439 | */ |
| 440 | void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw) |
| 441 | { |
| 442 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 443 | |
Emil Tantilov | d7c8a29 | 2011-03-03 09:25:02 +0000 | [diff] [blame] | 444 | if (hw->mac.type != ixgbe_mac_82599EB && |
| 445 | hw->mac.type != ixgbe_mac_X540) |
| 446 | return; |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 447 | |
Emil Tantilov | d7c8a29 | 2011-03-03 09:25:02 +0000 | [diff] [blame] | 448 | mbx->timeout = 0; |
Andy Gospodarek | 5217e87 | 2011-03-08 14:26:00 -0800 | [diff] [blame] | 449 | mbx->usec_delay = 0; |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 450 | |
Emil Tantilov | d7c8a29 | 2011-03-03 09:25:02 +0000 | [diff] [blame] | 451 | mbx->stats.msgs_tx = 0; |
| 452 | mbx->stats.msgs_rx = 0; |
| 453 | mbx->stats.reqs = 0; |
| 454 | mbx->stats.acks = 0; |
| 455 | mbx->stats.rsts = 0; |
| 456 | |
| 457 | mbx->size = IXGBE_VFMAILBOX_SIZE; |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 458 | } |
Don Skidmore | 8fecce6 | 2011-01-28 02:28:36 +0000 | [diff] [blame] | 459 | #endif /* CONFIG_PCI_IOV */ |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 460 | |
Don Skidmore | a391f1d | 2010-11-16 19:27:15 -0800 | [diff] [blame] | 461 | struct ixgbe_mbx_operations mbx_ops_generic = { |
Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 462 | .read = ixgbe_read_mbx_pf, |
| 463 | .write = ixgbe_write_mbx_pf, |
| 464 | .read_posted = ixgbe_read_posted_mbx, |
| 465 | .write_posted = ixgbe_write_posted_mbx, |
| 466 | .check_for_msg = ixgbe_check_for_msg_pf, |
| 467 | .check_for_ack = ixgbe_check_for_ack_pf, |
| 468 | .check_for_rst = ixgbe_check_for_rst_pf, |
| 469 | }; |
| 470 | |