George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
Larry Finger | c1d6604 | 2012-01-07 20:46:45 -0600 | [diff] [blame] | 3 | * Copyright(c) 2009-2012 Realtek Corporation. |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of version 2 of the GNU General Public License as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., |
| 16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 17 | * |
| 18 | * The full GNU General Public License is included in this distribution in the |
| 19 | * file called LICENSE. |
| 20 | * |
| 21 | * Contact Information: |
| 22 | * wlanfae <wlanfae@realtek.com> |
| 23 | * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, |
| 24 | * Hsinchu 300, Taiwan. |
| 25 | * |
| 26 | * Larry Finger <Larry.Finger@lwfinger.net> |
| 27 | * |
| 28 | *****************************************************************************/ |
| 29 | |
| 30 | #include "../wifi.h" |
| 31 | #include "../pci.h" |
| 32 | #include "../ps.h" |
| 33 | #include "reg.h" |
| 34 | #include "def.h" |
| 35 | #include "phy.h" |
| 36 | #include "rf.h" |
| 37 | #include "dm.h" |
| 38 | #include "table.h" |
| 39 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 40 | u32 rtl92cu_phy_query_rf_reg(struct ieee80211_hw *hw, |
Larry Finger | d3bb142 | 2011-04-25 13:23:20 -0500 | [diff] [blame] | 41 | enum radio_path rfpath, u32 regaddr, u32 bitmask) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 42 | { |
| 43 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 44 | u32 original_value, readback_value, bitshift; |
| 45 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 46 | |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 47 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
| 48 | "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n", |
| 49 | regaddr, rfpath, bitmask); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 50 | if (rtlphy->rf_mode != RF_OP_BY_FW) { |
| 51 | original_value = _rtl92c_phy_rf_serial_read(hw, |
| 52 | rfpath, regaddr); |
| 53 | } else { |
| 54 | original_value = _rtl92c_phy_fw_rf_serial_read(hw, |
| 55 | rfpath, regaddr); |
| 56 | } |
| 57 | bitshift = _rtl92c_phy_calculate_bit_shift(bitmask); |
| 58 | readback_value = (original_value & bitmask) >> bitshift; |
| 59 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 60 | "regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n", |
| 61 | regaddr, rfpath, bitmask, original_value); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 62 | return readback_value; |
| 63 | } |
| 64 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 65 | void rtl92cu_phy_set_rf_reg(struct ieee80211_hw *hw, |
Larry Finger | d3bb142 | 2011-04-25 13:23:20 -0500 | [diff] [blame] | 66 | enum radio_path rfpath, |
| 67 | u32 regaddr, u32 bitmask, u32 data) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 68 | { |
| 69 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 70 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 71 | u32 original_value, bitshift; |
| 72 | |
| 73 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 74 | "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", |
| 75 | regaddr, bitmask, data, rfpath); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 76 | if (rtlphy->rf_mode != RF_OP_BY_FW) { |
| 77 | if (bitmask != RFREG_OFFSET_MASK) { |
| 78 | original_value = _rtl92c_phy_rf_serial_read(hw, |
| 79 | rfpath, |
| 80 | regaddr); |
| 81 | bitshift = _rtl92c_phy_calculate_bit_shift(bitmask); |
| 82 | data = |
| 83 | ((original_value & (~bitmask)) | |
| 84 | (data << bitshift)); |
| 85 | } |
| 86 | _rtl92c_phy_rf_serial_write(hw, rfpath, regaddr, data); |
| 87 | } else { |
| 88 | if (bitmask != RFREG_OFFSET_MASK) { |
| 89 | original_value = _rtl92c_phy_fw_rf_serial_read(hw, |
| 90 | rfpath, |
| 91 | regaddr); |
| 92 | bitshift = _rtl92c_phy_calculate_bit_shift(bitmask); |
| 93 | data = |
| 94 | ((original_value & (~bitmask)) | |
| 95 | (data << bitshift)); |
| 96 | } |
| 97 | _rtl92c_phy_fw_rf_serial_write(hw, rfpath, regaddr, data); |
| 98 | } |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 99 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
| 100 | "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", |
| 101 | regaddr, bitmask, data, rfpath); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 102 | } |
| 103 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 104 | bool rtl92cu_phy_mac_config(struct ieee80211_hw *hw) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 105 | { |
| 106 | bool rtstatus; |
| 107 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 108 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 109 | bool is92c = IS_92C_SERIAL(rtlhal->version); |
| 110 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 111 | rtstatus = _rtl92cu_phy_config_mac_with_headerfile(hw); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 112 | if (is92c && IS_HARDWARE_TYPE_8192CE(rtlhal)) |
| 113 | rtl_write_byte(rtlpriv, 0x14, 0x71); |
| 114 | return rtstatus; |
| 115 | } |
| 116 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 117 | bool rtl92cu_phy_bb_config(struct ieee80211_hw *hw) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 118 | { |
| 119 | bool rtstatus = true; |
| 120 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 121 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 122 | u16 regval; |
Mark Cave-Ayland | 8a71920 | 2013-11-18 13:06:56 -0600 | [diff] [blame] | 123 | u32 regval32; |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 124 | u8 b_reg_hwparafile = 1; |
| 125 | |
| 126 | _rtl92c_phy_init_bb_rf_register_definition(hw); |
| 127 | regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); |
| 128 | rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, regval | BIT(13) | |
| 129 | BIT(0) | BIT(1)); |
| 130 | rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x83); |
| 131 | rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL + 1, 0xdb); |
| 132 | rtl_write_byte(rtlpriv, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB); |
| 133 | if (IS_HARDWARE_TYPE_8192CE(rtlhal)) { |
| 134 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, FEN_PPLL | FEN_PCIEA | |
| 135 | FEN_DIO_PCIE | FEN_BB_GLB_RSTn | FEN_BBRSTB); |
| 136 | } else if (IS_HARDWARE_TYPE_8192CU(rtlhal)) { |
| 137 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | |
| 138 | FEN_BB_GLB_RSTn | FEN_BBRSTB); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 139 | } |
Mark Cave-Ayland | 8a71920 | 2013-11-18 13:06:56 -0600 | [diff] [blame] | 140 | regval32 = rtl_read_dword(rtlpriv, 0x87c); |
| 141 | rtl_write_dword(rtlpriv, 0x87c, regval32 & (~BIT(31))); |
| 142 | if (IS_HARDWARE_TYPE_8192CU(rtlhal)) |
| 143 | rtl_write_byte(rtlpriv, REG_LDOHCI12_CTRL, 0x0f); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 144 | rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); |
| 145 | if (b_reg_hwparafile == 1) |
| 146 | rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw); |
| 147 | return rtstatus; |
| 148 | } |
| 149 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 150 | bool _rtl92cu_phy_config_mac_with_headerfile(struct ieee80211_hw *hw) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 151 | { |
| 152 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 153 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 154 | u32 i; |
| 155 | u32 arraylength; |
| 156 | u32 *ptrarray; |
| 157 | |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 158 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl819XMACPHY_Array\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 159 | arraylength = rtlphy->hwparam_tables[MAC_REG].length ; |
| 160 | ptrarray = rtlphy->hwparam_tables[MAC_REG].pdata; |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 161 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Img:RTL8192CEMAC_2T_ARRAY\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 162 | for (i = 0; i < arraylength; i = i + 2) |
| 163 | rtl_write_byte(rtlpriv, ptrarray[i], (u8) ptrarray[i + 1]); |
| 164 | return true; |
| 165 | } |
| 166 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 167 | bool _rtl92cu_phy_config_bb_with_headerfile(struct ieee80211_hw *hw, |
Larry Finger | d3bb142 | 2011-04-25 13:23:20 -0500 | [diff] [blame] | 168 | u8 configtype) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 169 | { |
| 170 | int i; |
| 171 | u32 *phy_regarray_table; |
| 172 | u32 *agctab_array_table; |
| 173 | u16 phy_reg_arraylen, agctab_arraylen; |
| 174 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 175 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 176 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 177 | |
| 178 | if (IS_92C_SERIAL(rtlhal->version)) { |
| 179 | agctab_arraylen = rtlphy->hwparam_tables[AGCTAB_2T].length; |
| 180 | agctab_array_table = rtlphy->hwparam_tables[AGCTAB_2T].pdata; |
| 181 | phy_reg_arraylen = rtlphy->hwparam_tables[PHY_REG_2T].length; |
| 182 | phy_regarray_table = rtlphy->hwparam_tables[PHY_REG_2T].pdata; |
| 183 | } else { |
| 184 | agctab_arraylen = rtlphy->hwparam_tables[AGCTAB_1T].length; |
| 185 | agctab_array_table = rtlphy->hwparam_tables[AGCTAB_1T].pdata; |
| 186 | phy_reg_arraylen = rtlphy->hwparam_tables[PHY_REG_1T].length; |
| 187 | phy_regarray_table = rtlphy->hwparam_tables[PHY_REG_1T].pdata; |
| 188 | } |
| 189 | if (configtype == BASEBAND_CONFIG_PHY_REG) { |
| 190 | for (i = 0; i < phy_reg_arraylen; i = i + 2) { |
| 191 | if (phy_regarray_table[i] == 0xfe) |
| 192 | mdelay(50); |
| 193 | else if (phy_regarray_table[i] == 0xfd) |
| 194 | mdelay(5); |
| 195 | else if (phy_regarray_table[i] == 0xfc) |
| 196 | mdelay(1); |
| 197 | else if (phy_regarray_table[i] == 0xfb) |
| 198 | udelay(50); |
| 199 | else if (phy_regarray_table[i] == 0xfa) |
| 200 | udelay(5); |
| 201 | else if (phy_regarray_table[i] == 0xf9) |
| 202 | udelay(1); |
| 203 | rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD, |
| 204 | phy_regarray_table[i + 1]); |
| 205 | udelay(1); |
| 206 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 207 | "The phy_regarray_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n", |
| 208 | phy_regarray_table[i], |
| 209 | phy_regarray_table[i + 1]); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 210 | } |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 211 | } else if (configtype == BASEBAND_CONFIG_AGC_TAB) { |
| 212 | for (i = 0; i < agctab_arraylen; i = i + 2) { |
| 213 | rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD, |
| 214 | agctab_array_table[i + 1]); |
| 215 | udelay(1); |
| 216 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 217 | "The agctab_array_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n", |
| 218 | agctab_array_table[i], |
| 219 | agctab_array_table[i + 1]); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 220 | } |
| 221 | } |
| 222 | return true; |
| 223 | } |
| 224 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 225 | bool _rtl92cu_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw, |
Larry Finger | d3bb142 | 2011-04-25 13:23:20 -0500 | [diff] [blame] | 226 | u8 configtype) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 227 | { |
| 228 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 229 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 230 | int i; |
| 231 | u32 *phy_regarray_table_pg; |
| 232 | u16 phy_regarray_pg_len; |
| 233 | |
| 234 | rtlphy->pwrgroup_cnt = 0; |
| 235 | phy_regarray_pg_len = rtlphy->hwparam_tables[PHY_REG_PG].length; |
| 236 | phy_regarray_table_pg = rtlphy->hwparam_tables[PHY_REG_PG].pdata; |
| 237 | if (configtype == BASEBAND_CONFIG_PHY_REG) { |
| 238 | for (i = 0; i < phy_regarray_pg_len; i = i + 3) { |
| 239 | if (phy_regarray_table_pg[i] == 0xfe) |
| 240 | mdelay(50); |
| 241 | else if (phy_regarray_table_pg[i] == 0xfd) |
| 242 | mdelay(5); |
| 243 | else if (phy_regarray_table_pg[i] == 0xfc) |
| 244 | mdelay(1); |
| 245 | else if (phy_regarray_table_pg[i] == 0xfb) |
| 246 | udelay(50); |
| 247 | else if (phy_regarray_table_pg[i] == 0xfa) |
| 248 | udelay(5); |
| 249 | else if (phy_regarray_table_pg[i] == 0xf9) |
| 250 | udelay(1); |
| 251 | _rtl92c_store_pwrIndex_diffrate_offset(hw, |
| 252 | phy_regarray_table_pg[i], |
| 253 | phy_regarray_table_pg[i + 1], |
| 254 | phy_regarray_table_pg[i + 2]); |
| 255 | } |
| 256 | } else { |
| 257 | RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 258 | "configtype != BaseBand_Config_PHY_REG\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 259 | } |
| 260 | return true; |
| 261 | } |
| 262 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 263 | bool rtl92cu_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 264 | enum radio_path rfpath) |
| 265 | { |
| 266 | int i; |
| 267 | u32 *radioa_array_table; |
| 268 | u32 *radiob_array_table; |
| 269 | u16 radioa_arraylen, radiob_arraylen; |
| 270 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 271 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 272 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 273 | |
| 274 | if (IS_92C_SERIAL(rtlhal->version)) { |
| 275 | radioa_arraylen = rtlphy->hwparam_tables[RADIOA_2T].length; |
| 276 | radioa_array_table = rtlphy->hwparam_tables[RADIOA_2T].pdata; |
| 277 | radiob_arraylen = rtlphy->hwparam_tables[RADIOB_2T].length; |
| 278 | radiob_array_table = rtlphy->hwparam_tables[RADIOB_2T].pdata; |
| 279 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 280 | "Radio_A:RTL8192CERADIOA_2TARRAY\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 281 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 282 | "Radio_B:RTL8192CE_RADIOB_2TARRAY\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 283 | } else { |
| 284 | radioa_arraylen = rtlphy->hwparam_tables[RADIOA_1T].length; |
| 285 | radioa_array_table = rtlphy->hwparam_tables[RADIOA_1T].pdata; |
| 286 | radiob_arraylen = rtlphy->hwparam_tables[RADIOB_1T].length; |
| 287 | radiob_array_table = rtlphy->hwparam_tables[RADIOB_1T].pdata; |
| 288 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 289 | "Radio_A:RTL8192CE_RADIOA_1TARRAY\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 290 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 291 | "Radio_B:RTL8192CE_RADIOB_1TARRAY\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 292 | } |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 293 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Radio No %x\n", rfpath); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 294 | switch (rfpath) { |
| 295 | case RF90_PATH_A: |
| 296 | for (i = 0; i < radioa_arraylen; i = i + 2) { |
| 297 | if (radioa_array_table[i] == 0xfe) |
| 298 | mdelay(50); |
| 299 | else if (radioa_array_table[i] == 0xfd) |
| 300 | mdelay(5); |
| 301 | else if (radioa_array_table[i] == 0xfc) |
| 302 | mdelay(1); |
| 303 | else if (radioa_array_table[i] == 0xfb) |
| 304 | udelay(50); |
| 305 | else if (radioa_array_table[i] == 0xfa) |
| 306 | udelay(5); |
| 307 | else if (radioa_array_table[i] == 0xf9) |
| 308 | udelay(1); |
| 309 | else { |
| 310 | rtl_set_rfreg(hw, rfpath, radioa_array_table[i], |
| 311 | RFREG_OFFSET_MASK, |
| 312 | radioa_array_table[i + 1]); |
| 313 | udelay(1); |
| 314 | } |
| 315 | } |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 316 | break; |
| 317 | case RF90_PATH_B: |
| 318 | for (i = 0; i < radiob_arraylen; i = i + 2) { |
| 319 | if (radiob_array_table[i] == 0xfe) { |
| 320 | mdelay(50); |
| 321 | } else if (radiob_array_table[i] == 0xfd) |
| 322 | mdelay(5); |
| 323 | else if (radiob_array_table[i] == 0xfc) |
| 324 | mdelay(1); |
| 325 | else if (radiob_array_table[i] == 0xfb) |
| 326 | udelay(50); |
| 327 | else if (radiob_array_table[i] == 0xfa) |
| 328 | udelay(5); |
| 329 | else if (radiob_array_table[i] == 0xf9) |
| 330 | udelay(1); |
| 331 | else { |
| 332 | rtl_set_rfreg(hw, rfpath, radiob_array_table[i], |
| 333 | RFREG_OFFSET_MASK, |
| 334 | radiob_array_table[i + 1]); |
| 335 | udelay(1); |
| 336 | } |
| 337 | } |
| 338 | break; |
| 339 | case RF90_PATH_C: |
| 340 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 341 | "switch case not processed\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 342 | break; |
| 343 | case RF90_PATH_D: |
| 344 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 345 | "switch case not processed\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 346 | break; |
| 347 | } |
| 348 | return true; |
| 349 | } |
| 350 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 351 | void rtl92cu_phy_set_bw_mode_callback(struct ieee80211_hw *hw) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 352 | { |
| 353 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 354 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 355 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 356 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
| 357 | u8 reg_bw_opmode; |
| 358 | u8 reg_prsr_rsc; |
| 359 | |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 360 | RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "Switch to %s bandwidth\n", |
| 361 | rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ? |
| 362 | "20MHz" : "40MHz"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 363 | if (is_hal_stop(rtlhal)) { |
| 364 | rtlphy->set_bwmode_inprogress = false; |
| 365 | return; |
| 366 | } |
| 367 | reg_bw_opmode = rtl_read_byte(rtlpriv, REG_BWOPMODE); |
| 368 | reg_prsr_rsc = rtl_read_byte(rtlpriv, REG_RRSR + 2); |
| 369 | switch (rtlphy->current_chan_bw) { |
| 370 | case HT_CHANNEL_WIDTH_20: |
| 371 | reg_bw_opmode |= BW_OPMODE_20MHZ; |
| 372 | rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); |
| 373 | break; |
| 374 | case HT_CHANNEL_WIDTH_20_40: |
| 375 | reg_bw_opmode &= ~BW_OPMODE_20MHZ; |
| 376 | rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); |
| 377 | reg_prsr_rsc = |
| 378 | (reg_prsr_rsc & 0x90) | (mac->cur_40_prime_sc << 5); |
| 379 | rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc); |
| 380 | break; |
| 381 | default: |
| 382 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 383 | "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 384 | break; |
| 385 | } |
| 386 | switch (rtlphy->current_chan_bw) { |
| 387 | case HT_CHANNEL_WIDTH_20: |
| 388 | rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0); |
| 389 | rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0); |
| 390 | rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1); |
| 391 | break; |
| 392 | case HT_CHANNEL_WIDTH_20_40: |
| 393 | rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1); |
| 394 | rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1); |
| 395 | rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND, |
| 396 | (mac->cur_40_prime_sc >> 1)); |
| 397 | rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc); |
| 398 | rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0); |
| 399 | rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)), |
| 400 | (mac->cur_40_prime_sc == |
| 401 | HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); |
| 402 | break; |
| 403 | default: |
| 404 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 405 | "unknown bandwidth: %#X\n", rtlphy->current_chan_bw); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 406 | break; |
| 407 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 408 | rtl92cu_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 409 | rtlphy->set_bwmode_inprogress = false; |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 410 | RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "<==\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 411 | } |
| 412 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 413 | void rtl92cu_bb_block_on(struct ieee80211_hw *hw) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 414 | { |
| 415 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 416 | |
| 417 | mutex_lock(&rtlpriv->io.bb_mutex); |
| 418 | rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0x1); |
| 419 | rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0x1); |
| 420 | mutex_unlock(&rtlpriv->io.bb_mutex); |
| 421 | } |
| 422 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 423 | void _rtl92cu_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 424 | { |
| 425 | u8 tmpreg; |
| 426 | u32 rf_a_mode = 0, rf_b_mode = 0, lc_cal; |
| 427 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 428 | |
| 429 | tmpreg = rtl_read_byte(rtlpriv, 0xd03); |
| 430 | |
| 431 | if ((tmpreg & 0x70) != 0) |
| 432 | rtl_write_byte(rtlpriv, 0xd03, tmpreg & 0x8F); |
| 433 | else |
| 434 | rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); |
| 435 | |
| 436 | if ((tmpreg & 0x70) != 0) { |
| 437 | rf_a_mode = rtl_get_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS); |
| 438 | if (is2t) |
| 439 | rf_b_mode = rtl_get_rfreg(hw, RF90_PATH_B, 0x00, |
| 440 | MASK12BITS); |
| 441 | rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, |
| 442 | (rf_a_mode & 0x8FFFF) | 0x10000); |
| 443 | if (is2t) |
| 444 | rtl_set_rfreg(hw, RF90_PATH_B, 0x00, MASK12BITS, |
| 445 | (rf_b_mode & 0x8FFFF) | 0x10000); |
| 446 | } |
| 447 | lc_cal = rtl_get_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS); |
| 448 | rtl_set_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS, lc_cal | 0x08000); |
| 449 | mdelay(100); |
| 450 | if ((tmpreg & 0x70) != 0) { |
| 451 | rtl_write_byte(rtlpriv, 0xd03, tmpreg); |
| 452 | rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, rf_a_mode); |
| 453 | if (is2t) |
| 454 | rtl_set_rfreg(hw, RF90_PATH_B, 0x00, MASK12BITS, |
| 455 | rf_b_mode); |
| 456 | } else { |
| 457 | rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); |
| 458 | } |
| 459 | } |
| 460 | |
Larry Finger | d3bb142 | 2011-04-25 13:23:20 -0500 | [diff] [blame] | 461 | static bool _rtl92cu_phy_set_rf_power_state(struct ieee80211_hw *hw, |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 462 | enum rf_pwrstate rfpwr_state) |
| 463 | { |
| 464 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 465 | struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); |
| 466 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
| 467 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); |
| 468 | bool bresult = true; |
| 469 | u8 i, queue_id; |
| 470 | struct rtl8192_tx_ring *ring = NULL; |
| 471 | |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 472 | switch (rfpwr_state) { |
| 473 | case ERFON: |
| 474 | if ((ppsc->rfpwr_state == ERFOFF) && |
| 475 | RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC)) { |
| 476 | bool rtstatus; |
| 477 | u32 InitializeCount = 0; |
| 478 | |
| 479 | do { |
| 480 | InitializeCount++; |
| 481 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 482 | "IPS Set eRf nic enable\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 483 | rtstatus = rtl_ps_enable_nic(hw); |
Joe Perches | 23677ce | 2012-02-09 11:17:23 +0000 | [diff] [blame] | 484 | } while (!rtstatus && (InitializeCount < 10)); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 485 | RT_CLEAR_PS_LEVEL(ppsc, |
| 486 | RT_RF_OFF_LEVL_HALT_NIC); |
| 487 | } else { |
| 488 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 489 | "Set ERFON sleeped:%d ms\n", |
| 490 | jiffies_to_msecs(jiffies - |
| 491 | ppsc->last_sleep_jiffies)); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 492 | ppsc->last_awake_jiffies = jiffies; |
| 493 | rtl92ce_phy_set_rf_on(hw); |
| 494 | } |
| 495 | if (mac->link_state == MAC80211_LINKED) { |
| 496 | rtlpriv->cfg->ops->led_control(hw, |
| 497 | LED_CTL_LINK); |
| 498 | } else { |
| 499 | rtlpriv->cfg->ops->led_control(hw, |
| 500 | LED_CTL_NO_LINK); |
| 501 | } |
| 502 | break; |
| 503 | case ERFOFF: |
| 504 | for (queue_id = 0, i = 0; |
| 505 | queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) { |
| 506 | ring = &pcipriv->dev.tx_ring[queue_id]; |
| 507 | if (skb_queue_len(&ring->queue) == 0 || |
| 508 | queue_id == BEACON_QUEUE) { |
| 509 | queue_id++; |
| 510 | continue; |
| 511 | } else { |
| 512 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 513 | "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n", |
| 514 | i + 1, |
| 515 | queue_id, |
| 516 | skb_queue_len(&ring->queue)); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 517 | udelay(10); |
| 518 | i++; |
| 519 | } |
| 520 | if (i >= MAX_DOZE_WAITING_TIMES_9x) { |
| 521 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 522 | "ERFOFF: %d times TcbBusyQueue[%d] = %d !\n", |
| 523 | MAX_DOZE_WAITING_TIMES_9x, |
| 524 | queue_id, |
| 525 | skb_queue_len(&ring->queue)); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 526 | break; |
| 527 | } |
| 528 | } |
| 529 | if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) { |
| 530 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 531 | "IPS Set eRf nic disable\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 532 | rtl_ps_disable_nic(hw); |
| 533 | RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC); |
| 534 | } else { |
| 535 | if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS) { |
| 536 | rtlpriv->cfg->ops->led_control(hw, |
| 537 | LED_CTL_NO_LINK); |
| 538 | } else { |
| 539 | rtlpriv->cfg->ops->led_control(hw, |
| 540 | LED_CTL_POWER_OFF); |
| 541 | } |
| 542 | } |
| 543 | break; |
| 544 | case ERFSLEEP: |
| 545 | if (ppsc->rfpwr_state == ERFOFF) |
Philipp Dreimann | 91ddff8 | 2011-12-07 13:43:31 -0600 | [diff] [blame] | 546 | return false; |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 547 | for (queue_id = 0, i = 0; |
| 548 | queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) { |
| 549 | ring = &pcipriv->dev.tx_ring[queue_id]; |
| 550 | if (skb_queue_len(&ring->queue) == 0) { |
| 551 | queue_id++; |
| 552 | continue; |
| 553 | } else { |
| 554 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 555 | "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n", |
| 556 | i + 1, queue_id, |
| 557 | skb_queue_len(&ring->queue)); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 558 | udelay(10); |
| 559 | i++; |
| 560 | } |
| 561 | if (i >= MAX_DOZE_WAITING_TIMES_9x) { |
| 562 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 563 | "ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n", |
| 564 | MAX_DOZE_WAITING_TIMES_9x, |
| 565 | queue_id, |
| 566 | skb_queue_len(&ring->queue)); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 567 | break; |
| 568 | } |
| 569 | } |
| 570 | RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 571 | "Set ERFSLEEP awaked:%d ms\n", |
| 572 | jiffies_to_msecs(jiffies - ppsc->last_awake_jiffies)); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 573 | ppsc->last_sleep_jiffies = jiffies; |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 574 | _rtl92c_phy_set_rf_sleep(hw); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 575 | break; |
| 576 | default: |
| 577 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
Joe Perches | f30d750 | 2012-01-04 19:40:41 -0800 | [diff] [blame] | 578 | "switch case not processed\n"); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 579 | bresult = false; |
| 580 | break; |
| 581 | } |
| 582 | if (bresult) |
| 583 | ppsc->rfpwr_state = rfpwr_state; |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 584 | return bresult; |
| 585 | } |
| 586 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 587 | bool rtl92cu_phy_set_rf_power_state(struct ieee80211_hw *hw, |
Larry Finger | d3bb142 | 2011-04-25 13:23:20 -0500 | [diff] [blame] | 588 | enum rf_pwrstate rfpwr_state) |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 589 | { |
| 590 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); |
| 591 | bool bresult = false; |
| 592 | |
| 593 | if (rfpwr_state == ppsc->rfpwr_state) |
| 594 | return bresult; |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 595 | bresult = _rtl92cu_phy_set_rf_power_state(hw, rfpwr_state); |
George | f0a39ae | 2011-02-19 16:29:32 -0600 | [diff] [blame] | 596 | return bresult; |
| 597 | } |