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Haojian Zhuang46e446d2012-03-01 13:49:57 +08001* Marvell PXA GPIO controller
2
3Required properties:
Haojian Zhuangf8731172013-04-09 22:27:50 +08004- compatible : Should be "intel,pxa25x-gpio", "intel,pxa26x-gpio",
5 "intel,pxa27x-gpio", "intel,pxa3xx-gpio",
Rob Herring99480042015-01-26 22:46:05 -06006 "marvell,pxa93x-gpio", "marvell,mmp-gpio",
7 "marvell,mmp2-gpio" or marvell,pxa1928-gpio.
Haojian Zhuang46e446d2012-03-01 13:49:57 +08008- reg : Address and length of the register set for the device
Haojian Zhuangace12972012-04-27 16:21:08 +08009- interrupts : Should be the port interrupt shared by all gpio pins.
10 There're three gpio interrupts in arch-pxa, and they're gpio0,
11 gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
12 gpio_mux.
Daniel Mackee568842013-07-11 17:17:54 +020013- interrupt-names : Should be the names of irq resources. Each interrupt
14 uses its own interrupt name, so there should be as many interrupt names
Josh Wu39521092015-03-04 11:50:29 +080015 as referenced interrupts.
Haojian Zhuangace12972012-04-27 16:21:08 +080016- interrupt-controller : Identifies the node as an interrupt controller.
17- #interrupt-cells: Specifies the number of cells needed to encode an
18 interrupt source.
Haojian Zhuang46e446d2012-03-01 13:49:57 +080019- gpio-controller : Marks the device node as a gpio controller.
20- #gpio-cells : Should be one. It is the pin number.
21
Daniel Macka8798912014-08-14 11:40:24 +020022Example for a MMP platform:
Haojian Zhuang46e446d2012-03-01 13:49:57 +080023
24 gpio: gpio@d4019000 {
Haojian Zhuangf8731172013-04-09 22:27:50 +080025 compatible = "marvell,mmp-gpio";
Haojian Zhuang46e446d2012-03-01 13:49:57 +080026 reg = <0xd4019000 0x1000>;
Haojian Zhuangace12972012-04-27 16:21:08 +080027 interrupts = <49>;
Daniel Mackee568842013-07-11 17:17:54 +020028 interrupt-names = "gpio_mux";
Haojian Zhuang46e446d2012-03-01 13:49:57 +080029 gpio-controller;
30 #gpio-cells = <1>;
31 interrupt-controller;
32 #interrupt-cells = <1>;
33 };
Andrew Lunn278b45b2012-06-27 13:40:04 +020034
Daniel Macka8798912014-08-14 11:40:24 +020035Example for a PXA3xx platform:
36
37 gpio: gpio@40e00000 {
38 compatible = "intel,pxa3xx-gpio";
39 reg = <0x40e00000 0x10000>;
40 interrupt-names = "gpio0", "gpio1", "gpio_mux";
41 interrupts = <8 9 10>;
42 gpio-controller;
43 #gpio-cells = <0x2>;
44 interrupt-controller;
45 #interrupt-cells = <0x2>;
46 };