Rich Felker | 7ed66c6 | 2016-08-04 04:30:37 +0000 | [diff] [blame] | 1 | J-Core SPI master |
| 2 | |
| 3 | Required properties: |
| 4 | |
| 5 | - compatible: Must be "jcore,spi2". |
| 6 | |
| 7 | - reg: Memory region for registers. |
| 8 | |
| 9 | - #address-cells: Must be 1. |
| 10 | |
| 11 | - #size-cells: Must be 0. |
| 12 | |
| 13 | Optional properties: |
| 14 | |
| 15 | - clocks: If a phandle named "ref_clk" is present, SPI clock speed |
| 16 | programming is relative to the frequency of the indicated clock. |
| 17 | Necessary only if the input clock rate is something other than a |
| 18 | fixed 50 MHz. |
| 19 | |
| 20 | - clock-names: Clock names, one for each phandle in clocks. |
| 21 | |
| 22 | See spi-bus.txt for additional properties not specific to this device. |
| 23 | |
| 24 | Example: |
| 25 | |
| 26 | spi@40 { |
| 27 | compatible = "jcore,spi2"; |
| 28 | #address-cells = <1>; |
| 29 | #size-cells = <0>; |
| 30 | reg = <0x40 0x8>; |
| 31 | spi-max-frequency = <25000000>; |
| 32 | clocks = <&bus_clk>; |
| 33 | clock-names = "ref_clk"; |
| 34 | } |