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Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090028#include <linux/slab.h>
David Howells760285e2012-10-02 18:01:07 +010029#include <drm/drmP.h>
Matt Roperc6f95f22015-01-22 16:50:32 -080030#include <drm/drm_atomic_helper.h>
David Howells760285e2012-10-02 18:01:07 +010031#include <drm/drm_crtc.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010033#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080034#include "i915_drv.h"
35#include "dvo.h"
36
37#define SIL164_ADDR 0x38
38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38
Thomas Richter7434a252012-07-18 19:22:30 +020040#define NS2501_ADDR 0x38
Jesse Barnes79e53942008-11-07 14:24:08 -080041
Chris Wilsonea5b2132010-08-04 13:50:23 +010042static const struct intel_dvo_device intel_dvo_devices[] = {
Jesse Barnes79e53942008-11-07 14:24:08 -080043 {
44 .type = INTEL_DVO_CHIP_TMDS,
45 .name = "sil164",
46 .dvo_reg = DVOC,
Ville Syrjälä78e0d2e2015-11-04 23:19:59 +020047 .dvo_srcdim_reg = DVOC_SRCDIM,
Jesse Barnes79e53942008-11-07 14:24:08 -080048 .slave_addr = SIL164_ADDR,
49 .dev_ops = &sil164_ops,
50 },
51 {
52 .type = INTEL_DVO_CHIP_TMDS,
53 .name = "ch7xxx",
54 .dvo_reg = DVOC,
Ville Syrjälä78e0d2e2015-11-04 23:19:59 +020055 .dvo_srcdim_reg = DVOC_SRCDIM,
Jesse Barnes79e53942008-11-07 14:24:08 -080056 .slave_addr = CH7xxx_ADDR,
57 .dev_ops = &ch7xxx_ops,
58 },
59 {
braggle@free.fr98304ad2013-05-16 12:57:38 +020060 .type = INTEL_DVO_CHIP_TMDS,
61 .name = "ch7xxx",
62 .dvo_reg = DVOC,
Ville Syrjälä78e0d2e2015-11-04 23:19:59 +020063 .dvo_srcdim_reg = DVOC_SRCDIM,
braggle@free.fr98304ad2013-05-16 12:57:38 +020064 .slave_addr = 0x75, /* For some ch7010 */
65 .dev_ops = &ch7xxx_ops,
66 },
67 {
Jesse Barnes79e53942008-11-07 14:24:08 -080068 .type = INTEL_DVO_CHIP_LVDS,
69 .name = "ivch",
70 .dvo_reg = DVOA,
Ville Syrjälä78e0d2e2015-11-04 23:19:59 +020071 .dvo_srcdim_reg = DVOA_SRCDIM,
Jesse Barnes79e53942008-11-07 14:24:08 -080072 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
73 .dev_ops = &ivch_ops,
74 },
75 {
76 .type = INTEL_DVO_CHIP_TMDS,
77 .name = "tfp410",
78 .dvo_reg = DVOC,
Ville Syrjälä78e0d2e2015-11-04 23:19:59 +020079 .dvo_srcdim_reg = DVOC_SRCDIM,
Jesse Barnes79e53942008-11-07 14:24:08 -080080 .slave_addr = TFP410_ADDR,
81 .dev_ops = &tfp410_ops,
82 },
83 {
84 .type = INTEL_DVO_CHIP_LVDS,
85 .name = "ch7017",
86 .dvo_reg = DVOC,
Ville Syrjälä78e0d2e2015-11-04 23:19:59 +020087 .dvo_srcdim_reg = DVOC_SRCDIM,
Jesse Barnes79e53942008-11-07 14:24:08 -080088 .slave_addr = 0x75,
Jani Nikula988c7012015-03-27 00:20:19 +020089 .gpio = GMBUS_PIN_DPB,
Jesse Barnes79e53942008-11-07 14:24:08 -080090 .dev_ops = &ch7017_ops,
Thomas Richter7434a252012-07-18 19:22:30 +020091 },
92 {
93 .type = INTEL_DVO_CHIP_TMDS,
94 .name = "ns2501",
Ville Syrjälä316e0152014-08-15 01:21:58 +030095 .dvo_reg = DVOB,
Ville Syrjälä78e0d2e2015-11-04 23:19:59 +020096 .dvo_srcdim_reg = DVOB_SRCDIM,
Thomas Richter7434a252012-07-18 19:22:30 +020097 .slave_addr = NS2501_ADDR,
98 .dev_ops = &ns2501_ops,
99 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800100};
101
Chris Wilsonea5b2132010-08-04 13:50:23 +0100102struct intel_dvo {
103 struct intel_encoder base;
104
105 struct intel_dvo_device dev;
106
Ville Syrjälä28694072015-09-08 13:40:44 +0300107 struct intel_connector *attached_connector;
108
Chris Wilsonea5b2132010-08-04 13:50:23 +0100109 bool panel_wants_dither;
110};
111
Daniel Vetter69438e62013-07-21 21:36:57 +0200112static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100113{
Daniel Vetter69438e62013-07-21 21:36:57 +0200114 return container_of(encoder, struct intel_dvo, base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100115}
116
Chris Wilsondf0e9242010-09-09 16:20:55 +0100117static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
118{
Daniel Vetter79fde302013-07-21 21:37:00 +0200119 return enc_to_dvo(intel_attached_encoder(connector));
Chris Wilsondf0e9242010-09-09 16:20:55 +0100120}
121
Daniel Vetter732ce742012-07-02 15:09:45 +0200122static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800123{
Ville Syrjäläf417c112014-06-05 19:15:52 +0300124 struct drm_device *dev = connector->base.dev;
Chris Wilsonfac5e232016-07-04 11:34:36 +0100125 struct drm_i915_private *dev_priv = to_i915(dev);
Daniel Vetter732ce742012-07-02 15:09:45 +0200126 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
Ville Syrjäläf417c112014-06-05 19:15:52 +0300127 u32 tmp;
128
129 tmp = I915_READ(intel_dvo->dev.dvo_reg);
130
131 if (!(tmp & DVO_ENABLE))
132 return false;
Daniel Vetter732ce742012-07-02 15:09:45 +0200133
134 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
135}
136
137static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
138 enum pipe *pipe)
139{
140 struct drm_device *dev = encoder->base.dev;
Chris Wilsonfac5e232016-07-04 11:34:36 +0100141 struct drm_i915_private *dev_priv = to_i915(dev);
Daniel Vetter69438e62013-07-21 21:36:57 +0200142 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Daniel Vetter732ce742012-07-02 15:09:45 +0200143 u32 tmp;
144
145 tmp = I915_READ(intel_dvo->dev.dvo_reg);
146
147 if (!(tmp & DVO_ENABLE))
148 return false;
149
150 *pipe = PORT_TO_PIPE(tmp);
151
152 return true;
153}
154
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700155static void intel_dvo_get_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200156 struct intel_crtc_state *pipe_config)
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700157{
Chris Wilsonfac5e232016-07-04 11:34:36 +0100158 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
Daniel Vetter69438e62013-07-21 21:36:57 +0200159 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700160 u32 tmp, flags = 0;
161
162 tmp = I915_READ(intel_dvo->dev.dvo_reg);
163 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
164 flags |= DRM_MODE_FLAG_PHSYNC;
165 else
166 flags |= DRM_MODE_FLAG_NHSYNC;
167 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
168 flags |= DRM_MODE_FLAG_PVSYNC;
169 else
170 flags |= DRM_MODE_FLAG_NVSYNC;
171
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200172 pipe_config->base.adjusted_mode.flags |= flags;
Ville Syrjälä18442d02013-09-13 16:00:08 +0300173
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200174 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700175}
176
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200177static void intel_disable_dvo(struct intel_encoder *encoder)
178{
Chris Wilsonfac5e232016-07-04 11:34:36 +0100179 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
Daniel Vetter69438e62013-07-21 21:36:57 +0200180 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200181 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -0800182 u32 temp = I915_READ(dvo_reg);
183
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200184 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
185 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
186 I915_READ(dvo_reg);
187}
188
189static void intel_enable_dvo(struct intel_encoder *encoder)
190{
Chris Wilsonfac5e232016-07-04 11:34:36 +0100191 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
Daniel Vetter69438e62013-07-21 21:36:57 +0200192 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Daniel Vetter48f34e12013-10-08 12:25:42 +0200193 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200194 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200195 u32 temp = I915_READ(dvo_reg);
196
Daniel Vetter48f34e12013-10-08 12:25:42 +0200197 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
Ander Conselvan de Oliveira6e3c9712015-01-15 14:55:25 +0200198 &crtc->config->base.mode,
199 &crtc->config->base.adjusted_mode);
Daniel Vetter48f34e12013-10-08 12:25:42 +0200200
Ville Syrjäläc9c054c2014-08-15 01:21:59 +0300201 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
202 I915_READ(dvo_reg);
203
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200204 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
205}
206
Damien Lespiauc19de8e2013-11-28 15:29:18 +0000207static enum drm_mode_status
208intel_dvo_mode_valid(struct drm_connector *connector,
209 struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800210{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100211 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Ville Syrjälä28694072015-09-08 13:40:44 +0300212 const struct drm_display_mode *fixed_mode =
213 to_intel_connector(connector)->panel.fixed_mode;
Mika Kahola26a91552015-08-18 14:37:02 +0300214 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
215 int target_clock = mode->clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800216
217 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
218 return MODE_NO_DBLESCAN;
219
220 /* XXX: Validate clock range */
221
Ville Syrjälä28694072015-09-08 13:40:44 +0300222 if (fixed_mode) {
223 if (mode->hdisplay > fixed_mode->hdisplay)
Jesse Barnes79e53942008-11-07 14:24:08 -0800224 return MODE_PANEL;
Ville Syrjälä28694072015-09-08 13:40:44 +0300225 if (mode->vdisplay > fixed_mode->vdisplay)
Jesse Barnes79e53942008-11-07 14:24:08 -0800226 return MODE_PANEL;
Mika Kahola26a91552015-08-18 14:37:02 +0300227
Ville Syrjälä28694072015-09-08 13:40:44 +0300228 target_clock = fixed_mode->clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800229 }
230
Mika Kahola26a91552015-08-18 14:37:02 +0300231 if (target_clock > max_dotclk)
232 return MODE_CLOCK_HIGH;
233
Chris Wilsonea5b2132010-08-04 13:50:23 +0100234 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800235}
236
Daniel Vettera3470372013-07-21 21:36:58 +0200237static bool intel_dvo_compute_config(struct intel_encoder *encoder,
Ander Conselvan de Oliveira5cec2582015-01-15 14:55:21 +0200238 struct intel_crtc_state *pipe_config)
Jesse Barnes79e53942008-11-07 14:24:08 -0800239{
Daniel Vettera3470372013-07-21 21:36:58 +0200240 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
Ville Syrjälä28694072015-09-08 13:40:44 +0300241 const struct drm_display_mode *fixed_mode =
242 intel_dvo->attached_connector->panel.fixed_mode;
Ander Conselvan de Oliveira2d112de2015-01-15 14:55:22 +0200243 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
Jesse Barnes79e53942008-11-07 14:24:08 -0800244
245 /* If we have timings from the BIOS for the panel, put them in
246 * to the adjusted mode. The CRTC will be set up for this mode,
247 * with the panel scaling set up to source from the H/VDisplay
248 * of the original mode.
249 */
Ville Syrjälä28694072015-09-08 13:40:44 +0300250 if (fixed_mode)
251 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800252
Jesse Barnes79e53942008-11-07 14:24:08 -0800253 return true;
254}
255
Daniel Vetter912b0e22014-04-24 23:54:38 +0200256static void intel_dvo_pre_enable(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800257{
Daniel Vetter79fde302013-07-21 21:37:00 +0200258 struct drm_device *dev = encoder->base.dev;
Chris Wilsonfac5e232016-07-04 11:34:36 +0100259 struct drm_i915_private *dev_priv = to_i915(dev);
Daniel Vetter79fde302013-07-21 21:37:00 +0200260 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
Ville Syrjälä7c5f93b2015-09-08 13:40:49 +0300261 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
Daniel Vetter79fde302013-07-21 21:37:00 +0200262 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
263 int pipe = crtc->pipe;
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 u32 dvo_val;
Ville Syrjäläf0f59a02015-11-18 15:33:26 +0200265 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
266 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -0800267
Jesse Barnes79e53942008-11-07 14:24:08 -0800268 /* Save the data order, since I don't know what it should be set to. */
269 dvo_val = I915_READ(dvo_reg) &
270 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
271 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
272 DVO_BLANK_ACTIVE_HIGH;
273
274 if (pipe == 1)
275 dvo_val |= DVO_PIPE_B_SELECT;
276 dvo_val |= DVO_PIPE_STALL;
277 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
278 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
279 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
280 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
281
Jesse Barnes79e53942008-11-07 14:24:08 -0800282 /*I915_WRITE(DVOB_SRCDIM,
Ville Syrjäläaad941d2015-09-25 16:38:56 +0300283 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
284 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
Jesse Barnes79e53942008-11-07 14:24:08 -0800285 I915_WRITE(dvo_srcdim_reg,
Ville Syrjäläaad941d2015-09-25 16:38:56 +0300286 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
287 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
Jesse Barnes79e53942008-11-07 14:24:08 -0800288 /*I915_WRITE(DVOB, dvo_val);*/
289 I915_WRITE(dvo_reg, dvo_val);
290}
291
292/**
293 * Detect the output connection on our DVO device.
294 *
295 * Unimplemented.
296 */
Chris Wilson7b334fc2010-09-09 23:51:02 +0100297static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +0100298intel_dvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -0800299{
Chris Wilsondf0e9242010-09-09 16:20:55 +0100300 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilson164c8592013-07-20 20:27:08 +0100301 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
Jani Nikulac23cc412014-06-03 14:56:17 +0300302 connector->base.id, connector->name);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100303 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -0800304}
305
306static int intel_dvo_get_modes(struct drm_connector *connector)
307{
Chris Wilsonfac5e232016-07-04 11:34:36 +0100308 struct drm_i915_private *dev_priv = to_i915(connector->dev);
Ville Syrjälä28694072015-09-08 13:40:44 +0300309 const struct drm_display_mode *fixed_mode =
310 to_intel_connector(connector)->panel.fixed_mode;
Jesse Barnes79e53942008-11-07 14:24:08 -0800311
312 /* We should probably have an i2c driver get_modes function for those
313 * devices which will have a fixed set of modes determined by the chip
314 * (TV-out, for example), but for now with just TMDS and LVDS,
315 * that's not the case.
316 */
Chris Wilsonf899fc62010-07-20 15:44:45 -0700317 intel_ddc_get_modes(connector,
Jani Nikula988c7012015-03-27 00:20:19 +0200318 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
Jesse Barnes79e53942008-11-07 14:24:08 -0800319 if (!list_empty(&connector->probed_modes))
320 return 1;
321
Ville Syrjälä28694072015-09-08 13:40:44 +0300322 if (fixed_mode) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800323 struct drm_display_mode *mode;
Ville Syrjälä28694072015-09-08 13:40:44 +0300324 mode = drm_mode_duplicate(connector->dev, fixed_mode);
Jesse Barnes79e53942008-11-07 14:24:08 -0800325 if (mode) {
326 drm_mode_probed_add(connector, mode);
327 return 1;
328 }
329 }
Chris Wilsonea5b2132010-08-04 13:50:23 +0100330
Jesse Barnes79e53942008-11-07 14:24:08 -0800331 return 0;
332}
333
Chris Wilsonea5b2132010-08-04 13:50:23 +0100334static void intel_dvo_destroy(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800335{
Jesse Barnes79e53942008-11-07 14:24:08 -0800336 drm_connector_cleanup(connector);
Ville Syrjälä28694072015-09-08 13:40:44 +0300337 intel_panel_fini(&to_intel_connector(connector)->panel);
Zhenyu Wang599be162010-03-29 16:17:31 +0800338 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800339}
340
Jesse Barnes79e53942008-11-07 14:24:08 -0800341static const struct drm_connector_funcs intel_dvo_connector_funcs = {
Maarten Lankhorst4d688a22015-08-05 12:37:06 +0200342 .dpms = drm_atomic_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -0800343 .detect = intel_dvo_detect,
Chris Wilson1ebaa0b2016-06-24 14:00:15 +0100344 .late_register = intel_connector_register,
Chris Wilsonc191eca2016-06-17 11:40:33 +0100345 .early_unregister = intel_connector_unregister,
Jesse Barnes79e53942008-11-07 14:24:08 -0800346 .destroy = intel_dvo_destroy,
347 .fill_modes = drm_helper_probe_single_connector_modes,
Matt Roper2545e4a2015-01-22 16:51:27 -0800348 .atomic_get_property = intel_connector_atomic_get_property,
Matt Roperc6f95f22015-01-22 16:50:32 -0800349 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
Ander Conselvan de Oliveira98969722015-03-20 16:18:06 +0200350 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
Jesse Barnes79e53942008-11-07 14:24:08 -0800351};
352
353static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
354 .mode_valid = intel_dvo_mode_valid,
355 .get_modes = intel_dvo_get_modes,
Jesse Barnes79e53942008-11-07 14:24:08 -0800356};
357
Hannes Ederb358d0a2008-12-18 21:18:47 +0100358static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800359{
Daniel Vetter69438e62013-07-21 21:36:57 +0200360 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
Zhenyu Wang599be162010-03-29 16:17:31 +0800361
Chris Wilsonea5b2132010-08-04 13:50:23 +0100362 if (intel_dvo->dev.dev_ops->destroy)
363 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
364
Chris Wilsonea5b2132010-08-04 13:50:23 +0100365 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800366}
367
368static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
369 .destroy = intel_dvo_enc_destroy,
370};
371
Jesse Barnes79e53942008-11-07 14:24:08 -0800372/**
373 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
374 *
375 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
376 * chip being on DVOB/C and having multiple pipes.
377 */
378static struct drm_display_mode *
Chris Wilsonea5b2132010-08-04 13:50:23 +0100379intel_dvo_get_current_mode(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800380{
381 struct drm_device *dev = connector->dev;
Chris Wilsonfac5e232016-07-04 11:34:36 +0100382 struct drm_i915_private *dev_priv = to_i915(dev);
Chris Wilsondf0e9242010-09-09 16:20:55 +0100383 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100384 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -0800385 struct drm_display_mode *mode = NULL;
386
387 /* If the DVO port is active, that'll be the LVDS, so we can pull out
388 * its timings to get how the BIOS set up the panel.
389 */
390 if (dvo_val & DVO_ENABLE) {
391 struct drm_crtc *crtc;
392 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
393
Chris Wilsonf875c152010-09-09 15:44:14 +0100394 crtc = intel_get_crtc_for_pipe(dev, pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -0800395 if (crtc) {
396 mode = intel_crtc_mode_get(dev, crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -0800397 if (mode) {
398 mode->type |= DRM_MODE_TYPE_PREFERRED;
399 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
400 mode->flags |= DRM_MODE_FLAG_PHSYNC;
401 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
402 mode->flags |= DRM_MODE_FLAG_PVSYNC;
403 }
404 }
405 }
Chris Wilsonea5b2132010-08-04 13:50:23 +0100406
Jesse Barnes79e53942008-11-07 14:24:08 -0800407 return mode;
408}
409
Ville Syrjälä580d8ed2016-05-27 20:59:24 +0300410static char intel_dvo_port_name(i915_reg_t dvo_reg)
411{
412 if (i915_mmio_reg_equal(dvo_reg, DVOA))
413 return 'A';
414 else if (i915_mmio_reg_equal(dvo_reg, DVOB))
415 return 'B';
416 else if (i915_mmio_reg_equal(dvo_reg, DVOC))
417 return 'C';
418 else
419 return '?';
420}
421
Jesse Barnes79e53942008-11-07 14:24:08 -0800422void intel_dvo_init(struct drm_device *dev)
423{
Chris Wilsonfac5e232016-07-04 11:34:36 +0100424 struct drm_i915_private *dev_priv = to_i915(dev);
Eric Anholt21d40d32010-03-25 11:11:14 -0700425 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100426 struct intel_dvo *intel_dvo;
Zhenyu Wang599be162010-03-29 16:17:31 +0800427 struct intel_connector *intel_connector;
Jesse Barnes79e53942008-11-07 14:24:08 -0800428 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800429 int encoder_type = DRM_MODE_ENCODER_NONE;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100430
Daniel Vetterb14c5672013-09-19 12:18:32 +0200431 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100432 if (!intel_dvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800433 return;
434
Ander Conselvan de Oliveira9bdbd0b2015-04-10 10:59:10 +0300435 intel_connector = intel_connector_alloc();
Zhenyu Wang599be162010-03-29 16:17:31 +0800436 if (!intel_connector) {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100437 kfree(intel_dvo);
Zhenyu Wang599be162010-03-29 16:17:31 +0800438 return;
439 }
440
Ville Syrjälä28694072015-09-08 13:40:44 +0300441 intel_dvo->attached_connector = intel_connector;
442
Chris Wilsonea5b2132010-08-04 13:50:23 +0100443 intel_encoder = &intel_dvo->base;
444
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200445 intel_encoder->disable = intel_disable_dvo;
446 intel_encoder->enable = intel_enable_dvo;
Daniel Vetter732ce742012-07-02 15:09:45 +0200447 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700448 intel_encoder->get_config = intel_dvo_get_config;
Daniel Vettera3470372013-07-21 21:36:58 +0200449 intel_encoder->compute_config = intel_dvo_compute_config;
Daniel Vetter912b0e22014-04-24 23:54:38 +0200450 intel_encoder->pre_enable = intel_dvo_pre_enable;
Daniel Vetter732ce742012-07-02 15:09:45 +0200451 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
Daniel Vetter19c63fa2012-07-11 09:48:04 +0200452
Jesse Barnes79e53942008-11-07 14:24:08 -0800453 /* Now, try to find a controller */
454 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
Zhenyu Wang599be162010-03-29 16:17:31 +0800455 struct drm_connector *connector = &intel_connector->base;
Chris Wilsonea5b2132010-08-04 13:50:23 +0100456 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
Chris Wilsonf899fc62010-07-20 15:44:45 -0700457 struct i2c_adapter *i2c;
Jesse Barnes79e53942008-11-07 14:24:08 -0800458 int gpio;
David Müller (ELSOFT AG)e4bfff52013-04-19 10:41:50 +0200459 bool dvoinit;
Ville Syrjälä46509472015-03-31 10:37:21 +0300460 enum pipe pipe;
Chris Wilson699ab782015-04-27 16:32:07 +0100461 uint32_t dpll[I915_MAX_PIPES];
Jesse Barnes79e53942008-11-07 14:24:08 -0800462
Jesse Barnes79e53942008-11-07 14:24:08 -0800463 /* Allow the I2C driver info to specify the GPIO to be used in
464 * special cases, but otherwise default to what's defined
465 * in the spec.
466 */
Jani Nikula88ac7932015-03-27 00:20:22 +0200467 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
Jesse Barnes79e53942008-11-07 14:24:08 -0800468 gpio = dvo->gpio;
469 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
Jani Nikula988c7012015-03-27 00:20:19 +0200470 gpio = GMBUS_PIN_SSC;
Jesse Barnes79e53942008-11-07 14:24:08 -0800471 else
Jani Nikula988c7012015-03-27 00:20:19 +0200472 gpio = GMBUS_PIN_DPB;
Jesse Barnes79e53942008-11-07 14:24:08 -0800473
474 /* Set up the I2C bus necessary for the chip we're probing.
475 * It appears that everything is on GPIOE except for panels
476 * on i830 laptops, which are on GPIOB (DVOA).
477 */
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800478 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
Jesse Barnes79e53942008-11-07 14:24:08 -0800479
Chris Wilsonea5b2132010-08-04 13:50:23 +0100480 intel_dvo->dev = *dvo;
David Müller (ELSOFT AG)e4bfff52013-04-19 10:41:50 +0200481
482 /* GMBUS NAK handling seems to be unstable, hence let the
483 * transmitter detection run in bit banging mode for now.
484 */
485 intel_gmbus_force_bit(i2c, true);
486
Ville Syrjälä46509472015-03-31 10:37:21 +0300487 /* ns2501 requires the DVO 2x clock before it will
488 * respond to i2c accesses, so make sure we have
489 * have the clock enabled before we attempt to
490 * initialize the device.
491 */
492 for_each_pipe(dev_priv, pipe) {
493 dpll[pipe] = I915_READ(DPLL(pipe));
494 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
495 }
496
David Müller (ELSOFT AG)e4bfff52013-04-19 10:41:50 +0200497 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
498
Ville Syrjälä46509472015-03-31 10:37:21 +0300499 /* restore the DVO 2x clock state to original */
500 for_each_pipe(dev_priv, pipe) {
501 I915_WRITE(DPLL(pipe), dpll[pipe]);
502 }
503
David Müller (ELSOFT AG)e4bfff52013-04-19 10:41:50 +0200504 intel_gmbus_force_bit(i2c, false);
505
506 if (!dvoinit)
Jesse Barnes79e53942008-11-07 14:24:08 -0800507 continue;
508
Ville Syrjälä580d8ed2016-05-27 20:59:24 +0300509 drm_encoder_init(dev, &intel_encoder->base,
510 &intel_dvo_enc_funcs, encoder_type,
511 "DVO %c", intel_dvo_port_name(dvo->dvo_reg));
512
Eric Anholt21d40d32010-03-25 11:11:14 -0700513 intel_encoder->type = INTEL_OUTPUT_DVO;
514 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800515 switch (dvo->type) {
516 case INTEL_DVO_CHIP_TMDS:
Ville Syrjäläbc079e82014-03-03 16:15:28 +0200517 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
518 (1 << INTEL_OUTPUT_DVO);
Jesse Barnes79e53942008-11-07 14:24:08 -0800519 drm_connector_init(dev, connector,
520 &intel_dvo_connector_funcs,
521 DRM_MODE_CONNECTOR_DVII);
522 encoder_type = DRM_MODE_ENCODER_TMDS;
523 break;
524 case INTEL_DVO_CHIP_LVDS:
Ville Syrjäläbc079e82014-03-03 16:15:28 +0200525 intel_encoder->cloneable = 0;
Jesse Barnes79e53942008-11-07 14:24:08 -0800526 drm_connector_init(dev, connector,
527 &intel_dvo_connector_funcs,
528 DRM_MODE_CONNECTOR_LVDS);
529 encoder_type = DRM_MODE_ENCODER_LVDS;
530 break;
531 }
532
533 drm_connector_helper_add(connector,
534 &intel_dvo_connector_helper_funcs);
535 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
536 connector->interlace_allowed = false;
537 connector->doublescan_allowed = false;
538
Chris Wilsondf0e9242010-09-09 16:20:55 +0100539 intel_connector_attach_encoder(intel_connector, intel_encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800540 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
541 /* For our LVDS chipsets, we should hopefully be able
542 * to dig the fixed panel mode out of the BIOS data.
543 * However, it's in a different format from the BIOS
544 * data on chipsets with integrated LVDS (stored in AIM
545 * headers, likely), so for now, just get the current
546 * mode being output through DVO.
547 */
Ville Syrjälä28694072015-09-08 13:40:44 +0300548 intel_panel_init(&intel_connector->panel,
549 intel_dvo_get_current_mode(connector),
550 NULL);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100551 intel_dvo->panel_wants_dither = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800552 }
553
Jesse Barnes79e53942008-11-07 14:24:08 -0800554 return;
555 }
556
Chris Wilsonea5b2132010-08-04 13:50:23 +0100557 kfree(intel_dvo);
Zhenyu Wang599be162010-03-29 16:17:31 +0800558 kfree(intel_connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800559}