Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * AD7280A Lithium Ion Battery Monitoring System |
| 3 | * |
| 4 | * Copyright 2011 Analog Devices Inc. |
| 5 | * |
| 6 | * Licensed under the GPL-2. |
| 7 | */ |
| 8 | |
| 9 | #include <linux/device.h> |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/slab.h> |
| 12 | #include <linux/sysfs.h> |
| 13 | #include <linux/spi/spi.h> |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/interrupt.h> |
Paul Gortmaker | 748b636 | 2011-09-30 18:06:58 -0400 | [diff] [blame] | 17 | #include <linux/module.h> |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 18 | |
Jonathan Cameron | 06458e2 | 2012-04-25 15:54:58 +0100 | [diff] [blame] | 19 | #include <linux/iio/iio.h> |
| 20 | #include <linux/iio/sysfs.h> |
| 21 | #include <linux/iio/events.h> |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 22 | |
| 23 | #include "ad7280a.h" |
| 24 | |
| 25 | /* Registers */ |
| 26 | #define AD7280A_CELL_VOLTAGE_1 0x0 /* D11 to D0, Read only */ |
| 27 | #define AD7280A_CELL_VOLTAGE_2 0x1 /* D11 to D0, Read only */ |
| 28 | #define AD7280A_CELL_VOLTAGE_3 0x2 /* D11 to D0, Read only */ |
| 29 | #define AD7280A_CELL_VOLTAGE_4 0x3 /* D11 to D0, Read only */ |
| 30 | #define AD7280A_CELL_VOLTAGE_5 0x4 /* D11 to D0, Read only */ |
| 31 | #define AD7280A_CELL_VOLTAGE_6 0x5 /* D11 to D0, Read only */ |
| 32 | #define AD7280A_AUX_ADC_1 0x6 /* D11 to D0, Read only */ |
| 33 | #define AD7280A_AUX_ADC_2 0x7 /* D11 to D0, Read only */ |
| 34 | #define AD7280A_AUX_ADC_3 0x8 /* D11 to D0, Read only */ |
| 35 | #define AD7280A_AUX_ADC_4 0x9 /* D11 to D0, Read only */ |
| 36 | #define AD7280A_AUX_ADC_5 0xA /* D11 to D0, Read only */ |
| 37 | #define AD7280A_AUX_ADC_6 0xB /* D11 to D0, Read only */ |
| 38 | #define AD7280A_SELF_TEST 0xC /* D11 to D0, Read only */ |
| 39 | #define AD7280A_CONTROL_HB 0xD /* D15 to D8, Read/write */ |
| 40 | #define AD7280A_CONTROL_LB 0xE /* D7 to D0, Read/write */ |
| 41 | #define AD7280A_CELL_OVERVOLTAGE 0xF /* D7 to D0, Read/write */ |
| 42 | #define AD7280A_CELL_UNDERVOLTAGE 0x10 /* D7 to D0, Read/write */ |
| 43 | #define AD7280A_AUX_ADC_OVERVOLTAGE 0x11 /* D7 to D0, Read/write */ |
| 44 | #define AD7280A_AUX_ADC_UNDERVOLTAGE 0x12 /* D7 to D0, Read/write */ |
| 45 | #define AD7280A_ALERT 0x13 /* D7 to D0, Read/write */ |
| 46 | #define AD7280A_CELL_BALANCE 0x14 /* D7 to D0, Read/write */ |
| 47 | #define AD7280A_CB1_TIMER 0x15 /* D7 to D0, Read/write */ |
| 48 | #define AD7280A_CB2_TIMER 0x16 /* D7 to D0, Read/write */ |
| 49 | #define AD7280A_CB3_TIMER 0x17 /* D7 to D0, Read/write */ |
| 50 | #define AD7280A_CB4_TIMER 0x18 /* D7 to D0, Read/write */ |
| 51 | #define AD7280A_CB5_TIMER 0x19 /* D7 to D0, Read/write */ |
| 52 | #define AD7280A_CB6_TIMER 0x1A /* D7 to D0, Read/write */ |
| 53 | #define AD7280A_PD_TIMER 0x1B /* D7 to D0, Read/write */ |
| 54 | #define AD7280A_READ 0x1C /* D7 to D0, Read/write */ |
| 55 | #define AD7280A_CNVST_CONTROL 0x1D /* D7 to D0, Read/write */ |
| 56 | |
| 57 | /* Bits and Masks */ |
Haneen Mohammed | 418880f | 2015-03-26 02:23:29 +0300 | [diff] [blame] | 58 | #define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 |
| 59 | #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 BIT(6) |
| 60 | #define AD7280A_CTRL_HB_CONV_INPUT_6CELL BIT(7) |
| 61 | #define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (BIT(7) | BIT(6)) |
| 62 | #define AD7280A_CTRL_HB_CONV_RES_READ_ALL 0 |
| 63 | #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 BIT(4) |
| 64 | #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL BIT(5) |
| 65 | #define AD7280A_CTRL_HB_CONV_RES_READ_NO (BIT(5) | BIT(4)) |
| 66 | #define AD7280A_CTRL_HB_CONV_START_CNVST 0 |
| 67 | #define AD7280A_CTRL_HB_CONV_START_CS BIT(3) |
| 68 | #define AD7280A_CTRL_HB_CONV_AVG_DIS 0 |
| 69 | #define AD7280A_CTRL_HB_CONV_AVG_2 BIT(1) |
| 70 | #define AD7280A_CTRL_HB_CONV_AVG_4 BIT(2) |
| 71 | #define AD7280A_CTRL_HB_CONV_AVG_8 (BIT(2) | BIT(1)) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 72 | #define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1) |
Haneen Mohammed | 418880f | 2015-03-26 02:23:29 +0300 | [diff] [blame] | 73 | #define AD7280A_CTRL_HB_PWRDN_SW BIT(0) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 74 | |
Haneen Mohammed | 418880f | 2015-03-26 02:23:29 +0300 | [diff] [blame] | 75 | #define AD7280A_CTRL_LB_SWRST BIT(7) |
| 76 | #define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 |
| 77 | #define AD7280A_CTRL_LB_ACQ_TIME_800ns BIT(5) |
| 78 | #define AD7280A_CTRL_LB_ACQ_TIME_1200ns BIT(6) |
| 79 | #define AD7280A_CTRL_LB_ACQ_TIME_1600ns (BIT(6) | BIT(5)) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 80 | #define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5) |
Haneen Mohammed | 418880f | 2015-03-26 02:23:29 +0300 | [diff] [blame] | 81 | #define AD7280A_CTRL_LB_MUST_SET BIT(4) |
| 82 | #define AD7280A_CTRL_LB_THERMISTOR_EN BIT(3) |
| 83 | #define AD7280A_CTRL_LB_LOCK_DEV_ADDR BIT(2) |
| 84 | #define AD7280A_CTRL_LB_INC_DEV_ADDR BIT(1) |
| 85 | #define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN BIT(0) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 86 | |
Haneen Mohammed | 418880f | 2015-03-26 02:23:29 +0300 | [diff] [blame] | 87 | #define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) |
| 88 | #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 89 | |
| 90 | #define AD7280A_ALL_CELLS (0xAD << 16) |
| 91 | |
Ioana Ciornei | 5f7e280 | 2015-10-14 21:14:19 +0300 | [diff] [blame] | 92 | #define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */ |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 93 | #define AD7280A_MAX_CHAIN 8 |
| 94 | #define AD7280A_CELLS_PER_DEV 6 |
| 95 | #define AD7280A_BITS 12 |
| 96 | #define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \ |
| 97 | AD7280A_CELL_VOLTAGE_1 + 1) |
| 98 | |
| 99 | #define AD7280A_DEVADDR_MASTER 0 |
| 100 | #define AD7280A_DEVADDR_ALL 0x1F |
| 101 | /* 5-bit device address is sent LSB first */ |
| 102 | #define AD7280A_DEVADDR(addr) (((addr & 0x1) << 4) | ((addr & 0x2) << 3) | \ |
| 103 | (addr & 0x4) | ((addr & 0x8) >> 3) | \ |
| 104 | ((addr & 0x10) >> 4)) |
| 105 | |
| 106 | /* During a read a valid write is mandatory. |
| 107 | * So writing to the highest available address (Address 0x1F) |
| 108 | * and setting the address all parts bit to 0 is recommended |
| 109 | * So the TXVAL is AD7280A_DEVADDR_ALL + CRC |
| 110 | */ |
| 111 | #define AD7280A_READ_TXVAL 0xF800030A |
| 112 | |
| 113 | /* |
| 114 | * AD7280 CRC |
| 115 | * |
| 116 | * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F |
| 117 | */ |
| 118 | #define POLYNOM 0x2F |
| 119 | #define POLYNOM_ORDER 8 |
Kumar Amit Mehta | fad1094 | 2012-11-02 07:28:00 +0000 | [diff] [blame] | 120 | #define HIGHBIT (1 << (POLYNOM_ORDER - 1)) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 121 | |
| 122 | struct ad7280_state { |
| 123 | struct spi_device *spi; |
| 124 | struct iio_chan_spec *channels; |
| 125 | struct iio_dev_attr *iio_attr; |
| 126 | int slave_num; |
| 127 | int scan_cnt; |
| 128 | int readback_delay_us; |
| 129 | unsigned char crc_tab[256]; |
| 130 | unsigned char ctrl_hb; |
| 131 | unsigned char ctrl_lb; |
| 132 | unsigned char cell_threshhigh; |
| 133 | unsigned char cell_threshlow; |
| 134 | unsigned char aux_threshhigh; |
| 135 | unsigned char aux_threshlow; |
| 136 | unsigned char cb_mask[AD7280A_MAX_CHAIN]; |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 137 | |
| 138 | __be32 buf[2] ____cacheline_aligned; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 139 | }; |
| 140 | |
| 141 | static void ad7280_crc8_build_table(unsigned char *crc_tab) |
| 142 | { |
| 143 | unsigned char bit, crc; |
| 144 | int cnt, i; |
| 145 | |
| 146 | for (cnt = 0; cnt < 256; cnt++) { |
| 147 | crc = cnt; |
| 148 | for (i = 0; i < 8; i++) { |
| 149 | bit = crc & HIGHBIT; |
| 150 | crc <<= 1; |
| 151 | if (bit) |
| 152 | crc ^= POLYNOM; |
| 153 | } |
| 154 | crc_tab[cnt] = crc; |
| 155 | } |
| 156 | } |
| 157 | |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 158 | static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 159 | { |
| 160 | unsigned char crc; |
| 161 | |
| 162 | crc = crc_tab[val >> 16 & 0xFF]; |
| 163 | crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; |
| 164 | |
| 165 | return crc ^ (val & 0xFF); |
| 166 | } |
| 167 | |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 168 | static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 169 | { |
| 170 | unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); |
| 171 | |
| 172 | if (crc != ((val >> 2) & 0xFF)) |
| 173 | return -EIO; |
| 174 | |
| 175 | return 0; |
| 176 | } |
| 177 | |
| 178 | /* After initiating a conversion sequence we need to wait until the |
| 179 | * conversion is done. The delay is typically in the range of 15..30 us |
| 180 | * however depending an the number of devices in the daisy chain and the |
| 181 | * number of averages taken, conversion delays and acquisition time options |
| 182 | * it may take up to 250us, in this case we better sleep instead of busy |
| 183 | * wait. |
| 184 | */ |
| 185 | |
| 186 | static void ad7280_delay(struct ad7280_state *st) |
| 187 | { |
| 188 | if (st->readback_delay_us < 50) |
| 189 | udelay(st->readback_delay_us); |
| 190 | else |
Vaishali Thakkar | e3fe42b | 2014-10-03 09:16:53 +0530 | [diff] [blame] | 191 | usleep_range(250, 500); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 192 | } |
| 193 | |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 194 | static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 195 | { |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 196 | int ret; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 197 | struct spi_transfer t = { |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 198 | .tx_buf = &st->buf[0], |
| 199 | .rx_buf = &st->buf[1], |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 200 | .len = 4, |
| 201 | }; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 202 | |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 203 | st->buf[0] = cpu_to_be32(AD7280A_READ_TXVAL); |
| 204 | |
| 205 | ret = spi_sync_transfer(st->spi, &t, 1); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 206 | if (ret) |
| 207 | return ret; |
| 208 | |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 209 | *val = be32_to_cpu(st->buf[1]); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 210 | |
| 211 | return 0; |
| 212 | } |
| 213 | |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 214 | static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, |
| 215 | unsigned int addr, bool all, unsigned int val) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 216 | { |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 217 | unsigned int reg = devaddr << 27 | addr << 21 | |
Janani Ravichandran | 8c79c49 | 2016-02-09 13:40:28 -0500 | [diff] [blame] | 218 | (val & 0xFF) << 13 | all << 12; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 219 | |
| 220 | reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2; |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 221 | st->buf[0] = cpu_to_be32(reg); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 222 | |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 223 | return spi_write(st->spi, &st->buf[0], 4); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 224 | } |
| 225 | |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 226 | static int ad7280_read(struct ad7280_state *st, unsigned int devaddr, |
| 227 | unsigned int addr) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 228 | { |
| 229 | int ret; |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 230 | unsigned int tmp; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 231 | |
| 232 | /* turns off the read operation on all parts */ |
| 233 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 234 | AD7280A_CTRL_HB_CONV_INPUT_ALL | |
| 235 | AD7280A_CTRL_HB_CONV_RES_READ_NO | |
| 236 | st->ctrl_hb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 237 | if (ret) |
| 238 | return ret; |
| 239 | |
| 240 | /* turns on the read operation on the addressed part */ |
| 241 | ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 242 | AD7280A_CTRL_HB_CONV_INPUT_ALL | |
| 243 | AD7280A_CTRL_HB_CONV_RES_READ_ALL | |
| 244 | st->ctrl_hb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 245 | if (ret) |
| 246 | return ret; |
| 247 | |
| 248 | /* Set register address on the part to be read from */ |
| 249 | ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2); |
| 250 | if (ret) |
| 251 | return ret; |
| 252 | |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 253 | __ad7280_read32(st, &tmp); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 254 | |
| 255 | if (ad7280_check_crc(st, tmp)) |
| 256 | return -EIO; |
| 257 | |
| 258 | if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr)) |
| 259 | return -EFAULT; |
| 260 | |
| 261 | return (tmp >> 13) & 0xFF; |
| 262 | } |
| 263 | |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 264 | static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, |
| 265 | unsigned int addr) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 266 | { |
| 267 | int ret; |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 268 | unsigned int tmp; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 269 | |
| 270 | ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2); |
| 271 | if (ret) |
| 272 | return ret; |
| 273 | |
| 274 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 275 | AD7280A_CTRL_HB_CONV_INPUT_ALL | |
| 276 | AD7280A_CTRL_HB_CONV_RES_READ_NO | |
| 277 | st->ctrl_hb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 278 | if (ret) |
| 279 | return ret; |
| 280 | |
| 281 | ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 282 | AD7280A_CTRL_HB_CONV_INPUT_ALL | |
| 283 | AD7280A_CTRL_HB_CONV_RES_READ_ALL | |
| 284 | AD7280A_CTRL_HB_CONV_START_CS | |
| 285 | st->ctrl_hb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 286 | if (ret) |
| 287 | return ret; |
| 288 | |
| 289 | ad7280_delay(st); |
| 290 | |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 291 | __ad7280_read32(st, &tmp); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 292 | |
| 293 | if (ad7280_check_crc(st, tmp)) |
| 294 | return -EIO; |
| 295 | |
| 296 | if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr)) |
| 297 | return -EFAULT; |
| 298 | |
| 299 | return (tmp >> 11) & 0xFFF; |
| 300 | } |
| 301 | |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 302 | static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, |
| 303 | unsigned int *array) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 304 | { |
| 305 | int i, ret; |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 306 | unsigned int tmp, sum = 0; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 307 | |
| 308 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, |
| 309 | AD7280A_CELL_VOLTAGE_1 << 2); |
| 310 | if (ret) |
| 311 | return ret; |
| 312 | |
| 313 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 314 | AD7280A_CTRL_HB_CONV_INPUT_ALL | |
| 315 | AD7280A_CTRL_HB_CONV_RES_READ_ALL | |
| 316 | AD7280A_CTRL_HB_CONV_START_CS | |
| 317 | st->ctrl_hb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 318 | if (ret) |
| 319 | return ret; |
| 320 | |
| 321 | ad7280_delay(st); |
| 322 | |
| 323 | for (i = 0; i < cnt; i++) { |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 324 | __ad7280_read32(st, &tmp); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 325 | |
| 326 | if (ad7280_check_crc(st, tmp)) |
| 327 | return -EIO; |
| 328 | |
| 329 | if (array) |
| 330 | array[i] = tmp; |
| 331 | /* only sum cell voltages */ |
| 332 | if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) |
| 333 | sum += ((tmp >> 11) & 0xFFF); |
| 334 | } |
| 335 | |
| 336 | return sum; |
| 337 | } |
| 338 | |
| 339 | static int ad7280_chain_setup(struct ad7280_state *st) |
| 340 | { |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 341 | unsigned int val, n; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 342 | int ret; |
| 343 | |
| 344 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 345 | AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN | |
| 346 | AD7280A_CTRL_LB_LOCK_DEV_ADDR | |
| 347 | AD7280A_CTRL_LB_MUST_SET | |
| 348 | AD7280A_CTRL_LB_SWRST | |
| 349 | st->ctrl_lb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 350 | if (ret) |
| 351 | return ret; |
| 352 | |
| 353 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 354 | AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN | |
| 355 | AD7280A_CTRL_LB_LOCK_DEV_ADDR | |
| 356 | AD7280A_CTRL_LB_MUST_SET | |
| 357 | st->ctrl_lb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 358 | if (ret) |
| 359 | return ret; |
| 360 | |
| 361 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 362 | AD7280A_CONTROL_LB << 2); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 363 | if (ret) |
| 364 | return ret; |
| 365 | |
| 366 | for (n = 0; n <= AD7280A_MAX_CHAIN; n++) { |
Lars-Peter Clausen | 93dbad6 | 2013-11-25 12:42:00 +0000 | [diff] [blame] | 367 | __ad7280_read32(st, &val); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 368 | if (val == 0) |
| 369 | return n - 1; |
| 370 | |
| 371 | if (ad7280_check_crc(st, val)) |
| 372 | return -EIO; |
| 373 | |
| 374 | if (n != AD7280A_DEVADDR(val >> 27)) |
| 375 | return -EIO; |
| 376 | } |
| 377 | |
| 378 | return -EFAULT; |
| 379 | } |
| 380 | |
| 381 | static ssize_t ad7280_show_balance_sw(struct device *dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 382 | struct device_attribute *attr, |
| 383 | char *buf) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 384 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 385 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 386 | struct ad7280_state *st = iio_priv(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 387 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 388 | |
| 389 | return sprintf(buf, "%d\n", |
| 390 | !!(st->cb_mask[this_attr->address >> 8] & |
| 391 | (1 << ((this_attr->address & 0xFF) + 2)))); |
| 392 | } |
| 393 | |
| 394 | static ssize_t ad7280_store_balance_sw(struct device *dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 395 | struct device_attribute *attr, |
| 396 | const char *buf, |
| 397 | size_t len) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 398 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 399 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 400 | struct ad7280_state *st = iio_priv(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 401 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 402 | bool readin; |
| 403 | int ret; |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 404 | unsigned int devaddr, ch; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 405 | |
| 406 | ret = strtobool(buf, &readin); |
| 407 | if (ret) |
| 408 | return ret; |
| 409 | |
| 410 | devaddr = this_attr->address >> 8; |
| 411 | ch = this_attr->address & 0xFF; |
| 412 | |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 413 | mutex_lock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 414 | if (readin) |
| 415 | st->cb_mask[devaddr] |= 1 << (ch + 2); |
| 416 | else |
| 417 | st->cb_mask[devaddr] &= ~(1 << (ch + 2)); |
| 418 | |
| 419 | ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE, |
| 420 | 0, st->cb_mask[devaddr]); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 421 | mutex_unlock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 422 | |
| 423 | return ret ? ret : len; |
| 424 | } |
| 425 | |
| 426 | static ssize_t ad7280_show_balance_timer(struct device *dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 427 | struct device_attribute *attr, |
| 428 | char *buf) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 429 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 430 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 431 | struct ad7280_state *st = iio_priv(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 432 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 433 | int ret; |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 434 | unsigned int msecs; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 435 | |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 436 | mutex_lock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 437 | ret = ad7280_read(st, this_attr->address >> 8, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 438 | this_attr->address & 0xFF); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 439 | mutex_unlock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 440 | |
| 441 | if (ret < 0) |
| 442 | return ret; |
| 443 | |
| 444 | msecs = (ret >> 3) * 71500; |
| 445 | |
Masanari Iida | fd8122d | 2014-04-28 17:00:00 +0100 | [diff] [blame] | 446 | return sprintf(buf, "%u\n", msecs); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 447 | } |
| 448 | |
| 449 | static ssize_t ad7280_store_balance_timer(struct device *dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 450 | struct device_attribute *attr, |
| 451 | const char *buf, |
| 452 | size_t len) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 453 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 454 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 455 | struct ad7280_state *st = iio_priv(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 456 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
Andreas Ruprecht | 6d3ff1c | 2011-11-29 11:43:28 +0100 | [diff] [blame] | 457 | unsigned long val; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 458 | int ret; |
| 459 | |
Andreas Ruprecht | 6d3ff1c | 2011-11-29 11:43:28 +0100 | [diff] [blame] | 460 | ret = kstrtoul(buf, 10, &val); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 461 | if (ret) |
| 462 | return ret; |
| 463 | |
| 464 | val /= 71500; |
| 465 | |
| 466 | if (val > 31) |
| 467 | return -EINVAL; |
| 468 | |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 469 | mutex_lock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 470 | ret = ad7280_write(st, this_attr->address >> 8, |
| 471 | this_attr->address & 0xFF, |
| 472 | 0, (val & 0x1F) << 3); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 473 | mutex_unlock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 474 | |
| 475 | return ret ? ret : len; |
| 476 | } |
| 477 | |
| 478 | static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN * |
| 479 | AD7280A_CELLS_PER_DEV * 2 + 1]; |
| 480 | |
Bhumika Goyal | 1ed90ff | 2016-09-26 10:31:38 +0530 | [diff] [blame] | 481 | static const struct attribute_group ad7280_attrs_group = { |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 482 | .attrs = ad7280_attributes, |
| 483 | }; |
| 484 | |
| 485 | static int ad7280_channel_init(struct ad7280_state *st) |
| 486 | { |
| 487 | int dev, ch, cnt; |
| 488 | |
Thomas Meyer | d83fb18 | 2011-11-29 22:08:00 +0100 | [diff] [blame] | 489 | st->channels = kcalloc((st->slave_num + 1) * 12 + 2, |
| 490 | sizeof(*st->channels), GFP_KERNEL); |
Ioana Ciornei | 603f102f | 2015-10-14 21:14:14 +0300 | [diff] [blame] | 491 | if (!st->channels) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 492 | return -ENOMEM; |
| 493 | |
| 494 | for (dev = 0, cnt = 0; dev <= st->slave_num; dev++) |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 495 | for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; |
| 496 | ch++, cnt++) { |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 497 | if (ch < AD7280A_AUX_ADC_1) { |
Jonathan Cameron | ade7ef7 | 2011-09-02 17:14:45 +0100 | [diff] [blame] | 498 | st->channels[cnt].type = IIO_VOLTAGE; |
| 499 | st->channels[cnt].differential = 1; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 500 | st->channels[cnt].channel = (dev * 6) + ch; |
| 501 | st->channels[cnt].channel2 = |
| 502 | st->channels[cnt].channel + 1; |
| 503 | } else { |
| 504 | st->channels[cnt].type = IIO_TEMP; |
| 505 | st->channels[cnt].channel = (dev * 6) + ch - 6; |
| 506 | } |
| 507 | st->channels[cnt].indexed = 1; |
Jonathan Cameron | 4ff30e0 | 2013-02-27 19:37:07 +0000 | [diff] [blame] | 508 | st->channels[cnt].info_mask_separate = |
| 509 | BIT(IIO_CHAN_INFO_RAW); |
| 510 | st->channels[cnt].info_mask_shared_by_type = |
| 511 | BIT(IIO_CHAN_INFO_SCALE); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 512 | st->channels[cnt].address = |
| 513 | AD7280A_DEVADDR(dev) << 8 | ch; |
| 514 | st->channels[cnt].scan_index = cnt; |
| 515 | st->channels[cnt].scan_type.sign = 'u'; |
| 516 | st->channels[cnt].scan_type.realbits = 12; |
| 517 | st->channels[cnt].scan_type.storagebits = 32; |
| 518 | st->channels[cnt].scan_type.shift = 0; |
| 519 | } |
| 520 | |
Jonathan Cameron | ade7ef7 | 2011-09-02 17:14:45 +0100 | [diff] [blame] | 521 | st->channels[cnt].type = IIO_VOLTAGE; |
| 522 | st->channels[cnt].differential = 1; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 523 | st->channels[cnt].channel = 0; |
| 524 | st->channels[cnt].channel2 = dev * 6; |
| 525 | st->channels[cnt].address = AD7280A_ALL_CELLS; |
| 526 | st->channels[cnt].indexed = 1; |
Jonathan Cameron | 4ff30e0 | 2013-02-27 19:37:07 +0000 | [diff] [blame] | 527 | st->channels[cnt].info_mask_separate = BIT(IIO_CHAN_INFO_RAW); |
| 528 | st->channels[cnt].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 529 | st->channels[cnt].scan_index = cnt; |
| 530 | st->channels[cnt].scan_type.sign = 'u'; |
| 531 | st->channels[cnt].scan_type.realbits = 32; |
| 532 | st->channels[cnt].scan_type.storagebits = 32; |
| 533 | st->channels[cnt].scan_type.shift = 0; |
| 534 | cnt++; |
| 535 | st->channels[cnt].type = IIO_TIMESTAMP; |
| 536 | st->channels[cnt].channel = -1; |
| 537 | st->channels[cnt].scan_index = cnt; |
| 538 | st->channels[cnt].scan_type.sign = 's'; |
| 539 | st->channels[cnt].scan_type.realbits = 64; |
| 540 | st->channels[cnt].scan_type.storagebits = 64; |
| 541 | st->channels[cnt].scan_type.shift = 0; |
| 542 | |
| 543 | return cnt + 1; |
| 544 | } |
| 545 | |
| 546 | static int ad7280_attr_init(struct ad7280_state *st) |
| 547 | { |
| 548 | int dev, ch, cnt; |
| 549 | |
Navya Sri Nizamkari | 7e026b6 | 2015-03-10 17:32:50 +0530 | [diff] [blame] | 550 | st->iio_attr = kcalloc(2, sizeof(*st->iio_attr) * |
| 551 | (st->slave_num + 1) * AD7280A_CELLS_PER_DEV, |
| 552 | GFP_KERNEL); |
Ioana Ciornei | 603f102f | 2015-10-14 21:14:14 +0300 | [diff] [blame] | 553 | if (!st->iio_attr) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 554 | return -ENOMEM; |
| 555 | |
| 556 | for (dev = 0, cnt = 0; dev <= st->slave_num; dev++) |
| 557 | for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6; |
| 558 | ch++, cnt++) { |
| 559 | st->iio_attr[cnt].address = |
| 560 | AD7280A_DEVADDR(dev) << 8 | ch; |
| 561 | st->iio_attr[cnt].dev_attr.attr.mode = |
| 562 | S_IWUSR | S_IRUGO; |
| 563 | st->iio_attr[cnt].dev_attr.show = |
| 564 | ad7280_show_balance_sw; |
| 565 | st->iio_attr[cnt].dev_attr.store = |
| 566 | ad7280_store_balance_sw; |
| 567 | st->iio_attr[cnt].dev_attr.attr.name = |
| 568 | kasprintf(GFP_KERNEL, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 569 | "in%d-in%d_balance_switch_en", |
| 570 | dev * AD7280A_CELLS_PER_DEV + ch, |
| 571 | dev * AD7280A_CELLS_PER_DEV + ch + 1); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 572 | ad7280_attributes[cnt] = |
| 573 | &st->iio_attr[cnt].dev_attr.attr; |
| 574 | cnt++; |
| 575 | st->iio_attr[cnt].address = |
| 576 | AD7280A_DEVADDR(dev) << 8 | |
| 577 | (AD7280A_CB1_TIMER + ch); |
| 578 | st->iio_attr[cnt].dev_attr.attr.mode = |
| 579 | S_IWUSR | S_IRUGO; |
| 580 | st->iio_attr[cnt].dev_attr.show = |
| 581 | ad7280_show_balance_timer; |
| 582 | st->iio_attr[cnt].dev_attr.store = |
| 583 | ad7280_store_balance_timer; |
| 584 | st->iio_attr[cnt].dev_attr.attr.name = |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 585 | kasprintf(GFP_KERNEL, |
| 586 | "in%d-in%d_balance_timer", |
| 587 | dev * AD7280A_CELLS_PER_DEV + ch, |
| 588 | dev * AD7280A_CELLS_PER_DEV + ch + 1); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 589 | ad7280_attributes[cnt] = |
| 590 | &st->iio_attr[cnt].dev_attr.attr; |
| 591 | } |
| 592 | |
| 593 | ad7280_attributes[cnt] = NULL; |
| 594 | |
| 595 | return 0; |
| 596 | } |
| 597 | |
| 598 | static ssize_t ad7280_read_channel_config(struct device *dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 599 | struct device_attribute *attr, |
| 600 | char *buf) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 601 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 602 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 603 | struct ad7280_state *st = iio_priv(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 604 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 605 | unsigned int val; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 606 | |
Ioana Ciornei | c30685c | 2015-10-14 21:14:15 +0300 | [diff] [blame] | 607 | switch ((u32)this_attr->address) { |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 608 | case AD7280A_CELL_OVERVOLTAGE: |
| 609 | val = 1000 + (st->cell_threshhigh * 1568) / 100; |
| 610 | break; |
| 611 | case AD7280A_CELL_UNDERVOLTAGE: |
| 612 | val = 1000 + (st->cell_threshlow * 1568) / 100; |
| 613 | break; |
| 614 | case AD7280A_AUX_ADC_OVERVOLTAGE: |
| 615 | val = (st->aux_threshhigh * 196) / 10; |
| 616 | break; |
| 617 | case AD7280A_AUX_ADC_UNDERVOLTAGE: |
| 618 | val = (st->aux_threshlow * 196) / 10; |
| 619 | break; |
| 620 | default: |
| 621 | return -EINVAL; |
| 622 | } |
| 623 | |
Masanari Iida | fd8122d | 2014-04-28 17:00:00 +0100 | [diff] [blame] | 624 | return sprintf(buf, "%u\n", val); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 625 | } |
| 626 | |
| 627 | static ssize_t ad7280_write_channel_config(struct device *dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 628 | struct device_attribute *attr, |
| 629 | const char *buf, |
| 630 | size_t len) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 631 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 632 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 633 | struct ad7280_state *st = iio_priv(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 634 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 635 | |
| 636 | long val; |
| 637 | int ret; |
| 638 | |
Aida Mynzhasova | f86f836 | 2013-05-07 00:04:41 +0400 | [diff] [blame] | 639 | ret = kstrtol(buf, 10, &val); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 640 | if (ret) |
| 641 | return ret; |
| 642 | |
Ioana Ciornei | c30685c | 2015-10-14 21:14:15 +0300 | [diff] [blame] | 643 | switch ((u32)this_attr->address) { |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 644 | case AD7280A_CELL_OVERVOLTAGE: |
| 645 | case AD7280A_CELL_UNDERVOLTAGE: |
| 646 | val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ |
| 647 | break; |
| 648 | case AD7280A_AUX_ADC_OVERVOLTAGE: |
| 649 | case AD7280A_AUX_ADC_UNDERVOLTAGE: |
| 650 | val = (val * 10) / 196; /* LSB 19.6mV */ |
| 651 | break; |
| 652 | default: |
| 653 | return -EFAULT; |
| 654 | } |
| 655 | |
| 656 | val = clamp(val, 0L, 0xFFL); |
| 657 | |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 658 | mutex_lock(&indio_dev->mlock); |
Ioana Ciornei | c30685c | 2015-10-14 21:14:15 +0300 | [diff] [blame] | 659 | switch ((u32)this_attr->address) { |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 660 | case AD7280A_CELL_OVERVOLTAGE: |
| 661 | st->cell_threshhigh = val; |
| 662 | break; |
| 663 | case AD7280A_CELL_UNDERVOLTAGE: |
| 664 | st->cell_threshlow = val; |
| 665 | break; |
| 666 | case AD7280A_AUX_ADC_OVERVOLTAGE: |
| 667 | st->aux_threshhigh = val; |
| 668 | break; |
| 669 | case AD7280A_AUX_ADC_UNDERVOLTAGE: |
| 670 | st->aux_threshlow = val; |
| 671 | break; |
| 672 | } |
| 673 | |
| 674 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, |
| 675 | this_attr->address, 1, val); |
| 676 | |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 677 | mutex_unlock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 678 | |
| 679 | return ret ? ret : len; |
| 680 | } |
| 681 | |
| 682 | static irqreturn_t ad7280_event_handler(int irq, void *private) |
| 683 | { |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 684 | struct iio_dev *indio_dev = private; |
| 685 | struct ad7280_state *st = iio_priv(indio_dev); |
Alison Schofield | 51fadb9 | 2016-03-26 12:50:24 -0700 | [diff] [blame] | 686 | unsigned int *channels; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 687 | int i, ret; |
| 688 | |
Thomas Meyer | d83fb18 | 2011-11-29 22:08:00 +0100 | [diff] [blame] | 689 | channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL); |
Ioana Ciornei | 603f102f | 2015-10-14 21:14:14 +0300 | [diff] [blame] | 690 | if (!channels) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 691 | return IRQ_HANDLED; |
| 692 | |
| 693 | ret = ad7280_read_all_channels(st, st->scan_cnt, channels); |
| 694 | if (ret < 0) |
Michael Hennerich | 703a9ce | 2011-10-26 13:38:18 +0200 | [diff] [blame] | 695 | goto out; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 696 | |
| 697 | for (i = 0; i < st->scan_cnt; i++) { |
| 698 | if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) { |
| 699 | if (((channels[i] >> 11) & 0xFFF) >= |
| 700 | st->cell_threshhigh) |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 701 | iio_push_event(indio_dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 702 | IIO_EVENT_CODE(IIO_VOLTAGE, |
| 703 | 1, |
| 704 | 0, |
| 705 | IIO_EV_DIR_RISING, |
| 706 | IIO_EV_TYPE_THRESH, |
| 707 | 0, 0, 0), |
Gregor Boirie | bc2b7da | 2016-03-09 19:05:49 +0100 | [diff] [blame] | 708 | iio_get_time_ns(indio_dev)); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 709 | else if (((channels[i] >> 11) & 0xFFF) <= |
| 710 | st->cell_threshlow) |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 711 | iio_push_event(indio_dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 712 | IIO_EVENT_CODE(IIO_VOLTAGE, |
| 713 | 1, |
| 714 | 0, |
| 715 | IIO_EV_DIR_FALLING, |
| 716 | IIO_EV_TYPE_THRESH, |
| 717 | 0, 0, 0), |
Gregor Boirie | bc2b7da | 2016-03-09 19:05:49 +0100 | [diff] [blame] | 718 | iio_get_time_ns(indio_dev)); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 719 | } else { |
| 720 | if (((channels[i] >> 11) & 0xFFF) >= st->aux_threshhigh) |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 721 | iio_push_event(indio_dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 722 | IIO_UNMOD_EVENT_CODE( |
| 723 | IIO_TEMP, |
| 724 | 0, |
| 725 | IIO_EV_TYPE_THRESH, |
| 726 | IIO_EV_DIR_RISING), |
Gregor Boirie | bc2b7da | 2016-03-09 19:05:49 +0100 | [diff] [blame] | 727 | iio_get_time_ns(indio_dev)); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 728 | else if (((channels[i] >> 11) & 0xFFF) <= |
| 729 | st->aux_threshlow) |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 730 | iio_push_event(indio_dev, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 731 | IIO_UNMOD_EVENT_CODE( |
| 732 | IIO_TEMP, |
| 733 | 0, |
| 734 | IIO_EV_TYPE_THRESH, |
| 735 | IIO_EV_DIR_FALLING), |
Gregor Boirie | bc2b7da | 2016-03-09 19:05:49 +0100 | [diff] [blame] | 736 | iio_get_time_ns(indio_dev)); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 737 | } |
| 738 | } |
| 739 | |
Michael Hennerich | 703a9ce | 2011-10-26 13:38:18 +0200 | [diff] [blame] | 740 | out: |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 741 | kfree(channels); |
| 742 | |
| 743 | return IRQ_HANDLED; |
| 744 | } |
| 745 | |
| 746 | static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value, |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 747 | in_voltage-voltage_thresh_low_value, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 748 | S_IRUGO | S_IWUSR, |
| 749 | ad7280_read_channel_config, |
| 750 | ad7280_write_channel_config, |
| 751 | AD7280A_CELL_UNDERVOLTAGE); |
| 752 | |
| 753 | static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value, |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 754 | in_voltage-voltage_thresh_high_value, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 755 | S_IRUGO | S_IWUSR, |
| 756 | ad7280_read_channel_config, |
| 757 | ad7280_write_channel_config, |
| 758 | AD7280A_CELL_OVERVOLTAGE); |
| 759 | |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 760 | static IIO_DEVICE_ATTR(in_temp_thresh_low_value, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 761 | S_IRUGO | S_IWUSR, |
| 762 | ad7280_read_channel_config, |
| 763 | ad7280_write_channel_config, |
| 764 | AD7280A_AUX_ADC_UNDERVOLTAGE); |
| 765 | |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 766 | static IIO_DEVICE_ATTR(in_temp_thresh_high_value, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 767 | S_IRUGO | S_IWUSR, |
| 768 | ad7280_read_channel_config, |
| 769 | ad7280_write_channel_config, |
| 770 | AD7280A_AUX_ADC_OVERVOLTAGE); |
| 771 | |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 772 | static struct attribute *ad7280_event_attributes[] = { |
| 773 | &iio_dev_attr_in_thresh_low_value.dev_attr.attr, |
| 774 | &iio_dev_attr_in_thresh_high_value.dev_attr.attr, |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 775 | &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr, |
| 776 | &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 777 | NULL, |
| 778 | }; |
| 779 | |
| 780 | static struct attribute_group ad7280_event_attrs_group = { |
| 781 | .attrs = ad7280_event_attributes, |
| 782 | }; |
| 783 | |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 784 | static int ad7280_read_raw(struct iio_dev *indio_dev, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 785 | struct iio_chan_spec const *chan, |
| 786 | int *val, |
| 787 | int *val2, |
| 788 | long m) |
| 789 | { |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 790 | struct ad7280_state *st = iio_priv(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 791 | int ret; |
| 792 | |
| 793 | switch (m) { |
Jonathan Cameron | b11f98f | 2012-04-15 17:41:18 +0100 | [diff] [blame] | 794 | case IIO_CHAN_INFO_RAW: |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 795 | mutex_lock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 796 | if (chan->address == AD7280A_ALL_CELLS) |
| 797 | ret = ad7280_read_all_channels(st, st->scan_cnt, NULL); |
| 798 | else |
| 799 | ret = ad7280_read_channel(st, chan->address >> 8, |
| 800 | chan->address & 0xFF); |
Jonathan Cameron | 84f79ec | 2011-10-06 17:14:37 +0100 | [diff] [blame] | 801 | mutex_unlock(&indio_dev->mlock); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 802 | |
| 803 | if (ret < 0) |
| 804 | return ret; |
| 805 | |
| 806 | *val = ret; |
| 807 | |
| 808 | return IIO_VAL_INT; |
Jonathan Cameron | c8a9f80 | 2011-10-26 17:41:36 +0100 | [diff] [blame] | 809 | case IIO_CHAN_INFO_SCALE: |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 810 | if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6) |
Lars-Peter Clausen | d6570b3 | 2013-09-28 10:31:00 +0100 | [diff] [blame] | 811 | *val = 4000; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 812 | else |
Lars-Peter Clausen | d6570b3 | 2013-09-28 10:31:00 +0100 | [diff] [blame] | 813 | *val = 5000; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 814 | |
Lars-Peter Clausen | d6570b3 | 2013-09-28 10:31:00 +0100 | [diff] [blame] | 815 | *val2 = AD7280A_BITS; |
| 816 | return IIO_VAL_FRACTIONAL_LOG2; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 817 | } |
| 818 | return -EINVAL; |
| 819 | } |
| 820 | |
| 821 | static const struct iio_info ad7280_info = { |
Shraddha Barke | 3a1d948 | 2015-10-13 21:07:48 +0530 | [diff] [blame] | 822 | .read_raw = ad7280_read_raw, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 823 | .event_attrs = &ad7280_event_attrs_group, |
| 824 | .attrs = &ad7280_attrs_group, |
| 825 | .driver_module = THIS_MODULE, |
| 826 | }; |
| 827 | |
| 828 | static const struct ad7280_platform_data ad7793_default_pdata = { |
| 829 | .acquisition_time = AD7280A_ACQ_TIME_400ns, |
| 830 | .conversion_averaging = AD7280A_CONV_AVG_DIS, |
| 831 | .thermistor_term_en = true, |
| 832 | }; |
| 833 | |
Bill Pemberton | 4ae1c61 | 2012-11-19 13:21:57 -0500 | [diff] [blame] | 834 | static int ad7280_probe(struct spi_device *spi) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 835 | { |
Nizam Haider | 22b19ab | 2015-11-23 23:03:07 +0530 | [diff] [blame] | 836 | const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 837 | struct ad7280_state *st; |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 838 | int ret; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 839 | const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890}; |
| 840 | const unsigned short nAVG[4] = {1, 2, 4, 8}; |
Sachin Kamat | 0a2f026 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 841 | struct iio_dev *indio_dev; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 842 | |
Sachin Kamat | 0a2f026 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 843 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); |
Ioana Ciornei | 603f102f | 2015-10-14 21:14:14 +0300 | [diff] [blame] | 844 | if (!indio_dev) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 845 | return -ENOMEM; |
| 846 | |
| 847 | st = iio_priv(indio_dev); |
| 848 | spi_set_drvdata(spi, indio_dev); |
| 849 | st->spi = spi; |
| 850 | |
| 851 | if (!pdata) |
| 852 | pdata = &ad7793_default_pdata; |
| 853 | |
| 854 | ad7280_crc8_build_table(st->crc_tab); |
| 855 | |
Ioana Ciornei | 5f7e280 | 2015-10-14 21:14:19 +0300 | [diff] [blame] | 856 | st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 857 | st->spi->mode = SPI_MODE_1; |
| 858 | spi_setup(st->spi); |
| 859 | |
| 860 | st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3); |
| 861 | st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging |
| 862 | & 0x3) | (pdata->thermistor_term_en ? |
| 863 | AD7280A_CTRL_LB_THERMISTOR_EN : 0); |
| 864 | |
| 865 | ret = ad7280_chain_setup(st); |
| 866 | if (ret < 0) |
Sachin Kamat | 0a2f026 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 867 | return ret; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 868 | |
| 869 | st->slave_num = ret; |
| 870 | st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; |
| 871 | st->cell_threshhigh = 0xFF; |
| 872 | st->aux_threshhigh = 0xFF; |
| 873 | |
| 874 | /* |
| 875 | * Total Conversion Time = ((tACQ + tCONV) * |
| 876 | * (Number of Conversions per Part)) − |
| 877 | * tACQ + ((N - 1) * tDELAY) |
| 878 | * |
| 879 | * Readback Delay = Total Conversion Time + tWAIT |
| 880 | */ |
| 881 | |
| 882 | st->readback_delay_us = |
| 883 | ((tACQ_ns[pdata->acquisition_time & 0x3] + 695) * |
| 884 | (AD7280A_NUM_CH * nAVG[pdata->conversion_averaging & 0x3])) |
| 885 | - tACQ_ns[pdata->acquisition_time & 0x3] + |
| 886 | st->slave_num * 250; |
| 887 | |
| 888 | /* Convert to usecs */ |
| 889 | st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); |
| 890 | st->readback_delay_us += 5; /* Add tWAIT */ |
| 891 | |
| 892 | indio_dev->name = spi_get_device_id(spi)->name; |
| 893 | indio_dev->dev.parent = &spi->dev; |
| 894 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 895 | |
| 896 | ret = ad7280_channel_init(st); |
| 897 | if (ret < 0) |
Sachin Kamat | 0a2f026 | 2013-08-31 18:12:00 +0100 | [diff] [blame] | 898 | return ret; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 899 | |
| 900 | indio_dev->num_channels = ret; |
| 901 | indio_dev->channels = st->channels; |
| 902 | indio_dev->info = &ad7280_info; |
| 903 | |
| 904 | ret = ad7280_attr_init(st); |
| 905 | if (ret < 0) |
| 906 | goto error_free_channels; |
| 907 | |
| 908 | ret = iio_device_register(indio_dev); |
| 909 | if (ret) |
| 910 | goto error_free_attr; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 911 | |
| 912 | if (spi->irq > 0) { |
| 913 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, |
| 914 | AD7280A_ALERT, 1, |
| 915 | AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); |
| 916 | if (ret) |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 917 | goto error_unregister; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 918 | |
| 919 | ret = ad7280_write(st, AD7280A_DEVADDR(st->slave_num), |
| 920 | AD7280A_ALERT, 0, |
| 921 | AD7280A_ALERT_GEN_STATIC_HIGH | |
| 922 | (pdata->chain_last_alert_ignore & 0xF)); |
| 923 | if (ret) |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 924 | goto error_unregister; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 925 | |
| 926 | ret = request_threaded_irq(spi->irq, |
| 927 | NULL, |
| 928 | ad7280_event_handler, |
| 929 | IRQF_TRIGGER_FALLING | |
| 930 | IRQF_ONESHOT, |
| 931 | indio_dev->name, |
| 932 | indio_dev); |
| 933 | if (ret) |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 934 | goto error_unregister; |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 935 | } |
| 936 | |
| 937 | return 0; |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 938 | error_unregister: |
| 939 | iio_device_unregister(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 940 | |
| 941 | error_free_attr: |
| 942 | kfree(st->iio_attr); |
| 943 | |
| 944 | error_free_channels: |
| 945 | kfree(st->channels); |
| 946 | |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 947 | return ret; |
| 948 | } |
| 949 | |
Bill Pemberton | 447d4f2 | 2012-11-19 13:26:37 -0500 | [diff] [blame] | 950 | static int ad7280_remove(struct spi_device *spi) |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 951 | { |
| 952 | struct iio_dev *indio_dev = spi_get_drvdata(spi); |
| 953 | struct ad7280_state *st = iio_priv(indio_dev); |
| 954 | |
| 955 | if (spi->irq > 0) |
| 956 | free_irq(spi->irq, indio_dev); |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 957 | iio_device_unregister(indio_dev); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 958 | |
| 959 | ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, |
Ioana Ciornei | e8ef49f | 2015-10-14 21:14:13 +0300 | [diff] [blame] | 960 | AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 961 | |
| 962 | kfree(st->channels); |
| 963 | kfree(st->iio_attr); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 964 | |
| 965 | return 0; |
| 966 | } |
| 967 | |
| 968 | static const struct spi_device_id ad7280_id[] = { |
| 969 | {"ad7280a", 0}, |
| 970 | {} |
| 971 | }; |
Lars-Peter Clausen | 55e4390 | 2011-11-16 08:53:31 +0100 | [diff] [blame] | 972 | MODULE_DEVICE_TABLE(spi, ad7280_id); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 973 | |
| 974 | static struct spi_driver ad7280_driver = { |
| 975 | .driver = { |
| 976 | .name = "ad7280", |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 977 | }, |
| 978 | .probe = ad7280_probe, |
Bill Pemberton | e543acf | 2012-11-19 13:21:38 -0500 | [diff] [blame] | 979 | .remove = ad7280_remove, |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 980 | .id_table = ad7280_id, |
| 981 | }; |
Lars-Peter Clausen | ae6ae6f | 2011-11-16 10:13:39 +0100 | [diff] [blame] | 982 | module_spi_driver(ad7280_driver); |
Michael Hennerich | 2051f25 | 2011-07-20 15:03:09 +0200 | [diff] [blame] | 983 | |
| 984 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
| 985 | MODULE_DESCRIPTION("Analog Devices AD7280A"); |
| 986 | MODULE_LICENSE("GPL v2"); |