blob: 0290fab383da8864086e7e617051a15b65d3b1e7 [file] [log] [blame]
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +02001/*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * You should have received a copy of the GNU General Public License along
9 * with this program; if not, write to the Free Software Foundation, Inc.,
10 * 675 Mass Ave, Cambridge, MA 02139, USA.
11 *
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
Axel Lin68bfcaf2011-12-06 15:19:00 +080018#include <linux/io.h>
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +020019#include <linux/regmap.h>
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020020
21#include <linux/delay.h>
22
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/initval.h>
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020027#include <sound/soc.h>
Lars-Peter Clausena484a9a2012-10-27 17:15:06 +020028#include <sound/tlv.h>
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020029
30#define JZ4740_REG_CODEC_1 0x0
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +020031#define JZ4740_REG_CODEC_2 0x4
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020032
33#define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
34#define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
35#define JZ4740_CODEC_1_SW1_ENABLE BIT(27)
36#define JZ4740_CODEC_1_ADC_ENABLE BIT(26)
37#define JZ4740_CODEC_1_SW2_ENABLE BIT(25)
38#define JZ4740_CODEC_1_DAC_ENABLE BIT(24)
39#define JZ4740_CODEC_1_VREF_DISABLE BIT(20)
40#define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19)
41#define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18)
42#define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17)
43#define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16)
44#define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14)
45#define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13)
46#define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12)
47#define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) | BIT(10))
48#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9)
49#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8)
50#define JZ4740_CODEC_1_SUSPEND BIT(1)
51#define JZ4740_CODEC_1_RESET BIT(0)
52
53#define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29
54#define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28
55#define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27
56#define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26
57#define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25
58#define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24
59#define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14
60#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8
61
62#define JZ4740_CODEC_2_INPUT_VOLUME_MASK 0x1f0000
63#define JZ4740_CODEC_2_SAMPLE_RATE_MASK 0x000f00
64#define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK 0x000030
65#define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK 0x000003
66
67#define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET 16
68#define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET 8
69#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4
70#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0
71
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +020072static const struct reg_default jz4740_codec_reg_defaults[] = {
73 { JZ4740_REG_CODEC_1, 0x021b2302 },
74 { JZ4740_REG_CODEC_2, 0x00170803 },
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020075};
76
77struct jz4740_codec {
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +020078 struct regmap *regmap;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020079};
80
Lars-Peter Clausen4689ac52015-08-02 17:19:40 +020081static const DECLARE_TLV_DB_RANGE(jz4740_mic_tlv,
Lars-Peter Clausena484a9a2012-10-27 17:15:06 +020082 0, 2, TLV_DB_SCALE_ITEM(0, 600, 0),
Lars-Peter Clausen4689ac52015-08-02 17:19:40 +020083 3, 3, TLV_DB_SCALE_ITEM(2000, 0, 0)
84);
Lars-Peter Clausena484a9a2012-10-27 17:15:06 +020085
86static const DECLARE_TLV_DB_SCALE(jz4740_out_tlv, 0, 200, 0);
87static const DECLARE_TLV_DB_SCALE(jz4740_in_tlv, -3450, 150, 0);
88
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020089static const struct snd_kcontrol_new jz4740_codec_controls[] = {
Lars-Peter Clausena484a9a2012-10-27 17:15:06 +020090 SOC_SINGLE_TLV("Master Playback Volume", JZ4740_REG_CODEC_2,
91 JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0,
92 jz4740_out_tlv),
93 SOC_SINGLE_TLV("Master Capture Volume", JZ4740_REG_CODEC_2,
94 JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0,
95 jz4740_in_tlv),
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020096 SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1,
97 JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1),
Lars-Peter Clausena484a9a2012-10-27 17:15:06 +020098 SOC_SINGLE_TLV("Mic Capture Volume", JZ4740_REG_CODEC_2,
99 JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0,
100 jz4740_mic_tlv),
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200101};
102
103static const struct snd_kcontrol_new jz4740_codec_output_controls[] = {
104 SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1,
105 JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0),
106 SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1,
107 JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0),
108};
109
110static const struct snd_kcontrol_new jz4740_codec_input_controls[] = {
111 SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1,
112 JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0),
113 SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1,
114 JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0),
115};
116
117static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets[] = {
118 SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1,
119 JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0),
120 SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1,
121 JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0),
122
123 SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1,
124 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET, 1,
125 jz4740_codec_output_controls,
126 ARRAY_SIZE(jz4740_codec_output_controls)),
127
128 SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
129 jz4740_codec_input_controls,
130 ARRAY_SIZE(jz4740_codec_input_controls)),
131 SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
132
133 SND_SOC_DAPM_OUTPUT("LOUT"),
134 SND_SOC_DAPM_OUTPUT("ROUT"),
135
136 SND_SOC_DAPM_INPUT("MIC"),
137 SND_SOC_DAPM_INPUT("LIN"),
138 SND_SOC_DAPM_INPUT("RIN"),
139};
140
141static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = {
142 {"Line Input", NULL, "LIN"},
143 {"Line Input", NULL, "RIN"},
144
145 {"Input Mixer", "Line Capture Switch", "Line Input"},
146 {"Input Mixer", "Mic Capture Switch", "MIC"},
147
148 {"ADC", NULL, "Input Mixer"},
149
150 {"Output Mixer", "Bypass Switch", "Input Mixer"},
151 {"Output Mixer", "DAC Switch", "DAC"},
152
153 {"LOUT", NULL, "Output Mixer"},
154 {"ROUT", NULL, "Output Mixer"},
155};
156
157static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
158 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
159{
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200160 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(dai->codec);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200161 uint32_t val;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200162
163 switch (params_rate(params)) {
164 case 8000:
165 val = 0;
166 break;
167 case 11025:
168 val = 1;
169 break;
170 case 12000:
171 val = 2;
172 break;
173 case 16000:
174 val = 3;
175 break;
176 case 22050:
177 val = 4;
178 break;
179 case 24000:
180 val = 5;
181 break;
182 case 32000:
183 val = 6;
184 break;
185 case 44100:
186 val = 7;
187 break;
188 case 48000:
189 val = 8;
190 break;
191 default:
192 return -EINVAL;
193 }
194
195 val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;
196
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200197 regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_2,
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200198 JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);
199
200 return 0;
201}
202
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100203static const struct snd_soc_dai_ops jz4740_codec_dai_ops = {
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200204 .hw_params = jz4740_codec_hw_params,
205};
206
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000207static struct snd_soc_dai_driver jz4740_codec_dai = {
208 .name = "jz4740-hifi",
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200209 .playback = {
210 .stream_name = "Playback",
211 .channels_min = 2,
212 .channels_max = 2,
213 .rates = SNDRV_PCM_RATE_8000_48000,
214 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
215 },
216 .capture = {
217 .stream_name = "Capture",
218 .channels_min = 2,
219 .channels_max = 2,
220 .rates = SNDRV_PCM_RATE_8000_48000,
221 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
222 },
223 .ops = &jz4740_codec_dai_ops,
224 .symmetric_rates = 1,
225};
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200226
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200227static void jz4740_codec_wakeup(struct regmap *regmap)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200228{
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200229 regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200230 JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
231 udelay(2);
232
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200233 regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200234 JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);
235
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200236 regcache_sync(regmap);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200237}
238
239static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
240 enum snd_soc_bias_level level)
241{
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200242 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
243 struct regmap *regmap = jz4740_codec->regmap;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200244 unsigned int mask;
245 unsigned int value;
246
247 switch (level) {
248 case SND_SOC_BIAS_ON:
249 break;
250 case SND_SOC_BIAS_PREPARE:
251 mask = JZ4740_CODEC_1_VREF_DISABLE |
252 JZ4740_CODEC_1_VREF_AMP_DISABLE |
253 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
254 value = 0;
255
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200256 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200257 break;
258 case SND_SOC_BIAS_STANDBY:
259 /* The only way to clear the suspend flag is to reset the codec */
Lars-Peter Clausen40d62f22015-05-11 09:42:31 +0200260 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200261 jz4740_codec_wakeup(regmap);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200262
263 mask = JZ4740_CODEC_1_VREF_DISABLE |
264 JZ4740_CODEC_1_VREF_AMP_DISABLE |
265 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
266 value = JZ4740_CODEC_1_VREF_DISABLE |
267 JZ4740_CODEC_1_VREF_AMP_DISABLE |
268 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
269
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200270 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200271 break;
272 case SND_SOC_BIAS_OFF:
273 mask = JZ4740_CODEC_1_SUSPEND;
274 value = JZ4740_CODEC_1_SUSPEND;
275
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200276 regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
277 regcache_mark_dirty(regmap);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200278 break;
279 default:
280 break;
281 }
282
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200283 return 0;
284}
285
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000286static int jz4740_codec_dev_probe(struct snd_soc_codec *codec)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200287{
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200288 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
289
290 regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_1,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000291 JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200292
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200293 return 0;
294}
295
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000296static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = {
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200297 .probe = jz4740_codec_dev_probe,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000298 .set_bias_level = jz4740_codec_set_bias_level,
Lars-Peter Clausen2a93f702014-09-06 14:29:33 +0200299 .suspend_bias_off = true,
Lars-Peter Clausen67447912011-04-12 19:33:29 +0200300
Kuninori Morimotoaf15dc72016-08-08 09:17:19 +0000301 .component_driver = {
302 .controls = jz4740_codec_controls,
303 .num_controls = ARRAY_SIZE(jz4740_codec_controls),
304 .dapm_widgets = jz4740_codec_dapm_widgets,
305 .num_dapm_widgets = ARRAY_SIZE(jz4740_codec_dapm_widgets),
306 .dapm_routes = jz4740_codec_dapm_routes,
307 .num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes),
308 },
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200309};
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200310
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200311static const struct regmap_config jz4740_codec_regmap_config = {
312 .reg_bits = 32,
313 .reg_stride = 4,
314 .val_bits = 32,
315 .max_register = JZ4740_REG_CODEC_2,
316
317 .reg_defaults = jz4740_codec_reg_defaults,
318 .num_reg_defaults = ARRAY_SIZE(jz4740_codec_reg_defaults),
319 .cache_type = REGCACHE_RBTREE,
320};
321
Bill Pemberton7a79e942012-12-07 09:26:37 -0500322static int jz4740_codec_probe(struct platform_device *pdev)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200323{
324 int ret;
325 struct jz4740_codec *jz4740_codec;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200326 struct resource *mem;
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200327 void __iomem *base;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200328
Axel Lin558460c2011-12-26 20:55:01 +0800329 jz4740_codec = devm_kzalloc(&pdev->dev, sizeof(*jz4740_codec),
330 GFP_KERNEL);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200331 if (!jz4740_codec)
332 return -ENOMEM;
333
334 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Thierry Redingb25b5aa2013-01-21 11:09:26 +0100335 base = devm_ioremap_resource(&pdev->dev, mem);
336 if (IS_ERR(base))
337 return PTR_ERR(base);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200338
Lars-Peter Clausendd1b18a2012-10-27 17:15:08 +0200339 jz4740_codec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
340 &jz4740_codec_regmap_config);
341 if (IS_ERR(jz4740_codec->regmap))
342 return PTR_ERR(jz4740_codec->regmap);
343
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200344 platform_set_drvdata(pdev, jz4740_codec);
345
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000346 ret = snd_soc_register_codec(&pdev->dev,
347 &soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1);
Lars-Peter Clausen355d74b2012-10-27 17:15:07 +0200348 if (ret)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200349 dev_err(&pdev->dev, "Failed to register codec\n");
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200350
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200351 return ret;
352}
353
Bill Pemberton7a79e942012-12-07 09:26:37 -0500354static int jz4740_codec_remove(struct platform_device *pdev)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200355{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000356 snd_soc_unregister_codec(&pdev->dev);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200357
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200358 return 0;
359}
360
361static struct platform_driver jz4740_codec_driver = {
362 .probe = jz4740_codec_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -0500363 .remove = jz4740_codec_remove,
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200364 .driver = {
365 .name = "jz4740-codec",
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200366 },
367};
368
Mark Brown5bbcc3c2011-11-23 22:52:08 +0000369module_platform_driver(jz4740_codec_driver);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200370
371MODULE_DESCRIPTION("JZ4740 SoC internal codec driver");
372MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
373MODULE_LICENSE("GPL v2");
374MODULE_ALIAS("platform:jz4740-codec");