| Anju T | dc642e8 | 2016-02-20 10:32:47 +0530 | [diff] [blame] | 1 | #ifndef ARCH_PERF_REGS_H |
| 2 | #define ARCH_PERF_REGS_H |
| 3 | |
| 4 | #include <stdlib.h> |
| 5 | #include <linux/types.h> |
| 6 | #include <asm/perf_regs.h> |
| 7 | |
| Ravi Bangoria | d18019a | 2016-09-19 02:38:20 -0400 | [diff] [blame] | 8 | void perf_regs_load(u64 *regs); |
| 9 | |
| Anju T | dc642e8 | 2016-02-20 10:32:47 +0530 | [diff] [blame] | 10 | #define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1) |
| 11 | #define PERF_REGS_MAX PERF_REG_POWERPC_MAX |
| 12 | #ifdef __powerpc64__ |
| 13 | #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64 |
| 14 | #else |
| 15 | #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_32 |
| 16 | #endif |
| 17 | |
| 18 | #define PERF_REG_IP PERF_REG_POWERPC_NIP |
| 19 | #define PERF_REG_SP PERF_REG_POWERPC_R1 |
| 20 | |
| 21 | static const char *reg_names[] = { |
| 22 | [PERF_REG_POWERPC_R0] = "r0", |
| 23 | [PERF_REG_POWERPC_R1] = "r1", |
| 24 | [PERF_REG_POWERPC_R2] = "r2", |
| 25 | [PERF_REG_POWERPC_R3] = "r3", |
| 26 | [PERF_REG_POWERPC_R4] = "r4", |
| 27 | [PERF_REG_POWERPC_R5] = "r5", |
| 28 | [PERF_REG_POWERPC_R6] = "r6", |
| 29 | [PERF_REG_POWERPC_R7] = "r7", |
| 30 | [PERF_REG_POWERPC_R8] = "r8", |
| 31 | [PERF_REG_POWERPC_R9] = "r9", |
| 32 | [PERF_REG_POWERPC_R10] = "r10", |
| 33 | [PERF_REG_POWERPC_R11] = "r11", |
| 34 | [PERF_REG_POWERPC_R12] = "r12", |
| 35 | [PERF_REG_POWERPC_R13] = "r13", |
| 36 | [PERF_REG_POWERPC_R14] = "r14", |
| 37 | [PERF_REG_POWERPC_R15] = "r15", |
| 38 | [PERF_REG_POWERPC_R16] = "r16", |
| 39 | [PERF_REG_POWERPC_R17] = "r17", |
| 40 | [PERF_REG_POWERPC_R18] = "r18", |
| 41 | [PERF_REG_POWERPC_R19] = "r19", |
| 42 | [PERF_REG_POWERPC_R20] = "r20", |
| 43 | [PERF_REG_POWERPC_R21] = "r21", |
| 44 | [PERF_REG_POWERPC_R22] = "r22", |
| 45 | [PERF_REG_POWERPC_R23] = "r23", |
| 46 | [PERF_REG_POWERPC_R24] = "r24", |
| 47 | [PERF_REG_POWERPC_R25] = "r25", |
| 48 | [PERF_REG_POWERPC_R26] = "r26", |
| 49 | [PERF_REG_POWERPC_R27] = "r27", |
| 50 | [PERF_REG_POWERPC_R28] = "r28", |
| 51 | [PERF_REG_POWERPC_R29] = "r29", |
| 52 | [PERF_REG_POWERPC_R30] = "r30", |
| 53 | [PERF_REG_POWERPC_R31] = "r31", |
| 54 | [PERF_REG_POWERPC_NIP] = "nip", |
| 55 | [PERF_REG_POWERPC_MSR] = "msr", |
| 56 | [PERF_REG_POWERPC_ORIG_R3] = "orig_r3", |
| 57 | [PERF_REG_POWERPC_CTR] = "ctr", |
| 58 | [PERF_REG_POWERPC_LINK] = "link", |
| 59 | [PERF_REG_POWERPC_XER] = "xer", |
| 60 | [PERF_REG_POWERPC_CCR] = "ccr", |
| 61 | [PERF_REG_POWERPC_SOFTE] = "softe", |
| 62 | [PERF_REG_POWERPC_TRAP] = "trap", |
| 63 | [PERF_REG_POWERPC_DAR] = "dar", |
| 64 | [PERF_REG_POWERPC_DSISR] = "dsisr" |
| 65 | }; |
| 66 | |
| 67 | static inline const char *perf_reg_name(int id) |
| 68 | { |
| 69 | return reg_names[id]; |
| 70 | } |
| 71 | #endif /* ARCH_PERF_REGS_H */ |