| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef __ASM_I8259_H__ |
| 2 | #define __ASM_I8259_H__ |
| 3 | |
| 4 | extern unsigned int cached_irq_mask; |
| 5 | |
| Thomas Gleixner | f20ebee | 2008-01-30 13:30:29 +0100 | [diff] [blame] | 6 | #define __byte(x,y) (((unsigned char *) &(y))[x]) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #define cached_master_mask (__byte(0, cached_irq_mask)) |
| 8 | #define cached_slave_mask (__byte(1, cached_irq_mask)) |
| 9 | |
| Thomas Gleixner | f20ebee | 2008-01-30 13:30:29 +0100 | [diff] [blame] | 10 | /* i8259A PIC registers */ |
| 11 | #define PIC_MASTER_CMD 0x20 |
| 12 | #define PIC_MASTER_IMR 0x21 |
| 13 | #define PIC_MASTER_ISR PIC_MASTER_CMD |
| 14 | #define PIC_MASTER_POLL PIC_MASTER_ISR |
| 15 | #define PIC_MASTER_OCW3 PIC_MASTER_ISR |
| 16 | #define PIC_SLAVE_CMD 0xa0 |
| 17 | #define PIC_SLAVE_IMR 0xa1 |
| 18 | |
| 19 | /* i8259A PIC related value */ |
| 20 | #define PIC_CASCADE_IR 2 |
| 21 | #define MASTER_ICW4_DEFAULT 0x01 |
| 22 | #define SLAVE_ICW4_DEFAULT 0x01 |
| 23 | #define PIC_ICW4_AEOI 2 |
| 24 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | extern spinlock_t i8259A_lock; |
| 26 | |
| 27 | extern void init_8259A(int auto_eoi); |
| 28 | extern void enable_8259A_irq(unsigned int irq); |
| 29 | extern void disable_8259A_irq(unsigned int irq); |
| 30 | extern unsigned int startup_8259A_irq(unsigned int irq); |
| 31 | |
| Alan Cox | 466eed2 | 2008-01-30 13:33:14 +0100 | [diff] [blame] | 32 | #define inb_pic inb_p |
| 33 | #define outb_pic outb_p |
| 34 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #endif /* __ASM_I8259_H__ */ |