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Paolo 'Blaisorblade' Giarrusso85977372005-11-13 16:07:06 -08001menu "Host processor type and features"
2
Al Viro7a78a172007-10-29 04:34:31 +00003source "arch/x86/Kconfig.cpu"
Paolo 'Blaisorblade' Giarrusso85977372005-11-13 16:07:06 -08004
5endmenu
6
Paolo 'Blaisorblade' Giarrussoc45166be32005-05-01 08:58:54 -07007config UML_X86
Jeff Dike54d67ee2007-12-01 12:16:28 -08008 def_bool y
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Paolo 'Blaisorblade' Giarrussoc45166be32005-05-01 08:58:54 -070010config 64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 bool
Al Viro41984262008-08-23 17:00:34 -040012 default SUBARCH = "x86_64"
13
14config X86_32
15 def_bool !64BIT
16 select HAVE_AOUT
17
18config RWSEM_XCHGADD_ALGORITHM
19 def_bool X86_XADD
20
21config RWSEM_GENERIC_SPINLOCK
22 def_bool !X86_XADD
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Linus Torvalds1da177e2005-04-16 15:20:36 -070024config 3_LEVEL_PGTABLES
Al Viro41984262008-08-23 17:00:34 -040025 bool "Three-level pagetables (EXPERIMENTAL)" if !64BIT
26 default 64BIT
Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080027 depends on EXPERIMENTAL
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 help
29 Three-level pagetables will let UML have more than 4G of physical
30 memory. All the memory that can't be mapped directly will be treated
31 as high memory.
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Paolo 'Blaisorblade' Giarrussoce2d2ae2006-01-18 17:42:59 -080033 However, this it experimental on 32-bit architectures, so if unsure say
34 N (on x86-64 it's automatically enabled, instead, as it's safe there).
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Linus Torvalds1da177e2005-04-16 15:20:36 -070036config ARCH_HAS_SC_SIGNALS
Al Viro41984262008-08-23 17:00:34 -040037 def_bool !64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
39config ARCH_REUSE_HOST_VSYSCALL_AREA
Al Viro41984262008-08-23 17:00:34 -040040 def_bool !64BIT
41
42config SMP_BROKEN
43 def_bool 64BIT
Akinobu Mitaf214ef32006-03-26 01:38:59 -080044
45config GENERIC_HWEIGHT
Al Viro41984262008-08-23 17:00:34 -040046 def_bool y