blob: 5ec24fd801cd2bb1b32b66540b91edcca2ef3b6d [file] [log] [blame]
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +00001/**************************************************************************
2 *
Sinclair Yeh54fbde82015-07-29 12:38:02 -07003 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +00004 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
David Howells760285e2012-10-02 18:01:07 +010029#include <drm/vmwgfx_drm.h>
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +020030#include "vmwgfx_kms.h"
Sinclair Yeh8ce75f82015-07-08 21:20:39 -070031#include "device_include/svga3d_caps.h"
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +000032
Thomas Hellstroma6fc9552014-01-31 10:21:10 +010033struct svga_3d_compat_cap {
34 SVGA3dCapsRecordHeader header;
35 SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
36};
37
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +000038int vmw_getparam_ioctl(struct drm_device *dev, void *data,
39 struct drm_file *file_priv)
40{
41 struct vmw_private *dev_priv = vmw_priv(dev);
42 struct drm_vmw_getparam_arg *param =
43 (struct drm_vmw_getparam_arg *)data;
Thomas Hellstroma6fc9552014-01-31 10:21:10 +010044 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +000045
46 switch (param->param) {
47 case DRM_VMW_PARAM_NUM_STREAMS:
48 param->value = vmw_overlay_num_overlays(dev_priv);
49 break;
50 case DRM_VMW_PARAM_NUM_FREE_STREAMS:
51 param->value = vmw_overlay_num_free_overlays(dev_priv);
52 break;
53 case DRM_VMW_PARAM_3D:
Jakob Bornecrantz8e19a952010-01-30 03:38:06 +000054 param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +000055 break;
Thomas Hellstromf77cef32010-02-09 19:41:55 +000056 case DRM_VMW_PARAM_HW_CAPS:
57 param->value = dev_priv->capabilities;
58 break;
59 case DRM_VMW_PARAM_FIFO_CAPS:
60 param->value = dev_priv->fifo.capabilities;
61 break;
Thomas Hellstrom30f47fc82010-10-05 12:43:06 +020062 case DRM_VMW_PARAM_MAX_FB_SIZE:
Thomas Hellstrombc2d6502012-11-21 10:32:36 +010063 param->value = dev_priv->prim_bb_mem;
Thomas Hellstrom30f47fc82010-10-05 12:43:06 +020064 break;
Thomas Hellstromf63f6a52011-09-01 20:18:41 +000065 case DRM_VMW_PARAM_FIFO_HW_VERSION:
66 {
Thomas Hellstromb76ff5e2015-10-28 10:44:04 +010067 u32 *fifo_mem = dev_priv->mmio_virt;
Thomas Hellstromebd4c6f2011-11-28 13:19:08 +010068 const struct vmw_fifo_state *fifo = &dev_priv->fifo;
Thomas Hellstromf63f6a52011-09-01 20:18:41 +000069
Thomas Hellstroma6fc9552014-01-31 10:21:10 +010070 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
71 param->value = SVGA3D_HWVERSION_WS8_B1;
72 break;
73 }
74
Thomas Hellstromebd4c6f2011-11-28 13:19:08 +010075 param->value =
Thomas Hellstromb76ff5e2015-10-28 10:44:04 +010076 vmw_mmio_read(fifo_mem +
77 ((fifo->capabilities &
78 SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
79 SVGA_FIFO_3D_HWVERSION_REVISED :
80 SVGA_FIFO_3D_HWVERSION));
Thomas Hellstromf63f6a52011-09-01 20:18:41 +000081 break;
82 }
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +010083 case DRM_VMW_PARAM_MAX_SURF_MEMORY:
Thomas Hellstroma6fc9552014-01-31 10:21:10 +010084 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
85 !vmw_fp->gb_aware)
86 param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
87 else
88 param->value = dev_priv->memory_size;
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +010089 break;
90 case DRM_VMW_PARAM_3D_CAPS_SIZE:
Thomas Hellstroma6fc9552014-01-31 10:21:10 +010091 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
92 vmw_fp->gb_aware)
93 param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
94 else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
95 param->value = sizeof(struct svga_3d_compat_cap) +
96 sizeof(uint32_t);
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +010097 else
98 param->value = (SVGA_FIFO_3D_CAPS_LAST -
Thomas Hellstroma6fc9552014-01-31 10:21:10 +010099 SVGA_FIFO_3D_CAPS + 1) *
100 sizeof(uint32_t);
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100101 break;
Thomas Hellstrom311474d2012-11-21 12:34:47 +0100102 case DRM_VMW_PARAM_MAX_MOB_MEMORY:
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100103 vmw_fp->gb_aware = true;
Thomas Hellstrom311474d2012-11-21 12:34:47 +0100104 param->value = dev_priv->max_mob_pages * PAGE_SIZE;
105 break;
Charmaine Lee857aea12014-02-12 12:07:38 +0100106 case DRM_VMW_PARAM_MAX_MOB_SIZE:
107 param->value = dev_priv->max_mob_size;
108 break;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700109 case DRM_VMW_PARAM_SCREEN_TARGET:
110 param->value =
111 (dev_priv->active_display_unit == vmw_du_screen_target);
112 break;
Thomas Hellstromd80efd52015-08-10 10:39:35 -0700113 case DRM_VMW_PARAM_DX:
114 param->value = dev_priv->has_dx;
115 break;
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000116 default:
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000117 return -EINVAL;
118 }
119
120 return 0;
121}
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000122
Thomas Hellstrom53c1e532015-10-26 04:42:31 -0700123static u32 vmw_mask_multisample(unsigned int cap, u32 fmt_value)
124{
125 /* If the header is updated, update the format test as well! */
126 BUILD_BUG_ON(SVGA3D_DEVCAP_DXFMT_BC5_UNORM + 1 != SVGA3D_DEVCAP_MAX);
127
128 if (cap >= SVGA3D_DEVCAP_DXFMT_X8R8G8B8 &&
129 cap <= SVGA3D_DEVCAP_DXFMT_BC5_UNORM)
130 fmt_value &= ~(SVGADX_DXFMT_MULTISAMPLE_2 |
131 SVGADX_DXFMT_MULTISAMPLE_4 |
132 SVGADX_DXFMT_MULTISAMPLE_8);
133 else if (cap == SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES)
134 return 0;
135
136 return fmt_value;
137}
138
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100139static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
140 size_t size)
141{
142 struct svga_3d_compat_cap *compat_cap =
143 (struct svga_3d_compat_cap *) bounce;
144 unsigned int i;
145 size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
146 unsigned int max_size;
147
148 if (size < pair_offset)
149 return -EINVAL;
150
151 max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);
152
153 if (max_size > SVGA3D_DEVCAP_MAX)
154 max_size = SVGA3D_DEVCAP_MAX;
155
156 compat_cap->header.length =
157 (pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
158 compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;
159
Thomas Hellstrom496eb6f2015-01-14 02:33:39 -0800160 spin_lock(&dev_priv->cap_lock);
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100161 for (i = 0; i < max_size; ++i) {
162 vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
163 compat_cap->pairs[i][0] = i;
Thomas Hellstrom53c1e532015-10-26 04:42:31 -0700164 compat_cap->pairs[i][1] = vmw_mask_multisample
165 (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100166 }
Thomas Hellstrom496eb6f2015-01-14 02:33:39 -0800167 spin_unlock(&dev_priv->cap_lock);
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100168
169 return 0;
170}
171
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000172
173int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
174 struct drm_file *file_priv)
175{
176 struct drm_vmw_get_3d_cap_arg *arg =
177 (struct drm_vmw_get_3d_cap_arg *) data;
178 struct vmw_private *dev_priv = vmw_priv(dev);
179 uint32_t size;
Thomas Hellstromb76ff5e2015-10-28 10:44:04 +0100180 u32 *fifo_mem;
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000181 void __user *buffer = (void __user *)((unsigned long)(arg->buffer));
182 void *bounce;
183 int ret;
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100184 bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100185 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000186
Murray McAllister604d2ea2017-03-27 11:15:12 +0200187 if (unlikely(arg->pad64 != 0 || arg->max_size == 0)) {
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000188 DRM_ERROR("Illegal GET_3D_CAP argument.\n");
189 return -EINVAL;
190 }
191
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100192 if (gb_objects && vmw_fp->gb_aware)
193 size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
194 else if (gb_objects)
195 size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100196 else
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100197 size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
198 sizeof(uint32_t);
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000199
200 if (arg->max_size < size)
201 size = arg->max_size;
202
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100203 bounce = vzalloc(size);
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000204 if (unlikely(bounce == NULL)) {
205 DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
206 return -ENOMEM;
207 }
208
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100209 if (gb_objects && vmw_fp->gb_aware) {
210 int i, num;
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100211 uint32_t *bounce32 = (uint32_t *) bounce;
212
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100213 num = size / sizeof(uint32_t);
Charmaine Lee2f633e52015-08-10 10:45:11 -0700214 if (num > SVGA3D_DEVCAP_MAX)
215 num = SVGA3D_DEVCAP_MAX;
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100216
Thomas Hellstrom496eb6f2015-01-14 02:33:39 -0800217 spin_lock(&dev_priv->cap_lock);
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100218 for (i = 0; i < num; ++i) {
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100219 vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
Thomas Hellstrom53c1e532015-10-26 04:42:31 -0700220 *bounce32++ = vmw_mask_multisample
221 (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100222 }
Thomas Hellstrom496eb6f2015-01-14 02:33:39 -0800223 spin_unlock(&dev_priv->cap_lock);
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100224 } else if (gb_objects) {
225 ret = vmw_fill_compat_cap(dev_priv, bounce, size);
226 if (unlikely(ret != 0))
227 goto out_err;
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100228 } else {
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100229 fifo_mem = dev_priv->mmio_virt;
Thomas Hellstromb76ff5e2015-10-28 10:44:04 +0100230 memcpy(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
Thomas Hellstrom716a2fd2012-11-21 10:37:20 +0100231 }
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000232
233 ret = copy_to_user(buffer, bounce, size);
Dan Carpenter888155b2012-11-12 11:07:24 +0000234 if (ret)
235 ret = -EFAULT;
Thomas Hellstroma6fc9552014-01-31 10:21:10 +0100236out_err:
Thomas Hellstromf63f6a52011-09-01 20:18:41 +0000237 vfree(bounce);
238
239 if (unlikely(ret != 0))
240 DRM_ERROR("Failed to report 3D caps info.\n");
241
242 return ret;
243}
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200244
245int vmw_present_ioctl(struct drm_device *dev, void *data,
246 struct drm_file *file_priv)
247{
248 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
249 struct vmw_private *dev_priv = vmw_priv(dev);
250 struct drm_vmw_present_arg *arg =
251 (struct drm_vmw_present_arg *)data;
252 struct vmw_surface *surface;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200253 struct drm_vmw_rect __user *clips_ptr;
254 struct drm_vmw_rect *clips = NULL;
Daniel Vetter786b99e2012-12-02 21:53:40 +0100255 struct drm_framebuffer *fb;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200256 struct vmw_framebuffer *vfb;
Thomas Hellstromc0951b72012-11-20 12:19:35 +0000257 struct vmw_resource *res;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200258 uint32_t num_clips;
259 int ret;
260
261 num_clips = arg->num_clips;
Thomas Hellstromb9eb1a62015-04-02 02:39:45 -0700262 clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200263
264 if (unlikely(num_clips == 0))
265 return 0;
266
267 if (clips_ptr == NULL) {
268 DRM_ERROR("Variable clips_ptr must be specified.\n");
269 ret = -EINVAL;
270 goto out_clips;
271 }
272
Thomas Meyer24bb5a02011-11-29 22:08:00 +0100273 clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200274 if (clips == NULL) {
275 DRM_ERROR("Failed to allocate clip rect list.\n");
276 ret = -ENOMEM;
277 goto out_clips;
278 }
279
280 ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
281 if (ret) {
282 DRM_ERROR("Failed to copy clip rects from userspace.\n");
Dan Carpenterd2c184f2011-10-18 09:09:19 +0300283 ret = -EFAULT;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200284 goto out_no_copy;
285 }
286
Daniel Vetterbbe4b992012-12-02 01:48:38 +0100287 drm_modeset_lock_all(dev);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200288
Daniel Vetter786b99e2012-12-02 21:53:40 +0100289 fb = drm_framebuffer_lookup(dev, arg->fb_id);
290 if (!fb) {
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200291 DRM_ERROR("Invalid framebuffer id.\n");
Ville Syrjälä43789b92013-10-17 13:35:06 +0300292 ret = -ENOENT;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200293 goto out_no_fb;
294 }
Daniel Vetter786b99e2012-12-02 21:53:40 +0100295 vfb = vmw_framebuffer_to_vfb(fb);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200296
Thomas Hellstrom294adf72014-02-27 12:34:51 +0100297 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200298 if (unlikely(ret != 0))
299 goto out_no_ttm_lock;
300
Thomas Hellstromc0951b72012-11-20 12:19:35 +0000301 ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
302 user_surface_converter,
303 &res);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200304 if (ret)
305 goto out_no_surface;
306
Thomas Hellstromc0951b72012-11-20 12:19:35 +0000307 surface = vmw_res_to_srf(res);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200308 ret = vmw_kms_present(dev_priv, file_priv,
309 vfb, surface, arg->sid,
310 arg->dest_x, arg->dest_y,
311 clips, num_clips);
312
313 /* vmw_user_surface_lookup takes one ref so does new_fb */
314 vmw_surface_unreference(&surface);
315
316out_no_surface:
Thomas Hellstrom294adf72014-02-27 12:34:51 +0100317 ttm_read_unlock(&dev_priv->reservation_sem);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200318out_no_ttm_lock:
Daniel Vetter2fd5eab2012-12-11 16:28:34 +0100319 drm_framebuffer_unreference(fb);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200320out_no_fb:
Daniel Vetterbbe4b992012-12-02 01:48:38 +0100321 drm_modeset_unlock_all(dev);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200322out_no_copy:
323 kfree(clips);
324out_clips:
325 return ret;
326}
327
328int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
329 struct drm_file *file_priv)
330{
331 struct vmw_private *dev_priv = vmw_priv(dev);
332 struct drm_vmw_present_readback_arg *arg =
333 (struct drm_vmw_present_readback_arg *)data;
334 struct drm_vmw_fence_rep __user *user_fence_rep =
335 (struct drm_vmw_fence_rep __user *)
336 (unsigned long)arg->fence_rep;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200337 struct drm_vmw_rect __user *clips_ptr;
338 struct drm_vmw_rect *clips = NULL;
Daniel Vetter786b99e2012-12-02 21:53:40 +0100339 struct drm_framebuffer *fb;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200340 struct vmw_framebuffer *vfb;
341 uint32_t num_clips;
342 int ret;
343
344 num_clips = arg->num_clips;
Thomas Hellstromb9eb1a62015-04-02 02:39:45 -0700345 clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200346
347 if (unlikely(num_clips == 0))
348 return 0;
349
350 if (clips_ptr == NULL) {
351 DRM_ERROR("Argument clips_ptr must be specified.\n");
352 ret = -EINVAL;
353 goto out_clips;
354 }
355
Thomas Meyer24bb5a02011-11-29 22:08:00 +0100356 clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200357 if (clips == NULL) {
358 DRM_ERROR("Failed to allocate clip rect list.\n");
359 ret = -ENOMEM;
360 goto out_clips;
361 }
362
363 ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
364 if (ret) {
365 DRM_ERROR("Failed to copy clip rects from userspace.\n");
Dan Carpenterd2c184f2011-10-18 09:09:19 +0300366 ret = -EFAULT;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200367 goto out_no_copy;
368 }
369
Daniel Vetterbbe4b992012-12-02 01:48:38 +0100370 drm_modeset_lock_all(dev);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200371
Daniel Vetter786b99e2012-12-02 21:53:40 +0100372 fb = drm_framebuffer_lookup(dev, arg->fb_id);
373 if (!fb) {
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200374 DRM_ERROR("Invalid framebuffer id.\n");
Ville Syrjälä43789b92013-10-17 13:35:06 +0300375 ret = -ENOENT;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200376 goto out_no_fb;
377 }
378
Daniel Vetter786b99e2012-12-02 21:53:40 +0100379 vfb = vmw_framebuffer_to_vfb(fb);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200380 if (!vfb->dmabuf) {
381 DRM_ERROR("Framebuffer not dmabuf backed.\n");
382 ret = -EINVAL;
Daniel Vetter2fd5eab2012-12-11 16:28:34 +0100383 goto out_no_ttm_lock;
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200384 }
385
Thomas Hellstrom294adf72014-02-27 12:34:51 +0100386 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200387 if (unlikely(ret != 0))
388 goto out_no_ttm_lock;
389
390 ret = vmw_kms_readback(dev_priv, file_priv,
391 vfb, user_fence_rep,
392 clips, num_clips);
393
Thomas Hellstrom294adf72014-02-27 12:34:51 +0100394 ttm_read_unlock(&dev_priv->reservation_sem);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200395out_no_ttm_lock:
Daniel Vetter2fd5eab2012-12-11 16:28:34 +0100396 drm_framebuffer_unreference(fb);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200397out_no_fb:
Daniel Vetterbbe4b992012-12-02 01:48:38 +0100398 drm_modeset_unlock_all(dev);
Jakob Bornecrantz2fcd5a72011-10-04 20:13:26 +0200399out_no_copy:
400 kfree(clips);
401out_clips:
402 return ret;
403}
Thomas Hellstrom5438ae82011-10-10 12:23:27 +0200404
405
406/**
407 * vmw_fops_poll - wrapper around the drm_poll function
408 *
409 * @filp: See the linux fops poll documentation.
410 * @wait: See the linux fops poll documentation.
411 *
412 * Wrapper around the drm_poll function that makes sure the device is
413 * processing the fifo if drm_poll decides to wait.
414 */
415unsigned int vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
416{
417 struct drm_file *file_priv = filp->private_data;
418 struct vmw_private *dev_priv =
419 vmw_priv(file_priv->minor->dev);
420
421 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
422 return drm_poll(filp, wait);
423}
424
425
426/**
427 * vmw_fops_read - wrapper around the drm_read function
428 *
429 * @filp: See the linux fops read documentation.
430 * @buffer: See the linux fops read documentation.
431 * @count: See the linux fops read documentation.
432 * offset: See the linux fops read documentation.
433 *
434 * Wrapper around the drm_read function that makes sure the device is
435 * processing the fifo if drm_read decides to wait.
436 */
437ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
438 size_t count, loff_t *offset)
439{
440 struct drm_file *file_priv = filp->private_data;
441 struct vmw_private *dev_priv =
442 vmw_priv(file_priv->minor->dev);
443
444 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
445 return drm_read(filp, buffer, count, offset);
446}