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Christophe Ricard2bc4d4f2015-08-14 22:33:37 +02001/*
2 * SPI Link Layer for ST NCI based Driver
3 * Copyright (C) 2014-2015 STMicroelectronics SAS. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20#include <linux/module.h>
21#include <linux/spi/spi.h>
22#include <linux/gpio.h>
23#include <linux/of_irq.h>
24#include <linux/of_gpio.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/nfc.h>
Christophe Ricarda1269dd2015-10-25 22:54:19 +010028#include <net/nfc/nci.h>
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020029#include <linux/platform_data/st-nci.h>
30
Christophe Ricarde67e7e52015-10-25 22:54:17 +010031#include "st-nci.h"
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020032
33#define DRIVER_DESC "NCI NFC driver for ST_NCI"
34
35/* ndlc header */
36#define ST_NCI_FRAME_HEADROOM 1
37#define ST_NCI_FRAME_TAILROOM 0
38
39#define ST_NCI_SPI_MIN_SIZE 4 /* PCB(1) + NCI Packet header(3) */
40#define ST_NCI_SPI_MAX_SIZE 250 /* req 4.2.1 */
41
42#define ST_NCI_SPI_DRIVER_NAME "st_nci_spi"
43
44static struct spi_device_id st_nci_spi_id_table[] = {
45 {ST_NCI_SPI_DRIVER_NAME, 0},
46 {}
47};
48MODULE_DEVICE_TABLE(spi, st_nci_spi_id_table);
49
50struct st_nci_spi_phy {
51 struct spi_device *spi_dev;
52 struct llt_ndlc *ndlc;
53
Christophe Ricardbb2496c2015-10-25 22:54:48 +010054 bool irq_active;
55
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020056 unsigned int gpio_reset;
57 unsigned int irq_polarity;
Christophe Ricard3648dc62015-10-25 22:54:39 +010058
59 struct st_nci_se_status se_status;
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020060};
61
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020062static int st_nci_spi_enable(void *phy_id)
63{
64 struct st_nci_spi_phy *phy = phy_id;
65
66 gpio_set_value(phy->gpio_reset, 0);
67 usleep_range(10000, 15000);
68 gpio_set_value(phy->gpio_reset, 1);
69 usleep_range(80000, 85000);
70
Christophe Ricardbb2496c2015-10-25 22:54:48 +010071 if (phy->ndlc->powered == 0 && phy->irq_active == 0) {
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020072 enable_irq(phy->spi_dev->irq);
Christophe Ricardbb2496c2015-10-25 22:54:48 +010073 phy->irq_active = true;
74 }
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020075
76 return 0;
77}
78
79static void st_nci_spi_disable(void *phy_id)
80{
81 struct st_nci_spi_phy *phy = phy_id;
82
83 disable_irq_nosync(phy->spi_dev->irq);
Christophe Ricardbb2496c2015-10-25 22:54:48 +010084 phy->irq_active = false;
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +020085}
86
87/*
88 * Writing a frame must not return the number of written bytes.
89 * It must return either zero for success, or <0 for error.
90 * In addition, it must not alter the skb
91 */
92static int st_nci_spi_write(void *phy_id, struct sk_buff *skb)
93{
94 int r;
95 struct st_nci_spi_phy *phy = phy_id;
96 struct spi_device *dev = phy->spi_dev;
97 struct sk_buff *skb_rx;
Christophe Ricarda1269dd2015-10-25 22:54:19 +010098 u8 buf[ST_NCI_SPI_MAX_SIZE + NCI_DATA_HDR_SIZE +
99 ST_NCI_FRAME_HEADROOM + ST_NCI_FRAME_TAILROOM];
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200100 struct spi_transfer spi_xfer = {
101 .tx_buf = skb->data,
102 .rx_buf = buf,
103 .len = skb->len,
104 };
105
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200106 if (phy->ndlc->hard_fault != 0)
107 return phy->ndlc->hard_fault;
108
109 r = spi_sync_transfer(dev, &spi_xfer, 1);
110 /*
111 * We may have received some valuable data on miso line.
112 * Send them back in the ndlc state machine.
113 */
114 if (!r) {
115 skb_rx = alloc_skb(skb->len, GFP_KERNEL);
116 if (!skb_rx) {
117 r = -ENOMEM;
118 goto exit;
119 }
120
121 skb_put(skb_rx, skb->len);
122 memcpy(skb_rx->data, buf, skb->len);
123 ndlc_recv(phy->ndlc, skb_rx);
124 }
125
126exit:
127 return r;
128}
129
130/*
131 * Reads an ndlc frame and returns it in a newly allocated sk_buff.
132 * returns:
133 * 0 : if received frame is complete
134 * -EREMOTEIO : i2c read error (fatal)
135 * -EBADMSG : frame was incorrect and discarded
136 * -ENOMEM : cannot allocate skb, frame dropped
137 */
138static int st_nci_spi_read(struct st_nci_spi_phy *phy,
139 struct sk_buff **skb)
140{
141 int r;
142 u8 len;
143 u8 buf[ST_NCI_SPI_MAX_SIZE];
144 struct spi_device *dev = phy->spi_dev;
145 struct spi_transfer spi_xfer = {
146 .rx_buf = buf,
147 .len = ST_NCI_SPI_MIN_SIZE,
148 };
149
150 r = spi_sync_transfer(dev, &spi_xfer, 1);
151 if (r < 0)
152 return -EREMOTEIO;
153
154 len = be16_to_cpu(*(__be16 *) (buf + 2));
155 if (len > ST_NCI_SPI_MAX_SIZE) {
156 nfc_err(&dev->dev, "invalid frame len\n");
157 phy->ndlc->hard_fault = 1;
158 return -EBADMSG;
159 }
160
161 *skb = alloc_skb(ST_NCI_SPI_MIN_SIZE + len, GFP_KERNEL);
162 if (*skb == NULL)
163 return -ENOMEM;
164
165 skb_reserve(*skb, ST_NCI_SPI_MIN_SIZE);
166 skb_put(*skb, ST_NCI_SPI_MIN_SIZE);
167 memcpy((*skb)->data, buf, ST_NCI_SPI_MIN_SIZE);
168
169 if (!len)
170 return 0;
171
172 spi_xfer.len = len;
173 r = spi_sync_transfer(dev, &spi_xfer, 1);
174 if (r < 0) {
175 kfree_skb(*skb);
176 return -EREMOTEIO;
177 }
178
179 skb_put(*skb, len);
180 memcpy((*skb)->data + ST_NCI_SPI_MIN_SIZE, buf, len);
181
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200182 return 0;
183}
184
185/*
186 * Reads an ndlc frame from the chip.
187 *
188 * On ST21NFCB, IRQ goes in idle state when read starts.
189 */
190static irqreturn_t st_nci_irq_thread_fn(int irq, void *phy_id)
191{
192 struct st_nci_spi_phy *phy = phy_id;
193 struct spi_device *dev;
194 struct sk_buff *skb = NULL;
195 int r;
196
197 if (!phy || !phy->ndlc || irq != phy->spi_dev->irq) {
198 WARN_ON_ONCE(1);
199 return IRQ_NONE;
200 }
201
202 dev = phy->spi_dev;
203 dev_dbg(&dev->dev, "IRQ\n");
204
205 if (phy->ndlc->hard_fault)
206 return IRQ_HANDLED;
207
208 if (!phy->ndlc->powered) {
209 st_nci_spi_disable(phy);
210 return IRQ_HANDLED;
211 }
212
213 r = st_nci_spi_read(phy, &skb);
214 if (r == -EREMOTEIO || r == -ENOMEM || r == -EBADMSG)
215 return IRQ_HANDLED;
216
217 ndlc_recv(phy->ndlc, skb);
218
219 return IRQ_HANDLED;
220}
221
222static struct nfc_phy_ops spi_phy_ops = {
223 .write = st_nci_spi_write,
224 .enable = st_nci_spi_enable,
225 .disable = st_nci_spi_disable,
226};
227
228#ifdef CONFIG_OF
229static int st_nci_spi_of_request_resources(struct spi_device *dev)
230{
231 struct st_nci_spi_phy *phy = spi_get_drvdata(dev);
232 struct device_node *pp;
233 int gpio;
234 int r;
235
236 pp = dev->dev.of_node;
237 if (!pp)
238 return -ENODEV;
239
240 /* Get GPIO from device tree */
241 gpio = of_get_named_gpio(pp, "reset-gpios", 0);
242 if (gpio < 0) {
243 nfc_err(&dev->dev,
244 "Failed to retrieve reset-gpios from device tree\n");
245 return gpio;
246 }
247
248 /* GPIO request and configuration */
249 r = devm_gpio_request_one(&dev->dev, gpio,
250 GPIOF_OUT_INIT_HIGH, "clf_reset");
251 if (r) {
252 nfc_err(&dev->dev, "Failed to request reset pin\n");
253 return r;
254 }
255 phy->gpio_reset = gpio;
256
257 phy->irq_polarity = irq_get_trigger_type(dev->irq);
258
Christophe Ricard3648dc62015-10-25 22:54:39 +0100259 phy->se_status.is_ese_present =
260 of_property_read_bool(pp, "ese-present");
261 phy->se_status.is_uicc_present =
262 of_property_read_bool(pp, "uicc-present");
263
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200264 return 0;
265}
266#else
267static int st_nci_spi_of_request_resources(struct spi_device *dev)
268{
269 return -ENODEV;
270}
271#endif
272
273static int st_nci_spi_request_resources(struct spi_device *dev)
274{
275 struct st_nci_nfc_platform_data *pdata;
276 struct st_nci_spi_phy *phy = spi_get_drvdata(dev);
277 int r;
278
279 pdata = dev->dev.platform_data;
280 if (pdata == NULL) {
281 nfc_err(&dev->dev, "No platform data\n");
282 return -EINVAL;
283 }
284
285 /* store for later use */
286 phy->gpio_reset = pdata->gpio_reset;
287 phy->irq_polarity = pdata->irq_polarity;
288
289 r = devm_gpio_request_one(&dev->dev,
290 phy->gpio_reset, GPIOF_OUT_INIT_HIGH, "clf_reset");
291 if (r) {
292 pr_err("%s : reset gpio_request failed\n", __FILE__);
293 return r;
294 }
295
Christophe Ricard3648dc62015-10-25 22:54:39 +0100296 phy->se_status.is_ese_present = pdata->is_ese_present;
297 phy->se_status.is_uicc_present = pdata->is_uicc_present;
298
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200299 return 0;
300}
301
302static int st_nci_spi_probe(struct spi_device *dev)
303{
304 struct st_nci_spi_phy *phy;
305 struct st_nci_nfc_platform_data *pdata;
306 int r;
307
308 dev_dbg(&dev->dev, "%s\n", __func__);
309 dev_dbg(&dev->dev, "IRQ: %d\n", dev->irq);
310
311 /* Check SPI platform functionnalities */
312 if (!dev) {
313 pr_debug("%s: dev is NULL. Device is not accessible.\n",
314 __func__);
315 return -ENODEV;
316 }
317
318 phy = devm_kzalloc(&dev->dev, sizeof(struct st_nci_spi_phy),
319 GFP_KERNEL);
320 if (!phy)
321 return -ENOMEM;
322
323 phy->spi_dev = dev;
324
325 spi_set_drvdata(dev, phy);
326
327 pdata = dev->dev.platform_data;
328 if (!pdata && dev->dev.of_node) {
329 r = st_nci_spi_of_request_resources(dev);
330 if (r) {
331 nfc_err(&dev->dev, "No platform data\n");
332 return r;
333 }
334 } else if (pdata) {
335 r = st_nci_spi_request_resources(dev);
336 if (r) {
337 nfc_err(&dev->dev,
338 "Cannot get platform resources\n");
339 return r;
340 }
341 } else {
342 nfc_err(&dev->dev,
343 "st_nci platform resources not available\n");
344 return -ENODEV;
345 }
346
347 r = ndlc_probe(phy, &spi_phy_ops, &dev->dev,
348 ST_NCI_FRAME_HEADROOM, ST_NCI_FRAME_TAILROOM,
Christophe Ricard3648dc62015-10-25 22:54:39 +0100349 &phy->ndlc, &phy->se_status);
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200350 if (r < 0) {
351 nfc_err(&dev->dev, "Unable to register ndlc layer\n");
352 return r;
353 }
354
Christophe Ricardbb2496c2015-10-25 22:54:48 +0100355 phy->irq_active = true;
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200356 r = devm_request_threaded_irq(&dev->dev, dev->irq, NULL,
357 st_nci_irq_thread_fn,
358 phy->irq_polarity | IRQF_ONESHOT,
359 ST_NCI_SPI_DRIVER_NAME, phy);
360 if (r < 0)
361 nfc_err(&dev->dev, "Unable to register IRQ handler\n");
362
363 return r;
364}
365
366static int st_nci_spi_remove(struct spi_device *dev)
367{
368 struct st_nci_spi_phy *phy = spi_get_drvdata(dev);
369
370 dev_dbg(&dev->dev, "%s\n", __func__);
371
372 ndlc_remove(phy->ndlc);
373
374 return 0;
375}
376
377#ifdef CONFIG_OF
378static const struct of_device_id of_st_nci_spi_match[] = {
379 { .compatible = "st,st21nfcb-spi", },
380 {}
381};
382MODULE_DEVICE_TABLE(of, of_st_nci_spi_match);
383#endif
384
385static struct spi_driver st_nci_spi_driver = {
386 .driver = {
Christophe Ricard2bc4d4f2015-08-14 22:33:37 +0200387 .name = ST_NCI_SPI_DRIVER_NAME,
388 .of_match_table = of_match_ptr(of_st_nci_spi_match),
389 },
390 .probe = st_nci_spi_probe,
391 .id_table = st_nci_spi_id_table,
392 .remove = st_nci_spi_remove,
393};
394
395module_spi_driver(st_nci_spi_driver);
396
397MODULE_LICENSE("GPL");
398MODULE_DESCRIPTION(DRIVER_DESC);