Shefali Jain | 3484f55 | 2018-02-28 13:34:16 +0530 | [diff] [blame] | 1 | Qualcomm Technologies, Inc. MSM8939 CPU clock tree |
Shefali Jain | 7eac116 | 2018-01-29 15:28:51 +0530 | [diff] [blame] | 2 | |
| 3 | clock-cpu-8939 is a device that represents the MSM8939 or MSM8952 CPU |
| 4 | subsystem clock tree. It lists the various power supplies that need to be |
| 5 | scaled when the clocks are scaled and also other HW specific parameters like |
| 6 | fmax tables, avs settings table, etc. |
| 7 | |
| 8 | Required properties: |
| 9 | - compatible: Must be one of "qcom,clock-cpu-8939" or |
Odelu Kukatla | 678382b | 2018-03-27 22:58:52 +0530 | [diff] [blame] | 10 | "qcom,cpu-clock-8952", "qcom,cpu-clock-8917", |
| 11 | "qcom,cpu-clock-sdm439", "qcom,cpu-clock-sdm429". |
Shefali Jain | 7eac116 | 2018-01-29 15:28:51 +0530 | [diff] [blame] | 12 | - reg: Pairs of physical base addresses and region sizes of |
| 13 | memory mapped registers. |
| 14 | - reg-names: Names of the bases for the above registers. Expected |
| 15 | bases are: |
| 16 | "apcs-c0-rcg-base", "apcs-c1-rcg-base", |
| 17 | "apcs-cci-rcg-base", "efuse", "efuse1", "efuse2" |
| 18 | - vdd-c0-supply: The regulator powering the little cluster |
| 19 | - vdd-c1-supply: The regulator powering the big cluster |
| 20 | - vdd-cci-supply: The regulator powering the CCI cluster |
| 21 | - qcom,speedX-bin-vY-ZZZ: |
| 22 | A table of CPU frequency (Hz) to voltage (corner) |
| 23 | mapping that represents the max frequency possible |
| 24 | for each supported voltage level for a CPU. 'X' is |
| 25 | the speed bin into which the device falls into - a |
| 26 | bin will have unique frequency-voltage relationships. |
| 27 | 'Y' is the characterization version, implying that |
| 28 | characterization (deciding what speed bin a device |
| 29 | falls into) methods and/or encoding may change. The |
| 30 | values 'X' and 'Y' are read from efuse registers, and |
| 31 | the right table is picked from multiple possible tables. |
| 32 | 'ZZZ' can be c1, c0 or cci depending on whether the table |
| 33 | is for the big cluster, little cluster or cci. |
| 34 | Optional properties: |
| 35 | - qcom,cpu-pcnoc-vote: Boolean to indicate cpu clocks would need to keep |
| 36 | active pcnoc vote. |
| 37 | - qcom,num-cluster: Boolean to indicate cpu clock code is used for single |
| 38 | cluster. |
| 39 | Example: |
| 40 | clock_cpu: qcom,cpu-clock-8939@f9015000 { |
| 41 | compatible = "qcom,cpu-clock-8939"; |
| 42 | reg = <0xf9015000 0x1000>, |
| 43 | <0xf9016000 0x1000>, |
| 44 | <0xf9011000 0x1000>, |
| 45 | <0xf900d000 0x1000>, |
| 46 | <0xf900f000 0x1000>, |
| 47 | <0xf9112000 0x1000>; |
| 48 | reg-names = "apcs-c0-rcg-base", "apcs-c1-rcg-base", |
| 49 | "apcs-cci-rcg-base", "efuse", "efuse1", |
| 50 | "efuse2"; |
| 51 | vdd-c0-supply = <&apc_vreg_corner>; |
| 52 | vdd-c1-supply = <&apc_vreg_corner>; |
| 53 | vdd-cci-supply = <&apc_vreg_corner>; |
| 54 | qcom,speed0-bin-v0-c0 = |
| 55 | < 0 0>, |
| 56 | < 384000000 1>, |
| 57 | < 787200000 2>, |
| 58 | <1286400000 3>; |
| 59 | qcom,speed0-bin-v0-c1 = |
| 60 | < 0 0>, |
| 61 | < 384000000 1>, |
| 62 | < 787200000 2>, |
| 63 | <1785600000 3>; |
| 64 | qcom,speed0-bin-v0-cci = |
| 65 | < 0 0>, |
| 66 | < 150000000 1>, |
| 67 | < 300000000 2>, |
| 68 | < 600000000 3>; |
| 69 | clocks = <&clock_gcc clk_gpll0_ao>, |
| 70 | <&clock_gcc clk_a53ss_c0_pll>, |
| 71 | <&clock_gcc clk_gpll0_ao>, |
| 72 | <&clock_gcc clk_a53ss_c1_pll>, |
| 73 | <&clock_gcc clk_gpll0_ao>, |
| 74 | <&clock_gcc clk_a53ss_cci_pll>; |
| 75 | clock-names = "clk-c0-4", "clk-c0-5", |
| 76 | "clk-c1-4", "clk-c1-5", |
| 77 | "clk-cci-4", "clk-cci-5"; |
| 78 | #clock-cells = <1>; |
| 79 | }; |