Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Freescale STMP37XX/STMP378X Application UART driver |
| 3 | * |
| 4 | * Author: dmitry pervushin <dimka@embeddedalley.com> |
| 5 | * |
| 6 | * Copyright 2008-2010 Freescale Semiconductor, Inc. |
| 7 | * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. |
| 8 | * |
| 9 | * The code contained herein is licensed under the GNU General Public |
| 10 | * License. You may obtain a copy of the GNU General Public License |
| 11 | * Version 2 or later at the following locations: |
| 12 | * |
| 13 | * http://www.opensource.org/licenses/gpl-license.html |
| 14 | * http://www.gnu.org/copyleft/gpl.html |
| 15 | */ |
| 16 | |
Janusz Uzycki | 914d3b1 | 2014-10-10 13:13:28 +0200 | [diff] [blame] | 17 | #if defined(CONFIG_SERIAL_MXS_AUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
| 18 | #define SUPPORT_SYSRQ |
| 19 | #endif |
| 20 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 21 | #include <linux/kernel.h> |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 22 | #include <linux/errno.h> |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/console.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/slab.h> |
| 28 | #include <linux/wait.h> |
| 29 | #include <linux/tty.h> |
| 30 | #include <linux/tty_driver.h> |
| 31 | #include <linux/tty_flip.h> |
| 32 | #include <linux/serial.h> |
| 33 | #include <linux/serial_core.h> |
| 34 | #include <linux/platform_device.h> |
| 35 | #include <linux/device.h> |
| 36 | #include <linux/clk.h> |
| 37 | #include <linux/delay.h> |
| 38 | #include <linux/io.h> |
Fabio Estevam | 1ea6607 | 2012-06-18 10:06:09 -0300 | [diff] [blame] | 39 | #include <linux/of_device.h> |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 40 | #include <linux/dma-mapping.h> |
Shawn Guo | bcc20f9 | 2013-02-26 13:47:41 +0800 | [diff] [blame] | 41 | #include <linux/dmaengine.h> |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 42 | |
| 43 | #include <asm/cacheflush.h> |
| 44 | |
| 45 | #define MXS_AUART_PORTS 5 |
Hector Palacios | 9987f76 | 2013-10-03 09:32:03 +0200 | [diff] [blame] | 46 | #define MXS_AUART_FIFO_SIZE 16 |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 47 | |
| 48 | #define AUART_CTRL0 0x00000000 |
| 49 | #define AUART_CTRL0_SET 0x00000004 |
| 50 | #define AUART_CTRL0_CLR 0x00000008 |
| 51 | #define AUART_CTRL0_TOG 0x0000000c |
| 52 | #define AUART_CTRL1 0x00000010 |
| 53 | #define AUART_CTRL1_SET 0x00000014 |
| 54 | #define AUART_CTRL1_CLR 0x00000018 |
| 55 | #define AUART_CTRL1_TOG 0x0000001c |
| 56 | #define AUART_CTRL2 0x00000020 |
| 57 | #define AUART_CTRL2_SET 0x00000024 |
| 58 | #define AUART_CTRL2_CLR 0x00000028 |
| 59 | #define AUART_CTRL2_TOG 0x0000002c |
| 60 | #define AUART_LINECTRL 0x00000030 |
| 61 | #define AUART_LINECTRL_SET 0x00000034 |
| 62 | #define AUART_LINECTRL_CLR 0x00000038 |
| 63 | #define AUART_LINECTRL_TOG 0x0000003c |
| 64 | #define AUART_LINECTRL2 0x00000040 |
| 65 | #define AUART_LINECTRL2_SET 0x00000044 |
| 66 | #define AUART_LINECTRL2_CLR 0x00000048 |
| 67 | #define AUART_LINECTRL2_TOG 0x0000004c |
| 68 | #define AUART_INTR 0x00000050 |
| 69 | #define AUART_INTR_SET 0x00000054 |
| 70 | #define AUART_INTR_CLR 0x00000058 |
| 71 | #define AUART_INTR_TOG 0x0000005c |
| 72 | #define AUART_DATA 0x00000060 |
| 73 | #define AUART_STAT 0x00000070 |
| 74 | #define AUART_DEBUG 0x00000080 |
| 75 | #define AUART_VERSION 0x00000090 |
| 76 | #define AUART_AUTOBAUD 0x000000a0 |
| 77 | |
| 78 | #define AUART_CTRL0_SFTRST (1 << 31) |
| 79 | #define AUART_CTRL0_CLKGATE (1 << 30) |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 80 | #define AUART_CTRL0_RXTO_ENABLE (1 << 27) |
| 81 | #define AUART_CTRL0_RXTIMEOUT(v) (((v) & 0x7ff) << 16) |
| 82 | #define AUART_CTRL0_XFER_COUNT(v) ((v) & 0xffff) |
| 83 | |
| 84 | #define AUART_CTRL1_XFER_COUNT(v) ((v) & 0xffff) |
| 85 | |
| 86 | #define AUART_CTRL2_DMAONERR (1 << 26) |
| 87 | #define AUART_CTRL2_TXDMAE (1 << 25) |
| 88 | #define AUART_CTRL2_RXDMAE (1 << 24) |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 89 | |
| 90 | #define AUART_CTRL2_CTSEN (1 << 15) |
Huang Shijie | 0059202 | 2012-08-08 10:37:59 +0800 | [diff] [blame] | 91 | #define AUART_CTRL2_RTSEN (1 << 14) |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 92 | #define AUART_CTRL2_RTS (1 << 11) |
| 93 | #define AUART_CTRL2_RXE (1 << 9) |
| 94 | #define AUART_CTRL2_TXE (1 << 8) |
| 95 | #define AUART_CTRL2_UARTEN (1 << 0) |
| 96 | |
| 97 | #define AUART_LINECTRL_BAUD_DIVINT_SHIFT 16 |
| 98 | #define AUART_LINECTRL_BAUD_DIVINT_MASK 0xffff0000 |
| 99 | #define AUART_LINECTRL_BAUD_DIVINT(v) (((v) & 0xffff) << 16) |
| 100 | #define AUART_LINECTRL_BAUD_DIVFRAC_SHIFT 8 |
| 101 | #define AUART_LINECTRL_BAUD_DIVFRAC_MASK 0x00003f00 |
| 102 | #define AUART_LINECTRL_BAUD_DIVFRAC(v) (((v) & 0x3f) << 8) |
| 103 | #define AUART_LINECTRL_WLEN_MASK 0x00000060 |
| 104 | #define AUART_LINECTRL_WLEN(v) (((v) & 0x3) << 5) |
| 105 | #define AUART_LINECTRL_FEN (1 << 4) |
| 106 | #define AUART_LINECTRL_STP2 (1 << 3) |
| 107 | #define AUART_LINECTRL_EPS (1 << 2) |
| 108 | #define AUART_LINECTRL_PEN (1 << 1) |
| 109 | #define AUART_LINECTRL_BRK (1 << 0) |
| 110 | |
| 111 | #define AUART_INTR_RTIEN (1 << 22) |
| 112 | #define AUART_INTR_TXIEN (1 << 21) |
| 113 | #define AUART_INTR_RXIEN (1 << 20) |
| 114 | #define AUART_INTR_CTSMIEN (1 << 17) |
| 115 | #define AUART_INTR_RTIS (1 << 6) |
| 116 | #define AUART_INTR_TXIS (1 << 5) |
| 117 | #define AUART_INTR_RXIS (1 << 4) |
| 118 | #define AUART_INTR_CTSMIS (1 << 1) |
| 119 | |
| 120 | #define AUART_STAT_BUSY (1 << 29) |
| 121 | #define AUART_STAT_CTS (1 << 28) |
| 122 | #define AUART_STAT_TXFE (1 << 27) |
| 123 | #define AUART_STAT_TXFF (1 << 25) |
| 124 | #define AUART_STAT_RXFE (1 << 24) |
| 125 | #define AUART_STAT_OERR (1 << 19) |
| 126 | #define AUART_STAT_BERR (1 << 18) |
| 127 | #define AUART_STAT_PERR (1 << 17) |
| 128 | #define AUART_STAT_FERR (1 << 16) |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 129 | #define AUART_STAT_RXCOUNT_MASK 0xffff |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 130 | |
| 131 | static struct uart_driver auart_driver; |
| 132 | |
Huang Shijie | f4b1f03b | 2012-11-16 16:03:52 +0800 | [diff] [blame] | 133 | enum mxs_auart_type { |
| 134 | IMX23_AUART, |
| 135 | IMX28_AUART, |
| 136 | }; |
| 137 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 138 | struct mxs_auart_port { |
| 139 | struct uart_port port; |
| 140 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 141 | #define MXS_AUART_DMA_ENABLED 0x2 |
| 142 | #define MXS_AUART_DMA_TX_SYNC 2 /* bit 2 */ |
| 143 | #define MXS_AUART_DMA_RX_READY 3 /* bit 3 */ |
Huang Shijie | 8418e67 | 2013-08-03 10:09:14 -0400 | [diff] [blame] | 144 | #define MXS_AUART_RTSCTS 4 /* bit 4 */ |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 145 | unsigned long flags; |
Huang Shijie | f4b1f03b | 2012-11-16 16:03:52 +0800 | [diff] [blame] | 146 | enum mxs_auart_type devtype; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 147 | |
| 148 | unsigned int irq; |
| 149 | |
| 150 | struct clk *clk; |
| 151 | struct device *dev; |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 152 | |
| 153 | /* for DMA */ |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 154 | struct scatterlist tx_sgl; |
| 155 | struct dma_chan *tx_dma_chan; |
| 156 | void *tx_dma_buf; |
| 157 | |
| 158 | struct scatterlist rx_sgl; |
| 159 | struct dma_chan *rx_dma_chan; |
| 160 | void *rx_dma_buf; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 161 | }; |
| 162 | |
Huang Shijie | f4b1f03b | 2012-11-16 16:03:52 +0800 | [diff] [blame] | 163 | static struct platform_device_id mxs_auart_devtype[] = { |
| 164 | { .name = "mxs-auart-imx23", .driver_data = IMX23_AUART }, |
| 165 | { .name = "mxs-auart-imx28", .driver_data = IMX28_AUART }, |
| 166 | { /* sentinel */ } |
| 167 | }; |
| 168 | MODULE_DEVICE_TABLE(platform, mxs_auart_devtype); |
| 169 | |
| 170 | static struct of_device_id mxs_auart_dt_ids[] = { |
| 171 | { |
| 172 | .compatible = "fsl,imx28-auart", |
| 173 | .data = &mxs_auart_devtype[IMX28_AUART] |
| 174 | }, { |
| 175 | .compatible = "fsl,imx23-auart", |
| 176 | .data = &mxs_auart_devtype[IMX23_AUART] |
| 177 | }, { /* sentinel */ } |
| 178 | }; |
| 179 | MODULE_DEVICE_TABLE(of, mxs_auart_dt_ids); |
| 180 | |
| 181 | static inline int is_imx28_auart(struct mxs_auart_port *s) |
| 182 | { |
| 183 | return s->devtype == IMX28_AUART; |
| 184 | } |
| 185 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 186 | static inline bool auart_dma_enabled(struct mxs_auart_port *s) |
| 187 | { |
| 188 | return s->flags & MXS_AUART_DMA_ENABLED; |
| 189 | } |
| 190 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 191 | static void mxs_auart_stop_tx(struct uart_port *u); |
| 192 | |
| 193 | #define to_auart_port(u) container_of(u, struct mxs_auart_port, port) |
| 194 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 195 | static void mxs_auart_tx_chars(struct mxs_auart_port *s); |
| 196 | |
| 197 | static void dma_tx_callback(void *param) |
| 198 | { |
| 199 | struct mxs_auart_port *s = param; |
| 200 | struct circ_buf *xmit = &s->port.state->xmit; |
| 201 | |
| 202 | dma_unmap_sg(s->dev, &s->tx_sgl, 1, DMA_TO_DEVICE); |
| 203 | |
| 204 | /* clear the bit used to serialize the DMA tx. */ |
| 205 | clear_bit(MXS_AUART_DMA_TX_SYNC, &s->flags); |
Peter Zijlstra | 4e857c5 | 2014-03-17 18:06:10 +0100 | [diff] [blame] | 206 | smp_mb__after_atomic(); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 207 | |
| 208 | /* wake up the possible processes. */ |
| 209 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 210 | uart_write_wakeup(&s->port); |
| 211 | |
| 212 | mxs_auart_tx_chars(s); |
| 213 | } |
| 214 | |
| 215 | static int mxs_auart_dma_tx(struct mxs_auart_port *s, int size) |
| 216 | { |
| 217 | struct dma_async_tx_descriptor *desc; |
| 218 | struct scatterlist *sgl = &s->tx_sgl; |
| 219 | struct dma_chan *channel = s->tx_dma_chan; |
| 220 | u32 pio; |
| 221 | |
| 222 | /* [1] : send PIO. Note, the first pio word is CTRL1. */ |
| 223 | pio = AUART_CTRL1_XFER_COUNT(size); |
| 224 | desc = dmaengine_prep_slave_sg(channel, (struct scatterlist *)&pio, |
| 225 | 1, DMA_TRANS_NONE, 0); |
| 226 | if (!desc) { |
| 227 | dev_err(s->dev, "step 1 error\n"); |
| 228 | return -EINVAL; |
| 229 | } |
| 230 | |
| 231 | /* [2] : set DMA buffer. */ |
| 232 | sg_init_one(sgl, s->tx_dma_buf, size); |
| 233 | dma_map_sg(s->dev, sgl, 1, DMA_TO_DEVICE); |
| 234 | desc = dmaengine_prep_slave_sg(channel, sgl, |
| 235 | 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 236 | if (!desc) { |
| 237 | dev_err(s->dev, "step 2 error\n"); |
| 238 | return -EINVAL; |
| 239 | } |
| 240 | |
| 241 | /* [3] : submit the DMA */ |
| 242 | desc->callback = dma_tx_callback; |
| 243 | desc->callback_param = s; |
| 244 | dmaengine_submit(desc); |
| 245 | dma_async_issue_pending(channel); |
| 246 | return 0; |
| 247 | } |
| 248 | |
| 249 | static void mxs_auart_tx_chars(struct mxs_auart_port *s) |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 250 | { |
| 251 | struct circ_buf *xmit = &s->port.state->xmit; |
| 252 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 253 | if (auart_dma_enabled(s)) { |
fabio.estevam@freescale.com | 87b8bed | 2013-01-07 23:11:06 -0200 | [diff] [blame] | 254 | u32 i = 0; |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 255 | int size; |
| 256 | void *buffer = s->tx_dma_buf; |
| 257 | |
| 258 | if (test_and_set_bit(MXS_AUART_DMA_TX_SYNC, &s->flags)) |
| 259 | return; |
| 260 | |
| 261 | while (!uart_circ_empty(xmit) && !uart_tx_stopped(&s->port)) { |
| 262 | size = min_t(u32, UART_XMIT_SIZE - i, |
| 263 | CIRC_CNT_TO_END(xmit->head, |
| 264 | xmit->tail, |
| 265 | UART_XMIT_SIZE)); |
| 266 | memcpy(buffer + i, xmit->buf + xmit->tail, size); |
| 267 | xmit->tail = (xmit->tail + size) & (UART_XMIT_SIZE - 1); |
| 268 | |
| 269 | i += size; |
| 270 | if (i >= UART_XMIT_SIZE) |
| 271 | break; |
| 272 | } |
| 273 | |
| 274 | if (uart_tx_stopped(&s->port)) |
| 275 | mxs_auart_stop_tx(&s->port); |
| 276 | |
| 277 | if (i) { |
| 278 | mxs_auart_dma_tx(s, i); |
| 279 | } else { |
| 280 | clear_bit(MXS_AUART_DMA_TX_SYNC, &s->flags); |
Peter Zijlstra | 4e857c5 | 2014-03-17 18:06:10 +0100 | [diff] [blame] | 281 | smp_mb__after_atomic(); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 282 | } |
| 283 | return; |
| 284 | } |
| 285 | |
| 286 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 287 | while (!(readl(s->port.membase + AUART_STAT) & |
| 288 | AUART_STAT_TXFF)) { |
| 289 | if (s->port.x_char) { |
| 290 | s->port.icount.tx++; |
| 291 | writel(s->port.x_char, |
| 292 | s->port.membase + AUART_DATA); |
| 293 | s->port.x_char = 0; |
| 294 | continue; |
| 295 | } |
| 296 | if (!uart_circ_empty(xmit) && !uart_tx_stopped(&s->port)) { |
| 297 | s->port.icount.tx++; |
| 298 | writel(xmit->buf[xmit->tail], |
| 299 | s->port.membase + AUART_DATA); |
| 300 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 301 | } else |
| 302 | break; |
| 303 | } |
Uwe Kleine-König | d0758a2 | 2011-11-22 14:22:56 +0100 | [diff] [blame] | 304 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 305 | uart_write_wakeup(&s->port); |
| 306 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 307 | if (uart_circ_empty(&(s->port.state->xmit))) |
| 308 | writel(AUART_INTR_TXIEN, |
| 309 | s->port.membase + AUART_INTR_CLR); |
| 310 | else |
| 311 | writel(AUART_INTR_TXIEN, |
| 312 | s->port.membase + AUART_INTR_SET); |
| 313 | |
| 314 | if (uart_tx_stopped(&s->port)) |
| 315 | mxs_auart_stop_tx(&s->port); |
| 316 | } |
| 317 | |
| 318 | static void mxs_auart_rx_char(struct mxs_auart_port *s) |
| 319 | { |
| 320 | int flag; |
| 321 | u32 stat; |
| 322 | u8 c; |
| 323 | |
| 324 | c = readl(s->port.membase + AUART_DATA); |
| 325 | stat = readl(s->port.membase + AUART_STAT); |
| 326 | |
| 327 | flag = TTY_NORMAL; |
| 328 | s->port.icount.rx++; |
| 329 | |
| 330 | if (stat & AUART_STAT_BERR) { |
| 331 | s->port.icount.brk++; |
| 332 | if (uart_handle_break(&s->port)) |
| 333 | goto out; |
| 334 | } else if (stat & AUART_STAT_PERR) { |
| 335 | s->port.icount.parity++; |
| 336 | } else if (stat & AUART_STAT_FERR) { |
| 337 | s->port.icount.frame++; |
| 338 | } |
| 339 | |
| 340 | /* |
| 341 | * Mask off conditions which should be ingored. |
| 342 | */ |
| 343 | stat &= s->port.read_status_mask; |
| 344 | |
| 345 | if (stat & AUART_STAT_BERR) { |
| 346 | flag = TTY_BREAK; |
| 347 | } else if (stat & AUART_STAT_PERR) |
| 348 | flag = TTY_PARITY; |
| 349 | else if (stat & AUART_STAT_FERR) |
| 350 | flag = TTY_FRAME; |
| 351 | |
| 352 | if (stat & AUART_STAT_OERR) |
| 353 | s->port.icount.overrun++; |
| 354 | |
| 355 | if (uart_handle_sysrq_char(&s->port, c)) |
| 356 | goto out; |
| 357 | |
| 358 | uart_insert_char(&s->port, stat, AUART_STAT_OERR, c, flag); |
| 359 | out: |
| 360 | writel(stat, s->port.membase + AUART_STAT); |
| 361 | } |
| 362 | |
| 363 | static void mxs_auart_rx_chars(struct mxs_auart_port *s) |
| 364 | { |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 365 | u32 stat = 0; |
| 366 | |
| 367 | for (;;) { |
| 368 | stat = readl(s->port.membase + AUART_STAT); |
| 369 | if (stat & AUART_STAT_RXFE) |
| 370 | break; |
| 371 | mxs_auart_rx_char(s); |
| 372 | } |
| 373 | |
| 374 | writel(stat, s->port.membase + AUART_STAT); |
Jiri Slaby | 2e124b4 | 2013-01-03 15:53:06 +0100 | [diff] [blame] | 375 | tty_flip_buffer_push(&s->port.state->port); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 376 | } |
| 377 | |
| 378 | static int mxs_auart_request_port(struct uart_port *u) |
| 379 | { |
| 380 | return 0; |
| 381 | } |
| 382 | |
| 383 | static int mxs_auart_verify_port(struct uart_port *u, |
| 384 | struct serial_struct *ser) |
| 385 | { |
| 386 | if (u->type != PORT_UNKNOWN && u->type != PORT_IMX) |
| 387 | return -EINVAL; |
| 388 | return 0; |
| 389 | } |
| 390 | |
| 391 | static void mxs_auart_config_port(struct uart_port *u, int flags) |
| 392 | { |
| 393 | } |
| 394 | |
| 395 | static const char *mxs_auart_type(struct uart_port *u) |
| 396 | { |
| 397 | struct mxs_auart_port *s = to_auart_port(u); |
| 398 | |
| 399 | return dev_name(s->dev); |
| 400 | } |
| 401 | |
| 402 | static void mxs_auart_release_port(struct uart_port *u) |
| 403 | { |
| 404 | } |
| 405 | |
| 406 | static void mxs_auart_set_mctrl(struct uart_port *u, unsigned mctrl) |
| 407 | { |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 408 | u32 ctrl = readl(u->membase + AUART_CTRL2); |
| 409 | |
Steffen Trumtrar | a683321 | 2012-12-13 14:27:43 +0100 | [diff] [blame] | 410 | ctrl &= ~(AUART_CTRL2_RTSEN | AUART_CTRL2_RTS); |
Huang Shijie | 0059202 | 2012-08-08 10:37:59 +0800 | [diff] [blame] | 411 | if (mctrl & TIOCM_RTS) { |
Peter Hurley | 299245a | 2014-09-10 15:06:24 -0400 | [diff] [blame] | 412 | if (uart_cts_enabled(u)) |
Huang Shijie | 0059202 | 2012-08-08 10:37:59 +0800 | [diff] [blame] | 413 | ctrl |= AUART_CTRL2_RTSEN; |
Steffen Trumtrar | a683321 | 2012-12-13 14:27:43 +0100 | [diff] [blame] | 414 | else |
| 415 | ctrl |= AUART_CTRL2_RTS; |
Huang Shijie | 0059202 | 2012-08-08 10:37:59 +0800 | [diff] [blame] | 416 | } |
| 417 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 418 | writel(ctrl, u->membase + AUART_CTRL2); |
| 419 | } |
| 420 | |
| 421 | static u32 mxs_auart_get_mctrl(struct uart_port *u) |
| 422 | { |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 423 | u32 stat = readl(u->membase + AUART_STAT); |
Janusz Uzycki | 42b4eba | 2014-10-10 18:53:24 +0200 | [diff] [blame^] | 424 | u32 mctrl = 0; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 425 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 426 | if (stat & AUART_STAT_CTS) |
| 427 | mctrl |= TIOCM_CTS; |
| 428 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 429 | return mctrl; |
| 430 | } |
| 431 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 432 | static int mxs_auart_dma_prep_rx(struct mxs_auart_port *s); |
| 433 | static void dma_rx_callback(void *arg) |
| 434 | { |
| 435 | struct mxs_auart_port *s = (struct mxs_auart_port *) arg; |
Jiri Slaby | 05c7cd3 | 2013-01-03 15:53:04 +0100 | [diff] [blame] | 436 | struct tty_port *port = &s->port.state->port; |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 437 | int count; |
| 438 | u32 stat; |
| 439 | |
Huang Shijie | d7ffb93 | 2012-11-22 15:06:30 +0800 | [diff] [blame] | 440 | dma_unmap_sg(s->dev, &s->rx_sgl, 1, DMA_FROM_DEVICE); |
| 441 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 442 | stat = readl(s->port.membase + AUART_STAT); |
| 443 | stat &= ~(AUART_STAT_OERR | AUART_STAT_BERR | |
| 444 | AUART_STAT_PERR | AUART_STAT_FERR); |
| 445 | |
| 446 | count = stat & AUART_STAT_RXCOUNT_MASK; |
Jiri Slaby | 05c7cd3 | 2013-01-03 15:53:04 +0100 | [diff] [blame] | 447 | tty_insert_flip_string(port, s->rx_dma_buf, count); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 448 | |
| 449 | writel(stat, s->port.membase + AUART_STAT); |
Jiri Slaby | 2e124b4 | 2013-01-03 15:53:06 +0100 | [diff] [blame] | 450 | tty_flip_buffer_push(port); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 451 | |
| 452 | /* start the next DMA for RX. */ |
| 453 | mxs_auart_dma_prep_rx(s); |
| 454 | } |
| 455 | |
| 456 | static int mxs_auart_dma_prep_rx(struct mxs_auart_port *s) |
| 457 | { |
| 458 | struct dma_async_tx_descriptor *desc; |
| 459 | struct scatterlist *sgl = &s->rx_sgl; |
| 460 | struct dma_chan *channel = s->rx_dma_chan; |
| 461 | u32 pio[1]; |
| 462 | |
| 463 | /* [1] : send PIO */ |
| 464 | pio[0] = AUART_CTRL0_RXTO_ENABLE |
| 465 | | AUART_CTRL0_RXTIMEOUT(0x80) |
| 466 | | AUART_CTRL0_XFER_COUNT(UART_XMIT_SIZE); |
| 467 | desc = dmaengine_prep_slave_sg(channel, (struct scatterlist *)pio, |
| 468 | 1, DMA_TRANS_NONE, 0); |
| 469 | if (!desc) { |
| 470 | dev_err(s->dev, "step 1 error\n"); |
| 471 | return -EINVAL; |
| 472 | } |
| 473 | |
| 474 | /* [2] : send DMA request */ |
| 475 | sg_init_one(sgl, s->rx_dma_buf, UART_XMIT_SIZE); |
| 476 | dma_map_sg(s->dev, sgl, 1, DMA_FROM_DEVICE); |
| 477 | desc = dmaengine_prep_slave_sg(channel, sgl, 1, DMA_DEV_TO_MEM, |
| 478 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 479 | if (!desc) { |
| 480 | dev_err(s->dev, "step 2 error\n"); |
| 481 | return -1; |
| 482 | } |
| 483 | |
| 484 | /* [3] : submit the DMA, but do not issue it. */ |
| 485 | desc->callback = dma_rx_callback; |
| 486 | desc->callback_param = s; |
| 487 | dmaengine_submit(desc); |
| 488 | dma_async_issue_pending(channel); |
| 489 | return 0; |
| 490 | } |
| 491 | |
| 492 | static void mxs_auart_dma_exit_channel(struct mxs_auart_port *s) |
| 493 | { |
| 494 | if (s->tx_dma_chan) { |
| 495 | dma_release_channel(s->tx_dma_chan); |
| 496 | s->tx_dma_chan = NULL; |
| 497 | } |
| 498 | if (s->rx_dma_chan) { |
| 499 | dma_release_channel(s->rx_dma_chan); |
| 500 | s->rx_dma_chan = NULL; |
| 501 | } |
| 502 | |
| 503 | kfree(s->tx_dma_buf); |
| 504 | kfree(s->rx_dma_buf); |
| 505 | s->tx_dma_buf = NULL; |
| 506 | s->rx_dma_buf = NULL; |
| 507 | } |
| 508 | |
| 509 | static void mxs_auart_dma_exit(struct mxs_auart_port *s) |
| 510 | { |
| 511 | |
| 512 | writel(AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE | AUART_CTRL2_DMAONERR, |
| 513 | s->port.membase + AUART_CTRL2_CLR); |
| 514 | |
| 515 | mxs_auart_dma_exit_channel(s); |
| 516 | s->flags &= ~MXS_AUART_DMA_ENABLED; |
| 517 | clear_bit(MXS_AUART_DMA_TX_SYNC, &s->flags); |
| 518 | clear_bit(MXS_AUART_DMA_RX_READY, &s->flags); |
| 519 | } |
| 520 | |
| 521 | static int mxs_auart_dma_init(struct mxs_auart_port *s) |
| 522 | { |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 523 | if (auart_dma_enabled(s)) |
| 524 | return 0; |
| 525 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 526 | /* init for RX */ |
Shawn Guo | bcc20f9 | 2013-02-26 13:47:41 +0800 | [diff] [blame] | 527 | s->rx_dma_chan = dma_request_slave_channel(s->dev, "rx"); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 528 | if (!s->rx_dma_chan) |
| 529 | goto err_out; |
| 530 | s->rx_dma_buf = kzalloc(UART_XMIT_SIZE, GFP_KERNEL | GFP_DMA); |
| 531 | if (!s->rx_dma_buf) |
| 532 | goto err_out; |
| 533 | |
| 534 | /* init for TX */ |
Shawn Guo | bcc20f9 | 2013-02-26 13:47:41 +0800 | [diff] [blame] | 535 | s->tx_dma_chan = dma_request_slave_channel(s->dev, "tx"); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 536 | if (!s->tx_dma_chan) |
| 537 | goto err_out; |
| 538 | s->tx_dma_buf = kzalloc(UART_XMIT_SIZE, GFP_KERNEL | GFP_DMA); |
| 539 | if (!s->tx_dma_buf) |
| 540 | goto err_out; |
| 541 | |
| 542 | /* set the flags */ |
| 543 | s->flags |= MXS_AUART_DMA_ENABLED; |
| 544 | dev_dbg(s->dev, "enabled the DMA support."); |
| 545 | |
Hector Palacios | 9987f76 | 2013-10-03 09:32:03 +0200 | [diff] [blame] | 546 | /* The DMA buffer is now the FIFO the TTY subsystem can use */ |
| 547 | s->port.fifosize = UART_XMIT_SIZE; |
| 548 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 549 | return 0; |
| 550 | |
| 551 | err_out: |
| 552 | mxs_auart_dma_exit_channel(s); |
| 553 | return -EINVAL; |
| 554 | |
| 555 | } |
| 556 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 557 | static void mxs_auart_settermios(struct uart_port *u, |
| 558 | struct ktermios *termios, |
| 559 | struct ktermios *old) |
| 560 | { |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 561 | struct mxs_auart_port *s = to_auart_port(u); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 562 | u32 bm, ctrl, ctrl2, div; |
| 563 | unsigned int cflag, baud; |
| 564 | |
| 565 | cflag = termios->c_cflag; |
| 566 | |
| 567 | ctrl = AUART_LINECTRL_FEN; |
| 568 | ctrl2 = readl(u->membase + AUART_CTRL2); |
| 569 | |
| 570 | /* byte size */ |
| 571 | switch (cflag & CSIZE) { |
| 572 | case CS5: |
| 573 | bm = 0; |
| 574 | break; |
| 575 | case CS6: |
| 576 | bm = 1; |
| 577 | break; |
| 578 | case CS7: |
| 579 | bm = 2; |
| 580 | break; |
| 581 | case CS8: |
| 582 | bm = 3; |
| 583 | break; |
| 584 | default: |
| 585 | return; |
| 586 | } |
| 587 | |
| 588 | ctrl |= AUART_LINECTRL_WLEN(bm); |
| 589 | |
| 590 | /* parity */ |
| 591 | if (cflag & PARENB) { |
| 592 | ctrl |= AUART_LINECTRL_PEN; |
| 593 | if ((cflag & PARODD) == 0) |
| 594 | ctrl |= AUART_LINECTRL_EPS; |
| 595 | } |
| 596 | |
| 597 | u->read_status_mask = 0; |
| 598 | |
| 599 | if (termios->c_iflag & INPCK) |
| 600 | u->read_status_mask |= AUART_STAT_PERR; |
Peter Hurley | ef8b9dd | 2014-06-16 08:10:41 -0400 | [diff] [blame] | 601 | if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 602 | u->read_status_mask |= AUART_STAT_BERR; |
| 603 | |
| 604 | /* |
| 605 | * Characters to ignore |
| 606 | */ |
| 607 | u->ignore_status_mask = 0; |
| 608 | if (termios->c_iflag & IGNPAR) |
| 609 | u->ignore_status_mask |= AUART_STAT_PERR; |
| 610 | if (termios->c_iflag & IGNBRK) { |
| 611 | u->ignore_status_mask |= AUART_STAT_BERR; |
| 612 | /* |
| 613 | * If we're ignoring parity and break indicators, |
| 614 | * ignore overruns too (for real raw support). |
| 615 | */ |
| 616 | if (termios->c_iflag & IGNPAR) |
| 617 | u->ignore_status_mask |= AUART_STAT_OERR; |
| 618 | } |
| 619 | |
| 620 | /* |
| 621 | * ignore all characters if CREAD is not set |
| 622 | */ |
| 623 | if (cflag & CREAD) |
| 624 | ctrl2 |= AUART_CTRL2_RXE; |
| 625 | else |
| 626 | ctrl2 &= ~AUART_CTRL2_RXE; |
| 627 | |
| 628 | /* figure out the stop bits requested */ |
| 629 | if (cflag & CSTOPB) |
| 630 | ctrl |= AUART_LINECTRL_STP2; |
| 631 | |
| 632 | /* figure out the hardware flow control settings */ |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 633 | if (cflag & CRTSCTS) { |
| 634 | /* |
| 635 | * The DMA has a bug(see errata:2836) in mx23. |
| 636 | * So we can not implement the DMA for auart in mx23, |
| 637 | * we can only implement the DMA support for auart |
| 638 | * in mx28. |
| 639 | */ |
Huang Shijie | afab220 | 2013-08-03 10:09:15 -0400 | [diff] [blame] | 640 | if (is_imx28_auart(s) |
Huang Shijie | 8418e67 | 2013-08-03 10:09:14 -0400 | [diff] [blame] | 641 | && test_bit(MXS_AUART_RTSCTS, &s->flags)) { |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 642 | if (!mxs_auart_dma_init(s)) |
| 643 | /* enable DMA tranfer */ |
| 644 | ctrl2 |= AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE |
| 645 | | AUART_CTRL2_DMAONERR; |
| 646 | } |
Huang Shijie | 0059202 | 2012-08-08 10:37:59 +0800 | [diff] [blame] | 647 | ctrl2 |= AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN; |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 648 | } else { |
Huang Shijie | 0059202 | 2012-08-08 10:37:59 +0800 | [diff] [blame] | 649 | ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 650 | } |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 651 | |
| 652 | /* set baud rate */ |
| 653 | baud = uart_get_baud_rate(u, termios, old, 0, u->uartclk); |
| 654 | div = u->uartclk * 32 / baud; |
| 655 | ctrl |= AUART_LINECTRL_BAUD_DIVFRAC(div & 0x3F); |
| 656 | ctrl |= AUART_LINECTRL_BAUD_DIVINT(div >> 6); |
| 657 | |
| 658 | writel(ctrl, u->membase + AUART_LINECTRL); |
| 659 | writel(ctrl2, u->membase + AUART_CTRL2); |
Lothar Waßmann | 8b979f7 | 2012-05-03 11:37:12 +0200 | [diff] [blame] | 660 | |
| 661 | uart_update_timeout(u, termios->c_cflag, baud); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 662 | |
| 663 | /* prepare for the DMA RX. */ |
| 664 | if (auart_dma_enabled(s) && |
| 665 | !test_and_set_bit(MXS_AUART_DMA_RX_READY, &s->flags)) { |
| 666 | if (!mxs_auart_dma_prep_rx(s)) { |
| 667 | /* Disable the normal RX interrupt. */ |
Huang Shijie | a591944 | 2012-11-22 15:06:29 +0800 | [diff] [blame] | 668 | writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN, |
| 669 | u->membase + AUART_INTR_CLR); |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 670 | } else { |
| 671 | mxs_auart_dma_exit(s); |
| 672 | dev_err(s->dev, "We can not start up the DMA.\n"); |
| 673 | } |
| 674 | } |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 675 | } |
| 676 | |
| 677 | static irqreturn_t mxs_auart_irq_handle(int irq, void *context) |
| 678 | { |
Uwe Kleine-König | d970d7f | 2013-07-04 11:28:51 +0200 | [diff] [blame] | 679 | u32 istat; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 680 | struct mxs_auart_port *s = context; |
| 681 | u32 stat = readl(s->port.membase + AUART_STAT); |
| 682 | |
Uwe Kleine-König | d970d7f | 2013-07-04 11:28:51 +0200 | [diff] [blame] | 683 | istat = readl(s->port.membase + AUART_INTR); |
| 684 | |
| 685 | /* ack irq */ |
| 686 | writel(istat & (AUART_INTR_RTIS |
| 687 | | AUART_INTR_TXIS |
| 688 | | AUART_INTR_RXIS |
| 689 | | AUART_INTR_CTSMIS), |
| 690 | s->port.membase + AUART_INTR_CLR); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 691 | |
| 692 | if (istat & AUART_INTR_CTSMIS) { |
| 693 | uart_handle_cts_change(&s->port, stat & AUART_STAT_CTS); |
| 694 | writel(AUART_INTR_CTSMIS, |
| 695 | s->port.membase + AUART_INTR_CLR); |
| 696 | istat &= ~AUART_INTR_CTSMIS; |
| 697 | } |
| 698 | |
| 699 | if (istat & (AUART_INTR_RTIS | AUART_INTR_RXIS)) { |
Huang Shijie | a591944 | 2012-11-22 15:06:29 +0800 | [diff] [blame] | 700 | if (!auart_dma_enabled(s)) |
| 701 | mxs_auart_rx_chars(s); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 702 | istat &= ~(AUART_INTR_RTIS | AUART_INTR_RXIS); |
| 703 | } |
| 704 | |
| 705 | if (istat & AUART_INTR_TXIS) { |
| 706 | mxs_auart_tx_chars(s); |
| 707 | istat &= ~AUART_INTR_TXIS; |
| 708 | } |
| 709 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 710 | return IRQ_HANDLED; |
| 711 | } |
| 712 | |
| 713 | static void mxs_auart_reset(struct uart_port *u) |
| 714 | { |
| 715 | int i; |
| 716 | unsigned int reg; |
| 717 | |
| 718 | writel(AUART_CTRL0_SFTRST, u->membase + AUART_CTRL0_CLR); |
| 719 | |
| 720 | for (i = 0; i < 10000; i++) { |
| 721 | reg = readl(u->membase + AUART_CTRL0); |
| 722 | if (!(reg & AUART_CTRL0_SFTRST)) |
| 723 | break; |
| 724 | udelay(3); |
| 725 | } |
| 726 | writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR); |
| 727 | } |
| 728 | |
| 729 | static int mxs_auart_startup(struct uart_port *u) |
| 730 | { |
Fabio Estevam | 9bbc3dc | 2013-12-02 01:17:58 -0200 | [diff] [blame] | 731 | int ret; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 732 | struct mxs_auart_port *s = to_auart_port(u); |
| 733 | |
Fabio Estevam | 9bbc3dc | 2013-12-02 01:17:58 -0200 | [diff] [blame] | 734 | ret = clk_prepare_enable(s->clk); |
| 735 | if (ret) |
| 736 | return ret; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 737 | |
| 738 | writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR); |
| 739 | |
| 740 | writel(AUART_CTRL2_UARTEN, u->membase + AUART_CTRL2_SET); |
| 741 | |
| 742 | writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN, |
| 743 | u->membase + AUART_INTR); |
| 744 | |
Hector Palacios | 9987f76 | 2013-10-03 09:32:03 +0200 | [diff] [blame] | 745 | /* Reset FIFO size (it could have changed if DMA was enabled) */ |
| 746 | u->fifosize = MXS_AUART_FIFO_SIZE; |
| 747 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 748 | /* |
| 749 | * Enable fifo so all four bytes of a DMA word are written to |
| 750 | * output (otherwise, only the LSB is written, ie. 1 in 4 bytes) |
| 751 | */ |
| 752 | writel(AUART_LINECTRL_FEN, u->membase + AUART_LINECTRL_SET); |
| 753 | |
| 754 | return 0; |
| 755 | } |
| 756 | |
| 757 | static void mxs_auart_shutdown(struct uart_port *u) |
| 758 | { |
| 759 | struct mxs_auart_port *s = to_auart_port(u); |
| 760 | |
Huang Shijie | e800163 | 2012-11-16 16:03:53 +0800 | [diff] [blame] | 761 | if (auart_dma_enabled(s)) |
| 762 | mxs_auart_dma_exit(s); |
| 763 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 764 | writel(AUART_CTRL2_UARTEN, u->membase + AUART_CTRL2_CLR); |
| 765 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 766 | writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN, |
| 767 | u->membase + AUART_INTR_CLR); |
| 768 | |
Huang Shijie | 851b714 | 2012-09-06 22:38:40 -0400 | [diff] [blame] | 769 | writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_SET); |
| 770 | |
Shawn Guo | a481377 | 2011-12-20 14:10:29 +0800 | [diff] [blame] | 771 | clk_disable_unprepare(s->clk); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 772 | } |
| 773 | |
| 774 | static unsigned int mxs_auart_tx_empty(struct uart_port *u) |
| 775 | { |
| 776 | if (readl(u->membase + AUART_STAT) & AUART_STAT_TXFE) |
| 777 | return TIOCSER_TEMT; |
| 778 | else |
| 779 | return 0; |
| 780 | } |
| 781 | |
| 782 | static void mxs_auart_start_tx(struct uart_port *u) |
| 783 | { |
| 784 | struct mxs_auart_port *s = to_auart_port(u); |
| 785 | |
| 786 | /* enable transmitter */ |
| 787 | writel(AUART_CTRL2_TXE, u->membase + AUART_CTRL2_SET); |
| 788 | |
| 789 | mxs_auart_tx_chars(s); |
| 790 | } |
| 791 | |
| 792 | static void mxs_auart_stop_tx(struct uart_port *u) |
| 793 | { |
| 794 | writel(AUART_CTRL2_TXE, u->membase + AUART_CTRL2_CLR); |
| 795 | } |
| 796 | |
| 797 | static void mxs_auart_stop_rx(struct uart_port *u) |
| 798 | { |
| 799 | writel(AUART_CTRL2_RXE, u->membase + AUART_CTRL2_CLR); |
| 800 | } |
| 801 | |
| 802 | static void mxs_auart_break_ctl(struct uart_port *u, int ctl) |
| 803 | { |
| 804 | if (ctl) |
| 805 | writel(AUART_LINECTRL_BRK, |
| 806 | u->membase + AUART_LINECTRL_SET); |
| 807 | else |
| 808 | writel(AUART_LINECTRL_BRK, |
| 809 | u->membase + AUART_LINECTRL_CLR); |
| 810 | } |
| 811 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 812 | static struct uart_ops mxs_auart_ops = { |
| 813 | .tx_empty = mxs_auart_tx_empty, |
| 814 | .start_tx = mxs_auart_start_tx, |
| 815 | .stop_tx = mxs_auart_stop_tx, |
| 816 | .stop_rx = mxs_auart_stop_rx, |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 817 | .break_ctl = mxs_auart_break_ctl, |
| 818 | .set_mctrl = mxs_auart_set_mctrl, |
| 819 | .get_mctrl = mxs_auart_get_mctrl, |
| 820 | .startup = mxs_auart_startup, |
| 821 | .shutdown = mxs_auart_shutdown, |
| 822 | .set_termios = mxs_auart_settermios, |
| 823 | .type = mxs_auart_type, |
| 824 | .release_port = mxs_auart_release_port, |
| 825 | .request_port = mxs_auart_request_port, |
| 826 | .config_port = mxs_auart_config_port, |
| 827 | .verify_port = mxs_auart_verify_port, |
| 828 | }; |
| 829 | |
| 830 | static struct mxs_auart_port *auart_port[MXS_AUART_PORTS]; |
| 831 | |
| 832 | #ifdef CONFIG_SERIAL_MXS_AUART_CONSOLE |
| 833 | static void mxs_auart_console_putchar(struct uart_port *port, int ch) |
| 834 | { |
| 835 | unsigned int to = 1000; |
| 836 | |
| 837 | while (readl(port->membase + AUART_STAT) & AUART_STAT_TXFF) { |
| 838 | if (!to--) |
| 839 | break; |
| 840 | udelay(1); |
| 841 | } |
| 842 | |
| 843 | writel(ch, port->membase + AUART_DATA); |
| 844 | } |
| 845 | |
| 846 | static void |
| 847 | auart_console_write(struct console *co, const char *str, unsigned int count) |
| 848 | { |
| 849 | struct mxs_auart_port *s; |
| 850 | struct uart_port *port; |
| 851 | unsigned int old_ctrl0, old_ctrl2; |
Uwe Kleine-König | 079a036 | 2013-06-28 11:49:41 +0200 | [diff] [blame] | 852 | unsigned int to = 20000; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 853 | |
Wolfram Sang | 4829e76 | 2013-04-19 21:12:17 +0200 | [diff] [blame] | 854 | if (co->index >= MXS_AUART_PORTS || co->index < 0) |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 855 | return; |
| 856 | |
| 857 | s = auart_port[co->index]; |
| 858 | port = &s->port; |
| 859 | |
| 860 | clk_enable(s->clk); |
| 861 | |
| 862 | /* First save the CR then disable the interrupts */ |
| 863 | old_ctrl2 = readl(port->membase + AUART_CTRL2); |
| 864 | old_ctrl0 = readl(port->membase + AUART_CTRL0); |
| 865 | |
| 866 | writel(AUART_CTRL0_CLKGATE, |
| 867 | port->membase + AUART_CTRL0_CLR); |
| 868 | writel(AUART_CTRL2_UARTEN | AUART_CTRL2_TXE, |
| 869 | port->membase + AUART_CTRL2_SET); |
| 870 | |
| 871 | uart_console_write(port, str, count, mxs_auart_console_putchar); |
| 872 | |
Uwe Kleine-König | 079a036 | 2013-06-28 11:49:41 +0200 | [diff] [blame] | 873 | /* Finally, wait for transmitter to become empty ... */ |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 874 | while (readl(port->membase + AUART_STAT) & AUART_STAT_BUSY) { |
Uwe Kleine-König | 079a036 | 2013-06-28 11:49:41 +0200 | [diff] [blame] | 875 | udelay(1); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 876 | if (!to--) |
| 877 | break; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 878 | } |
| 879 | |
Uwe Kleine-König | 079a036 | 2013-06-28 11:49:41 +0200 | [diff] [blame] | 880 | /* |
| 881 | * ... and restore the TCR if we waited long enough for the transmitter |
| 882 | * to be idle. This might keep the transmitter enabled although it is |
| 883 | * unused, but that is better than to disable it while it is still |
| 884 | * transmitting. |
| 885 | */ |
| 886 | if (!(readl(port->membase + AUART_STAT) & AUART_STAT_BUSY)) { |
| 887 | writel(old_ctrl0, port->membase + AUART_CTRL0); |
| 888 | writel(old_ctrl2, port->membase + AUART_CTRL2); |
| 889 | } |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 890 | |
| 891 | clk_disable(s->clk); |
| 892 | } |
| 893 | |
| 894 | static void __init |
| 895 | auart_console_get_options(struct uart_port *port, int *baud, |
| 896 | int *parity, int *bits) |
| 897 | { |
| 898 | unsigned int lcr_h, quot; |
| 899 | |
| 900 | if (!(readl(port->membase + AUART_CTRL2) & AUART_CTRL2_UARTEN)) |
| 901 | return; |
| 902 | |
| 903 | lcr_h = readl(port->membase + AUART_LINECTRL); |
| 904 | |
| 905 | *parity = 'n'; |
| 906 | if (lcr_h & AUART_LINECTRL_PEN) { |
| 907 | if (lcr_h & AUART_LINECTRL_EPS) |
| 908 | *parity = 'e'; |
| 909 | else |
| 910 | *parity = 'o'; |
| 911 | } |
| 912 | |
| 913 | if ((lcr_h & AUART_LINECTRL_WLEN_MASK) == AUART_LINECTRL_WLEN(2)) |
| 914 | *bits = 7; |
| 915 | else |
| 916 | *bits = 8; |
| 917 | |
| 918 | quot = ((readl(port->membase + AUART_LINECTRL) |
| 919 | & AUART_LINECTRL_BAUD_DIVINT_MASK)) |
| 920 | >> (AUART_LINECTRL_BAUD_DIVINT_SHIFT - 6); |
| 921 | quot |= ((readl(port->membase + AUART_LINECTRL) |
| 922 | & AUART_LINECTRL_BAUD_DIVFRAC_MASK)) |
| 923 | >> AUART_LINECTRL_BAUD_DIVFRAC_SHIFT; |
| 924 | if (quot == 0) |
| 925 | quot = 1; |
| 926 | |
| 927 | *baud = (port->uartclk << 2) / quot; |
| 928 | } |
| 929 | |
| 930 | static int __init |
| 931 | auart_console_setup(struct console *co, char *options) |
| 932 | { |
| 933 | struct mxs_auart_port *s; |
| 934 | int baud = 9600; |
| 935 | int bits = 8; |
| 936 | int parity = 'n'; |
| 937 | int flow = 'n'; |
| 938 | int ret; |
| 939 | |
| 940 | /* |
| 941 | * Check whether an invalid uart number has been specified, and |
| 942 | * if so, search for the first available port that does have |
| 943 | * console support. |
| 944 | */ |
| 945 | if (co->index == -1 || co->index >= ARRAY_SIZE(auart_port)) |
| 946 | co->index = 0; |
| 947 | s = auart_port[co->index]; |
| 948 | if (!s) |
| 949 | return -ENODEV; |
| 950 | |
Fabio Estevam | 9bbc3dc | 2013-12-02 01:17:58 -0200 | [diff] [blame] | 951 | ret = clk_prepare_enable(s->clk); |
| 952 | if (ret) |
| 953 | return ret; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 954 | |
| 955 | if (options) |
| 956 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 957 | else |
| 958 | auart_console_get_options(&s->port, &baud, &parity, &bits); |
| 959 | |
| 960 | ret = uart_set_options(&s->port, co, baud, parity, bits, flow); |
| 961 | |
Shawn Guo | a481377 | 2011-12-20 14:10:29 +0800 | [diff] [blame] | 962 | clk_disable_unprepare(s->clk); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 963 | |
| 964 | return ret; |
| 965 | } |
| 966 | |
| 967 | static struct console auart_console = { |
| 968 | .name = "ttyAPP", |
| 969 | .write = auart_console_write, |
| 970 | .device = uart_console_device, |
| 971 | .setup = auart_console_setup, |
| 972 | .flags = CON_PRINTBUFFER, |
| 973 | .index = -1, |
| 974 | .data = &auart_driver, |
| 975 | }; |
| 976 | #endif |
| 977 | |
| 978 | static struct uart_driver auart_driver = { |
| 979 | .owner = THIS_MODULE, |
| 980 | .driver_name = "ttyAPP", |
| 981 | .dev_name = "ttyAPP", |
| 982 | .major = 0, |
| 983 | .minor = 0, |
| 984 | .nr = MXS_AUART_PORTS, |
| 985 | #ifdef CONFIG_SERIAL_MXS_AUART_CONSOLE |
| 986 | .cons = &auart_console, |
| 987 | #endif |
| 988 | }; |
| 989 | |
Fabio Estevam | 1ea6607 | 2012-06-18 10:06:09 -0300 | [diff] [blame] | 990 | /* |
| 991 | * This function returns 1 if pdev isn't a device instatiated by dt, 0 if it |
| 992 | * could successfully get all information from dt or a negative errno. |
| 993 | */ |
| 994 | static int serial_mxs_probe_dt(struct mxs_auart_port *s, |
| 995 | struct platform_device *pdev) |
| 996 | { |
| 997 | struct device_node *np = pdev->dev.of_node; |
| 998 | int ret; |
| 999 | |
| 1000 | if (!np) |
| 1001 | /* no device tree device */ |
| 1002 | return 1; |
| 1003 | |
| 1004 | ret = of_alias_get_id(np, "serial"); |
| 1005 | if (ret < 0) { |
| 1006 | dev_err(&pdev->dev, "failed to get alias id: %d\n", ret); |
| 1007 | return ret; |
| 1008 | } |
| 1009 | s->port.line = ret; |
| 1010 | |
Huang Shijie | 8418e67 | 2013-08-03 10:09:14 -0400 | [diff] [blame] | 1011 | if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) |
| 1012 | set_bit(MXS_AUART_RTSCTS, &s->flags); |
| 1013 | |
Fabio Estevam | 1ea6607 | 2012-06-18 10:06:09 -0300 | [diff] [blame] | 1014 | return 0; |
| 1015 | } |
| 1016 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 1017 | static int mxs_auart_probe(struct platform_device *pdev) |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1018 | { |
Huang Shijie | f4b1f03b | 2012-11-16 16:03:52 +0800 | [diff] [blame] | 1019 | const struct of_device_id *of_id = |
| 1020 | of_match_device(mxs_auart_dt_ids, &pdev->dev); |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1021 | struct mxs_auart_port *s; |
| 1022 | u32 version; |
| 1023 | int ret = 0; |
| 1024 | struct resource *r; |
| 1025 | |
| 1026 | s = kzalloc(sizeof(struct mxs_auart_port), GFP_KERNEL); |
| 1027 | if (!s) { |
| 1028 | ret = -ENOMEM; |
| 1029 | goto out; |
| 1030 | } |
| 1031 | |
Fabio Estevam | 1ea6607 | 2012-06-18 10:06:09 -0300 | [diff] [blame] | 1032 | ret = serial_mxs_probe_dt(s, pdev); |
| 1033 | if (ret > 0) |
| 1034 | s->port.line = pdev->id < 0 ? 0 : pdev->id; |
| 1035 | else if (ret < 0) |
| 1036 | goto out_free; |
| 1037 | |
Huang Shijie | f4b1f03b | 2012-11-16 16:03:52 +0800 | [diff] [blame] | 1038 | if (of_id) { |
| 1039 | pdev->id_entry = of_id->data; |
| 1040 | s->devtype = pdev->id_entry->driver_data; |
| 1041 | } |
| 1042 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1043 | s->clk = clk_get(&pdev->dev, NULL); |
| 1044 | if (IS_ERR(s->clk)) { |
| 1045 | ret = PTR_ERR(s->clk); |
| 1046 | goto out_free; |
| 1047 | } |
| 1048 | |
| 1049 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1050 | if (!r) { |
| 1051 | ret = -ENXIO; |
| 1052 | goto out_free_clk; |
| 1053 | } |
| 1054 | |
| 1055 | s->port.mapbase = r->start; |
| 1056 | s->port.membase = ioremap(r->start, resource_size(r)); |
| 1057 | s->port.ops = &mxs_auart_ops; |
| 1058 | s->port.iotype = UPIO_MEM; |
Hector Palacios | 9987f76 | 2013-10-03 09:32:03 +0200 | [diff] [blame] | 1059 | s->port.fifosize = MXS_AUART_FIFO_SIZE; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1060 | s->port.uartclk = clk_get_rate(s->clk); |
| 1061 | s->port.type = PORT_IMX; |
Wolfram Sang | 4c24f2c | 2013-04-19 21:06:20 +0200 | [diff] [blame] | 1062 | s->port.dev = s->dev = &pdev->dev; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1063 | |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1064 | s->irq = platform_get_irq(pdev, 0); |
| 1065 | s->port.irq = s->irq; |
| 1066 | ret = request_irq(s->irq, mxs_auart_irq_handle, 0, dev_name(&pdev->dev), s); |
| 1067 | if (ret) |
| 1068 | goto out_free_clk; |
| 1069 | |
| 1070 | platform_set_drvdata(pdev, s); |
| 1071 | |
Fabio Estevam | 1ea6607 | 2012-06-18 10:06:09 -0300 | [diff] [blame] | 1072 | auart_port[s->port.line] = s; |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1073 | |
| 1074 | mxs_auart_reset(&s->port); |
| 1075 | |
| 1076 | ret = uart_add_one_port(&auart_driver, &s->port); |
| 1077 | if (ret) |
| 1078 | goto out_free_irq; |
| 1079 | |
| 1080 | version = readl(s->port.membase + AUART_VERSION); |
| 1081 | dev_info(&pdev->dev, "Found APPUART %d.%d.%d\n", |
| 1082 | (version >> 24) & 0xff, |
| 1083 | (version >> 16) & 0xff, version & 0xffff); |
| 1084 | |
| 1085 | return 0; |
| 1086 | |
| 1087 | out_free_irq: |
| 1088 | auart_port[pdev->id] = NULL; |
| 1089 | free_irq(s->irq, s); |
| 1090 | out_free_clk: |
| 1091 | clk_put(s->clk); |
| 1092 | out_free: |
| 1093 | kfree(s); |
| 1094 | out: |
| 1095 | return ret; |
| 1096 | } |
| 1097 | |
Bill Pemberton | ae8d8a1 | 2012-11-19 13:26:18 -0500 | [diff] [blame] | 1098 | static int mxs_auart_remove(struct platform_device *pdev) |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1099 | { |
| 1100 | struct mxs_auart_port *s = platform_get_drvdata(pdev); |
| 1101 | |
| 1102 | uart_remove_one_port(&auart_driver, &s->port); |
| 1103 | |
| 1104 | auart_port[pdev->id] = NULL; |
| 1105 | |
| 1106 | clk_put(s->clk); |
| 1107 | free_irq(s->irq, s); |
| 1108 | kfree(s); |
| 1109 | |
| 1110 | return 0; |
| 1111 | } |
| 1112 | |
| 1113 | static struct platform_driver mxs_auart_driver = { |
| 1114 | .probe = mxs_auart_probe, |
Bill Pemberton | 2d47b71 | 2012-11-19 13:21:34 -0500 | [diff] [blame] | 1115 | .remove = mxs_auart_remove, |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1116 | .driver = { |
| 1117 | .name = "mxs-auart", |
| 1118 | .owner = THIS_MODULE, |
Fabio Estevam | 1ea6607 | 2012-06-18 10:06:09 -0300 | [diff] [blame] | 1119 | .of_match_table = mxs_auart_dt_ids, |
Sascha Hauer | 47d37d6 | 2011-01-11 15:54:54 +0100 | [diff] [blame] | 1120 | }, |
| 1121 | }; |
| 1122 | |
| 1123 | static int __init mxs_auart_init(void) |
| 1124 | { |
| 1125 | int r; |
| 1126 | |
| 1127 | r = uart_register_driver(&auart_driver); |
| 1128 | if (r) |
| 1129 | goto out; |
| 1130 | |
| 1131 | r = platform_driver_register(&mxs_auart_driver); |
| 1132 | if (r) |
| 1133 | goto out_err; |
| 1134 | |
| 1135 | return 0; |
| 1136 | out_err: |
| 1137 | uart_unregister_driver(&auart_driver); |
| 1138 | out: |
| 1139 | return r; |
| 1140 | } |
| 1141 | |
| 1142 | static void __exit mxs_auart_exit(void) |
| 1143 | { |
| 1144 | platform_driver_unregister(&mxs_auart_driver); |
| 1145 | uart_unregister_driver(&auart_driver); |
| 1146 | } |
| 1147 | |
| 1148 | module_init(mxs_auart_init); |
| 1149 | module_exit(mxs_auart_exit); |
| 1150 | MODULE_LICENSE("GPL"); |
| 1151 | MODULE_DESCRIPTION("Freescale MXS application uart driver"); |
Fabio Estevam | 1ea6607 | 2012-06-18 10:06:09 -0300 | [diff] [blame] | 1152 | MODULE_ALIAS("platform:mxs-auart"); |