Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s3c2410/gpio.c |
| 2 | * |
| 3 | * Copyright (c) 2004-2005 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * S3C2410 GPIO support |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | * |
| 22 | * Changelog |
| 23 | * 13-Sep-2004 BJD Implemented change of MISCCR |
| 24 | * 14-Sep-2004 BJD Added getpin call |
| 25 | * 14-Sep-2004 BJD Fixed bug in setpin() call |
| 26 | * 30-Sep-2004 BJD Fixed cfgpin() mask bug |
| 27 | * 01-Oct-2004 BJD Added getcfg() to get pin configuration |
| 28 | * 01-Oct-2004 BJD Fixed mask bug in pullup() call |
| 29 | * 01-Oct-2004 BJD Added getirq() to turn pin into irqno |
| 30 | * 04-Oct-2004 BJD Added irq filter controls for GPIO |
| 31 | * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code |
| 32 | * 13-Mar-2005 BJD Updates for __iomem |
Ben Dooks | 42d3a12 | 2005-10-28 15:26:41 +0100 | [diff] [blame^] | 33 | * 26-Oct-2005 BJD Added generic configuration types |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | */ |
| 35 | |
| 36 | |
| 37 | #include <linux/kernel.h> |
| 38 | #include <linux/init.h> |
| 39 | #include <linux/module.h> |
| 40 | #include <linux/interrupt.h> |
| 41 | #include <linux/ioport.h> |
| 42 | |
| 43 | #include <asm/hardware.h> |
| 44 | #include <asm/irq.h> |
| 45 | #include <asm/io.h> |
| 46 | |
| 47 | #include <asm/arch/regs-gpio.h> |
| 48 | |
| 49 | void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) |
| 50 | { |
| 51 | void __iomem *base = S3C2410_GPIO_BASE(pin); |
| 52 | unsigned long mask; |
| 53 | unsigned long con; |
| 54 | unsigned long flags; |
| 55 | |
| 56 | if (pin < S3C2410_GPIO_BANKB) { |
| 57 | mask = 1 << S3C2410_GPIO_OFFSET(pin); |
| 58 | } else { |
| 59 | mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; |
| 60 | } |
| 61 | |
Ben Dooks | 42d3a12 | 2005-10-28 15:26:41 +0100 | [diff] [blame^] | 62 | switch (function) { |
| 63 | case S3C2410_GPIO_LEAVE: |
| 64 | mask = 0; |
| 65 | function = 0; |
| 66 | break; |
| 67 | |
| 68 | case S3C2410_GPIO_INPUT: |
| 69 | case S3C2410_GPIO_OUTPUT: |
| 70 | case S3C2410_GPIO_SFN2: |
| 71 | case S3C2410_GPIO_SFN3: |
| 72 | if (pin < S3C2410_GPIO_BANKB) { |
| 73 | function &= 1; |
| 74 | function <<= S3C2410_GPIO_OFFSET(pin); |
| 75 | } else { |
| 76 | function &= 3; |
| 77 | function <<= S3C2410_GPIO_OFFSET(pin)*2; |
| 78 | } |
| 79 | } |
| 80 | |
| 81 | /* modify the specified register wwith IRQs off */ |
| 82 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | local_irq_save(flags); |
| 84 | |
| 85 | con = __raw_readl(base + 0x00); |
| 86 | con &= ~mask; |
| 87 | con |= function; |
| 88 | |
| 89 | __raw_writel(con, base + 0x00); |
| 90 | |
| 91 | local_irq_restore(flags); |
| 92 | } |
| 93 | |
| 94 | EXPORT_SYMBOL(s3c2410_gpio_cfgpin); |
| 95 | |
| 96 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) |
| 97 | { |
| 98 | void __iomem *base = S3C2410_GPIO_BASE(pin); |
| 99 | unsigned long mask; |
| 100 | |
| 101 | if (pin < S3C2410_GPIO_BANKB) { |
| 102 | mask = 1 << S3C2410_GPIO_OFFSET(pin); |
| 103 | } else { |
| 104 | mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; |
| 105 | } |
| 106 | |
| 107 | return __raw_readl(base) & mask; |
| 108 | } |
| 109 | |
| 110 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); |
| 111 | |
| 112 | void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) |
| 113 | { |
| 114 | void __iomem *base = S3C2410_GPIO_BASE(pin); |
| 115 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
| 116 | unsigned long flags; |
| 117 | unsigned long up; |
| 118 | |
| 119 | if (pin < S3C2410_GPIO_BANKB) |
| 120 | return; |
| 121 | |
| 122 | local_irq_save(flags); |
| 123 | |
| 124 | up = __raw_readl(base + 0x08); |
| 125 | up &= ~(1L << offs); |
| 126 | up |= to << offs; |
| 127 | __raw_writel(up, base + 0x08); |
| 128 | |
| 129 | local_irq_restore(flags); |
| 130 | } |
| 131 | |
| 132 | EXPORT_SYMBOL(s3c2410_gpio_pullup); |
| 133 | |
| 134 | void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) |
| 135 | { |
| 136 | void __iomem *base = S3C2410_GPIO_BASE(pin); |
| 137 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
| 138 | unsigned long flags; |
| 139 | unsigned long dat; |
| 140 | |
| 141 | local_irq_save(flags); |
| 142 | |
| 143 | dat = __raw_readl(base + 0x04); |
| 144 | dat &= ~(1 << offs); |
| 145 | dat |= to << offs; |
| 146 | __raw_writel(dat, base + 0x04); |
| 147 | |
| 148 | local_irq_restore(flags); |
| 149 | } |
| 150 | |
| 151 | EXPORT_SYMBOL(s3c2410_gpio_setpin); |
| 152 | |
| 153 | unsigned int s3c2410_gpio_getpin(unsigned int pin) |
| 154 | { |
| 155 | void __iomem *base = S3C2410_GPIO_BASE(pin); |
| 156 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
| 157 | |
| 158 | return __raw_readl(base + 0x04) & (1<< offs); |
| 159 | } |
| 160 | |
| 161 | EXPORT_SYMBOL(s3c2410_gpio_getpin); |
| 162 | |
| 163 | unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) |
| 164 | { |
| 165 | unsigned long flags; |
| 166 | unsigned long misccr; |
| 167 | |
| 168 | local_irq_save(flags); |
| 169 | misccr = __raw_readl(S3C2410_MISCCR); |
| 170 | misccr &= ~clear; |
| 171 | misccr ^= change; |
| 172 | __raw_writel(misccr, S3C2410_MISCCR); |
| 173 | local_irq_restore(flags); |
| 174 | |
| 175 | return misccr; |
| 176 | } |
| 177 | |
| 178 | EXPORT_SYMBOL(s3c2410_modify_misccr); |
| 179 | |
| 180 | int s3c2410_gpio_getirq(unsigned int pin) |
| 181 | { |
| 182 | if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23) |
| 183 | return -1; /* not valid interrupts */ |
| 184 | |
| 185 | if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) |
| 186 | return -1; /* not valid pin */ |
| 187 | |
| 188 | if (pin < S3C2410_GPF4) |
| 189 | return (pin - S3C2410_GPF0) + IRQ_EINT0; |
| 190 | |
| 191 | if (pin < S3C2410_GPG0) |
| 192 | return (pin - S3C2410_GPF4) + IRQ_EINT4; |
| 193 | |
| 194 | return (pin - S3C2410_GPG0) + IRQ_EINT8; |
| 195 | } |
| 196 | |
| 197 | EXPORT_SYMBOL(s3c2410_gpio_getirq); |
| 198 | |
| 199 | int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, |
| 200 | unsigned int config) |
| 201 | { |
| 202 | void __iomem *reg = S3C2410_EINFLT0; |
| 203 | unsigned long flags; |
| 204 | unsigned long val; |
| 205 | |
| 206 | if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15) |
| 207 | return -1; |
| 208 | |
| 209 | config &= 0xff; |
| 210 | |
| 211 | pin -= S3C2410_GPG8_EINT16; |
| 212 | reg += pin & ~3; |
| 213 | |
| 214 | local_irq_save(flags); |
| 215 | |
| 216 | /* update filter width and clock source */ |
| 217 | |
| 218 | val = __raw_readl(reg); |
| 219 | val &= ~(0xff << ((pin & 3) * 8)); |
| 220 | val |= config << ((pin & 3) * 8); |
| 221 | __raw_writel(val, reg); |
| 222 | |
| 223 | /* update filter enable */ |
| 224 | |
| 225 | val = __raw_readl(S3C2410_EXTINT2); |
| 226 | val &= ~(1 << ((pin * 4) + 3)); |
| 227 | val |= on << ((pin * 4) + 3); |
| 228 | __raw_writel(val, S3C2410_EXTINT2); |
| 229 | |
| 230 | local_irq_restore(flags); |
| 231 | |
| 232 | return 0; |
| 233 | } |
| 234 | |
| 235 | EXPORT_SYMBOL(s3c2410_gpio_irqfilter); |