Hans Verkuil | 1a0adaf | 2007-04-27 12:31:25 -0300 | [diff] [blame] | 1 | /* |
| 2 | ivtv driver internal defines and structures |
| 3 | Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com> |
| 4 | Copyright (C) 2004 Chris Kennedy <c@groovy.org> |
| 5 | Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl> |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ |
| 21 | |
| 22 | #ifndef IVTV_DRIVER_H |
| 23 | #define IVTV_DRIVER_H |
| 24 | |
| 25 | /* Internal header for ivtv project: |
| 26 | * Driver for the cx23415/6 chip. |
| 27 | * Author: Kevin Thayer (nufan_wfk at yahoo.com) |
| 28 | * License: GPL |
| 29 | * http://www.ivtvdriver.org |
| 30 | * |
| 31 | * ----- |
| 32 | * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com> |
| 33 | * and Takeru KOMORIYA<komoriya@paken.org> |
| 34 | * |
| 35 | * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org> |
| 36 | * using information provided by Jiun-Kuei Jung @ AVerMedia. |
| 37 | */ |
| 38 | |
| 39 | #include <linux/version.h> |
| 40 | #include <linux/module.h> |
| 41 | #include <linux/moduleparam.h> |
| 42 | #include <linux/init.h> |
| 43 | #include <linux/delay.h> |
| 44 | #include <linux/sched.h> |
| 45 | #include <linux/fs.h> |
| 46 | #include <linux/pci.h> |
| 47 | #include <linux/interrupt.h> |
| 48 | #include <linux/spinlock.h> |
| 49 | #include <linux/i2c.h> |
| 50 | #include <linux/i2c-algo-bit.h> |
| 51 | #include <linux/list.h> |
| 52 | #include <linux/unistd.h> |
| 53 | #include <linux/byteorder/swab.h> |
| 54 | #include <linux/pagemap.h> |
| 55 | #include <linux/workqueue.h> |
| 56 | #include <linux/mutex.h> |
| 57 | #include <asm/uaccess.h> |
| 58 | #include <asm/system.h> |
| 59 | |
| 60 | #include <linux/dvb/video.h> |
| 61 | #include <linux/dvb/audio.h> |
| 62 | #include <media/v4l2-common.h> |
| 63 | #include <media/tuner.h> |
| 64 | #include <media/cx2341x.h> |
| 65 | |
| 66 | /* #define HAVE_XC3028 1 */ |
| 67 | |
| 68 | #include <media/ivtv.h> |
| 69 | |
| 70 | #ifdef CONFIG_LIRC_I2C |
| 71 | # error "This driver is not compatible with the LIRC I2C kernel configuration option." |
| 72 | #endif /* CONFIG_LIRC_I2C */ |
| 73 | |
| 74 | #ifndef CONFIG_PCI |
| 75 | # error "This driver requires kernel PCI support." |
| 76 | #endif /* CONFIG_PCI */ |
| 77 | |
| 78 | #define IVTV_ENCODER_OFFSET 0x00000000 |
| 79 | #define IVTV_ENCODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */ |
| 80 | |
| 81 | #define IVTV_DECODER_OFFSET 0x01000000 |
| 82 | #define IVTV_DECODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */ |
| 83 | |
| 84 | #define IVTV_REG_OFFSET 0x02000000 |
| 85 | #define IVTV_REG_SIZE 0x00010000 |
| 86 | |
| 87 | /* Buffers on hardware offsets */ |
| 88 | #define IVTV_YUV_BUFFER_OFFSET 0x001a8600 /* First YUV Buffer */ |
| 89 | #define IVTV_YUV_BUFFER_OFFSET_1 0x00240400 /* Second YUV Buffer */ |
| 90 | #define IVTV_YUV_BUFFER_OFFSET_2 0x002d8200 /* Third YUV Buffer */ |
| 91 | #define IVTV_YUV_BUFFER_OFFSET_3 0x00370000 /* Fourth YUV Buffer */ |
| 92 | #define IVTV_YUV_BUFFER_UV_OFFSET 0x65400 /* Offset to UV Buffer */ |
| 93 | |
| 94 | /* Offset to filter table in firmware */ |
| 95 | #define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8 |
| 96 | #define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358 |
| 97 | |
| 98 | extern const u32 yuv_offset[4]; |
| 99 | |
| 100 | /* Maximum ivtv driver instances. |
| 101 | Based on 6 PVR500s each with two PVR15s... |
| 102 | TODO: make this dynamic. I believe it is only a global in order to support |
| 103 | ivtv-fb. There must be a better way to do that. */ |
| 104 | #define IVTV_MAX_CARDS 12 |
| 105 | |
| 106 | /* Supported cards */ |
| 107 | #define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */ |
| 108 | #define IVTV_CARD_PVR_350 1 /* encoder, decoder, tv-out */ |
| 109 | #define IVTV_CARD_PVR_150 2 /* WinTV PVR 150 and PVR 500 (really just two |
| 110 | PVR150s on one PCI board) */ |
| 111 | #define IVTV_CARD_M179 3 /* AVerMedia M179 (encoder only) */ |
| 112 | #define IVTV_CARD_MPG600 4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */ |
| 113 | #define IVTV_CARD_MPG160 5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160 |
| 114 | cx23415 based, but does not have tv-out */ |
| 115 | #define IVTV_CARD_PG600 6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */ |
| 116 | #define IVTV_CARD_AVC2410 7 /* Adaptec AVC-2410 */ |
| 117 | #define IVTV_CARD_AVC2010 8 /* Adaptec AVD-2010 (No Tuner) */ |
| 118 | #define IVTV_CARD_TG5000TV 9 /* NAGASE TRANSGEAR 5000TV, encoder only */ |
| 119 | #define IVTV_CARD_VA2000MAX_SNT6 10 /* VA2000MAX-STN6 */ |
| 120 | #define IVTV_CARD_CX23416GYC 11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */ |
| 121 | #define IVTV_CARD_GV_MVPRX 12 /* I/O Data GV-MVP/RX, RX2, RX2W */ |
| 122 | #define IVTV_CARD_GV_MVPRX2E 13 /* I/O Data GV-MVP/RX2E */ |
| 123 | #define IVTV_CARD_GOTVIEW_PCI_DVD 14 /* GotView PCI DVD */ |
| 124 | #define IVTV_CARD_GOTVIEW_PCI_DVD2 15 /* GotView PCI DVD2 */ |
| 125 | #define IVTV_CARD_YUAN_MPC622 16 /* Yuan MPC622 miniPCI */ |
| 126 | #define IVTV_CARD_DCTMTVP1 17 /* DIGITAL COWBOY DCT-MTVP1 */ |
| 127 | #ifdef HAVE_XC3028 |
| 128 | #define IVTV_CARD_PG600V2 18 /* Yuan PG600V2/GotView PCI DVD Lite/Club3D ZAP-TV1x01 */ |
| 129 | #define IVTV_CARD_LAST 18 |
| 130 | #else |
| 131 | #define IVTV_CARD_LAST 17 |
| 132 | #endif |
| 133 | |
| 134 | /* Variants of existing cards but with the same PCI IDs. The driver |
| 135 | detects these based on other device information. |
| 136 | These cards must always come last. |
| 137 | New cards must be inserted above, and the indices of the cards below |
| 138 | must be adjusted accordingly. */ |
| 139 | |
| 140 | /* PVR-350 V1 (uses saa7114) */ |
| 141 | #define IVTV_CARD_PVR_350_V1 (IVTV_CARD_LAST+1) |
| 142 | /* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */ |
| 143 | #define IVTV_CARD_CX23416GYC_NOGR (IVTV_CARD_LAST+2) |
| 144 | #define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3) |
| 145 | |
| 146 | #define IVTV_ENC_STREAM_TYPE_MPG 0 |
| 147 | #define IVTV_ENC_STREAM_TYPE_YUV 1 |
| 148 | #define IVTV_ENC_STREAM_TYPE_VBI 2 |
| 149 | #define IVTV_ENC_STREAM_TYPE_PCM 3 |
| 150 | #define IVTV_ENC_STREAM_TYPE_RAD 4 |
| 151 | #define IVTV_DEC_STREAM_TYPE_MPG 5 |
| 152 | #define IVTV_DEC_STREAM_TYPE_VBI 6 |
| 153 | #define IVTV_DEC_STREAM_TYPE_VOUT 7 |
| 154 | #define IVTV_DEC_STREAM_TYPE_YUV 8 |
| 155 | #define IVTV_MAX_STREAMS 9 |
| 156 | |
| 157 | #define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */ |
| 158 | #define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */ |
| 159 | #define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */ |
| 160 | #define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */ |
| 161 | #define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */ |
| 162 | #define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */ |
| 163 | |
| 164 | #define IVTV_ENC_MEM_START 0x00000000 |
| 165 | #define IVTV_DEC_MEM_START 0x01000000 |
| 166 | |
| 167 | /* system vendor and device IDs */ |
| 168 | #define PCI_VENDOR_ID_ICOMP 0x4444 |
| 169 | #define PCI_DEVICE_ID_IVTV15 0x0803 |
| 170 | #define PCI_DEVICE_ID_IVTV16 0x0016 |
| 171 | |
| 172 | /* subsystem vendor ID */ |
| 173 | #define IVTV_PCI_ID_HAUPPAUGE 0x0070 |
| 174 | #define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270 |
| 175 | #define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070 |
| 176 | #define IVTV_PCI_ID_ADAPTEC 0x9005 |
| 177 | #define IVTV_PCI_ID_AVERMEDIA 0x1461 |
| 178 | #define IVTV_PCI_ID_YUAN1 0x12ab |
| 179 | #define IVTV_PCI_ID_YUAN2 0xff01 |
| 180 | #define IVTV_PCI_ID_YUAN3 0xffab |
| 181 | #define IVTV_PCI_ID_YUAN4 0xfbab |
| 182 | #define IVTV_PCI_ID_DIAMONDMM 0xff92 |
| 183 | #define IVTV_PCI_ID_IODATA 0x10fc |
| 184 | #define IVTV_PCI_ID_MELCO 0x1154 |
| 185 | #define IVTV_PCI_ID_GOTVIEW1 0xffac |
| 186 | #define IVTV_PCI_ID_GOTVIEW2 0xffad |
| 187 | |
| 188 | /* Decoder Buffer hardware size on Chip */ |
| 189 | #define IVTV_DEC_MAX_BUF 0x00100000 /* max bytes in decoder buffer */ |
| 190 | #define IVTV_DEC_MIN_BUF 0x00010000 /* min bytes in dec buffer */ |
| 191 | |
| 192 | /* ======================================================================== */ |
| 193 | /* ========================== START USER SETTABLE DMA VARIABLES =========== */ |
| 194 | /* ======================================================================== */ |
| 195 | |
| 196 | #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */ |
| 197 | |
| 198 | /* DMA Buffers, Default size in MB allocated */ |
| 199 | #define IVTV_DEFAULT_ENC_MPG_BUFFERS 4 |
| 200 | #define IVTV_DEFAULT_ENC_YUV_BUFFERS 2 |
| 201 | #define IVTV_DEFAULT_ENC_VBI_BUFFERS 1 |
| 202 | #define IVTV_DEFAULT_ENC_PCM_BUFFERS 1 |
| 203 | #define IVTV_DEFAULT_DEC_MPG_BUFFERS 1 |
| 204 | #define IVTV_DEFAULT_DEC_YUV_BUFFERS 1 |
| 205 | #define IVTV_DEFAULT_DEC_VBI_BUFFERS 1 |
| 206 | |
| 207 | /* ======================================================================== */ |
| 208 | /* ========================== END USER SETTABLE DMA VARIABLES ============= */ |
| 209 | /* ======================================================================== */ |
| 210 | |
| 211 | /* Decoder Status Register */ |
| 212 | #define IVTV_DMA_ERR_LIST 0x00000010 |
| 213 | #define IVTV_DMA_ERR_WRITE 0x00000008 |
| 214 | #define IVTV_DMA_ERR_READ 0x00000004 |
| 215 | #define IVTV_DMA_SUCCESS_WRITE 0x00000002 |
| 216 | #define IVTV_DMA_SUCCESS_READ 0x00000001 |
| 217 | #define IVTV_DMA_READ_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ) |
| 218 | #define IVTV_DMA_WRITE_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE) |
| 219 | #define IVTV_DMA_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ) |
| 220 | |
| 221 | /* DMA Registers */ |
| 222 | #define IVTV_REG_DMAXFER (0x0000) |
| 223 | #define IVTV_REG_DMASTATUS (0x0004) |
| 224 | #define IVTV_REG_DECDMAADDR (0x0008) |
| 225 | #define IVTV_REG_ENCDMAADDR (0x000c) |
| 226 | #define IVTV_REG_DMACONTROL (0x0010) |
| 227 | #define IVTV_REG_IRQSTATUS (0x0040) |
| 228 | #define IVTV_REG_IRQMASK (0x0048) |
| 229 | |
| 230 | /* Setup Registers */ |
| 231 | #define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8) |
| 232 | #define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC) |
| 233 | #define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8) |
| 234 | #define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC) |
| 235 | #define IVTV_REG_VDM (0x2800) |
| 236 | #define IVTV_REG_AO (0x2D00) |
| 237 | #define IVTV_REG_BYTEFLUSH (0x2D24) |
| 238 | #define IVTV_REG_SPU (0x9050) |
| 239 | #define IVTV_REG_HW_BLOCKS (0x9054) |
| 240 | #define IVTV_REG_VPU (0x9058) |
| 241 | #define IVTV_REG_APU (0xA064) |
| 242 | |
| 243 | #define IVTV_IRQ_ENC_START_CAP (0x1 << 31) |
| 244 | #define IVTV_IRQ_ENC_EOS (0x1 << 30) |
| 245 | #define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29) |
| 246 | #define IVTV_IRQ_ENC_VIM_RST (0x1 << 28) |
| 247 | #define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27) |
| 248 | #define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24) |
| 249 | #define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22) |
| 250 | #define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20) |
| 251 | #define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19) |
| 252 | #define IVTV_IRQ_DMA_ERR (0x1 << 18) |
| 253 | #define IVTV_IRQ_DMA_WRITE (0x1 << 17) |
| 254 | #define IVTV_IRQ_DMA_READ (0x1 << 16) |
| 255 | #define IVTV_IRQ_DEC_VSYNC (0x1 << 10) |
| 256 | |
| 257 | /* IRQ Masks */ |
| 258 | #define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|IVTV_IRQ_DMA_READ) |
| 259 | |
| 260 | #define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS) |
| 261 | #define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG) |
| 262 | |
| 263 | /* i2c stuff */ |
| 264 | #define I2C_CLIENTS_MAX 16 |
| 265 | |
| 266 | /* debugging */ |
| 267 | |
| 268 | #define IVTV_DBGFLG_WARN (1 << 0) |
| 269 | #define IVTV_DBGFLG_INFO (1 << 1) |
| 270 | #define IVTV_DBGFLG_API (1 << 2) |
| 271 | #define IVTV_DBGFLG_DMA (1 << 3) |
| 272 | #define IVTV_DBGFLG_IOCTL (1 << 4) |
| 273 | #define IVTV_DBGFLG_I2C (1 << 5) |
| 274 | #define IVTV_DBGFLG_IRQ (1 << 6) |
| 275 | #define IVTV_DBGFLG_DEC (1 << 7) |
| 276 | #define IVTV_DBGFLG_YUV (1 << 8) |
| 277 | |
| 278 | /* NOTE: extra space before comma in 'itv->num , ## args' is required for |
| 279 | gcc-2.95, otherwise it won't compile. */ |
| 280 | #define IVTV_DEBUG(x, type, fmt, args...) \ |
| 281 | do { \ |
| 282 | if ((x) & ivtv_debug) \ |
| 283 | printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \ |
| 284 | } while (0) |
| 285 | #define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args) |
| 286 | #define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info",fmt , ## args) |
| 287 | #define IVTV_DEBUG_API(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args) |
| 288 | #define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args) |
| 289 | #define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args) |
| 290 | #define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args) |
| 291 | #define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args) |
| 292 | #define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args) |
| 293 | #define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args) |
| 294 | |
| 295 | #define IVTV_FB_DEBUG(x, type, fmt, args...) \ |
| 296 | do { \ |
| 297 | if ((x) & ivtv_debug) \ |
| 298 | printk(KERN_INFO "ivtv%d-fb " type ": " fmt, itv->num , ## args); \ |
| 299 | } while (0) |
| 300 | #define IVTV_FB_DEBUG_WARN(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args) |
| 301 | #define IVTV_FB_DEBUG_INFO(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args) |
| 302 | #define IVTV_FB_DEBUG_API(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args) |
| 303 | #define IVTV_FB_DEBUG_DMA(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args) |
| 304 | #define IVTV_FB_DEBUG_IOCTL(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args) |
| 305 | #define IVTV_FB_DEBUG_I2C(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args) |
| 306 | #define IVTV_FB_DEBUG_IRQ(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args) |
| 307 | #define IVTV_FB_DEBUG_DEC(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args) |
| 308 | #define IVTV_FB_DEBUG_YUV(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args) |
| 309 | |
| 310 | /* Standard kernel messages */ |
| 311 | #define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args) |
| 312 | #define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args) |
| 313 | #define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args) |
Hans Verkuil | 43053c0 | 2007-03-03 08:40:36 -0300 | [diff] [blame^] | 314 | #define IVTV_FB_ERR(fmt, args...) printk(KERN_ERR "ivtv%d-fb: " fmt, itv->num , ## args) |
| 315 | #define IVTV_FB_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d-fb: " fmt, itv->num , ## args) |
| 316 | #define IVTV_FB_INFO(fmt, args...) printk(KERN_INFO "ivtv%d-fb: " fmt, itv->num , ## args) |
Hans Verkuil | 1a0adaf | 2007-04-27 12:31:25 -0300 | [diff] [blame] | 317 | |
| 318 | /* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */ |
| 319 | #define MPEG_FRAME_TYPE_IFRAME 1 |
| 320 | #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3 |
| 321 | #define MPEG_FRAME_TYPE_ALL 7 |
| 322 | |
| 323 | /* output modes (cx23415 only) */ |
| 324 | #define OUT_NONE 0 |
| 325 | #define OUT_MPG 1 |
| 326 | #define OUT_YUV 2 |
| 327 | #define OUT_UDMA_YUV 3 |
| 328 | #define OUT_PASSTHROUGH 4 |
| 329 | |
| 330 | #define IVTV_MAX_PGM_INDEX (400) |
| 331 | |
| 332 | extern int ivtv_debug; |
| 333 | |
| 334 | |
| 335 | struct ivtv_options { |
| 336 | int megabytes[IVTV_MAX_STREAMS]; /* Size in megabytes of each stream */ |
| 337 | int cardtype; /* force card type on load */ |
| 338 | int tuner; /* set tuner on load */ |
| 339 | int radio; /* enable/disable radio */ |
| 340 | int newi2c; /* New I2C algorithm */ |
| 341 | }; |
| 342 | |
| 343 | #define IVTV_MBOX_DMA_START 6 |
| 344 | #define IVTV_MBOX_DMA_END 8 |
| 345 | #define IVTV_MBOX_DMA 9 |
| 346 | #define IVTV_MBOX_FIELD_DISPLAYED 8 |
| 347 | |
| 348 | /* ivtv-specific mailbox template */ |
| 349 | struct ivtv_mailbox { |
| 350 | u32 flags; |
| 351 | u32 cmd; |
| 352 | u32 retval; |
| 353 | u32 timeout; |
| 354 | u32 data[CX2341X_MBOX_MAX_DATA]; |
| 355 | }; |
| 356 | |
| 357 | struct ivtv_api_cache { |
| 358 | unsigned long last_jiffies; /* when last command was issued */ |
| 359 | u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */ |
| 360 | }; |
| 361 | |
| 362 | struct ivtv_mailbox_data { |
| 363 | volatile struct ivtv_mailbox __iomem *mbox; |
| 364 | /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes. |
| 365 | If the bit is set, then the corresponding mailbox is in use by the driver. */ |
| 366 | unsigned long busy; |
| 367 | u8 max_mbox; |
| 368 | }; |
| 369 | |
| 370 | /* per-buffer bit flags */ |
| 371 | #define IVTV_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */ |
| 372 | |
| 373 | /* per-stream, s_flags */ |
| 374 | #define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */ |
| 375 | #define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */ |
| 376 | #define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */ |
| 377 | |
| 378 | #define IVTV_F_S_CLAIMED 3 /* this stream is claimed */ |
| 379 | #define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */ |
| 380 | #define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */ |
| 381 | #define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */ |
| 382 | #define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */ |
| 383 | #define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */ |
| 384 | |
| 385 | /* per-ivtv, i_flags */ |
| 386 | #define IVTV_F_I_DMA 0 /* DMA in progress */ |
| 387 | #define IVTV_F_I_UDMA 1 /* UDMA in progress */ |
| 388 | #define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */ |
| 389 | |
| 390 | #define IVTV_F_I_SPEED_CHANGE 3 /* A speed change is in progress */ |
| 391 | #define IVTV_F_I_EOS 4 /* End of encoder stream reached */ |
| 392 | #define IVTV_F_I_RADIO_USER 5 /* The radio tuner is selected */ |
| 393 | #define IVTV_F_I_DIG_RST 6 /* Reset digitizer */ |
| 394 | #define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */ |
| 395 | #define IVTV_F_I_ENC_VBI 8 /* VBI DMA */ |
| 396 | #define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */ |
| 397 | #define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */ |
| 398 | #define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */ |
| 399 | #define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */ |
| 400 | #define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */ |
| 401 | #define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */ |
| 402 | |
| 403 | /* Event notifications */ |
| 404 | #define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */ |
| 405 | #define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */ |
| 406 | #define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */ |
| 407 | #define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */ |
| 408 | |
| 409 | /* Scatter-Gather array element, used in DMA transfers */ |
| 410 | struct ivtv_SG_element { |
| 411 | u32 src; |
| 412 | u32 dst; |
| 413 | u32 size; |
| 414 | }; |
| 415 | |
| 416 | struct ivtv_user_dma { |
| 417 | struct mutex lock; |
| 418 | int page_count; |
| 419 | struct page *map[IVTV_DMA_SG_OSD_ENT]; |
| 420 | |
| 421 | /* Base Dev SG Array for cx23415/6 */ |
| 422 | struct ivtv_SG_element SGarray[IVTV_DMA_SG_OSD_ENT]; |
| 423 | dma_addr_t SG_handle; |
| 424 | int SG_length; |
| 425 | |
| 426 | /* SG List of Buffers */ |
| 427 | struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT]; |
| 428 | }; |
| 429 | |
| 430 | struct ivtv_dma_page_info { |
| 431 | unsigned long uaddr; |
| 432 | unsigned long first; |
| 433 | unsigned long last; |
| 434 | unsigned int offset; |
| 435 | unsigned int tail; |
| 436 | int page_count; |
| 437 | }; |
| 438 | |
| 439 | struct ivtv_buffer { |
| 440 | struct list_head list; |
| 441 | dma_addr_t dma_handle; |
| 442 | unsigned long b_flags; |
| 443 | char *buf; |
| 444 | |
| 445 | u32 bytesused; |
| 446 | u32 readpos; |
| 447 | }; |
| 448 | |
| 449 | struct ivtv_queue { |
| 450 | struct list_head list; |
| 451 | u32 buffers; |
| 452 | u32 length; |
| 453 | u32 bytesused; |
| 454 | }; |
| 455 | |
| 456 | struct ivtv; /* forward reference */ |
| 457 | |
| 458 | struct ivtv_stream { |
| 459 | /* These first four fields are always set, even if the stream |
| 460 | is not actually created. */ |
| 461 | struct video_device *v4l2dev; /* NULL when stream not created */ |
| 462 | struct ivtv *itv; /* for ease of use */ |
| 463 | const char *name; /* name of the stream */ |
| 464 | int type; /* stream type */ |
| 465 | |
| 466 | u32 id; |
| 467 | spinlock_t qlock; /* locks access to the queues */ |
| 468 | unsigned long s_flags; /* status flags, see above */ |
| 469 | int dma; /* can be PCI_DMA_TODEVICE, |
| 470 | PCI_DMA_FROMDEVICE or |
| 471 | PCI_DMA_NONE */ |
| 472 | u32 dma_offset; |
| 473 | u32 dma_backup; |
| 474 | u64 dma_pts; |
| 475 | |
| 476 | int subtype; |
| 477 | wait_queue_head_t waitq; |
| 478 | u32 dma_last_offset; |
| 479 | |
| 480 | /* Buffer Stats */ |
| 481 | u32 buffers; |
| 482 | u32 buf_size; |
| 483 | u32 buffers_stolen; |
| 484 | |
| 485 | /* Buffer Queues */ |
| 486 | struct ivtv_queue q_free; /* free buffers */ |
| 487 | struct ivtv_queue q_full; /* full buffers */ |
| 488 | struct ivtv_queue q_io; /* waiting for I/O */ |
| 489 | struct ivtv_queue q_dma; /* waiting for DMA */ |
| 490 | struct ivtv_queue q_predma; /* waiting for DMA */ |
| 491 | |
| 492 | /* Base Dev SG Array for cx23415/6 */ |
| 493 | struct ivtv_SG_element *SGarray; |
| 494 | dma_addr_t SG_handle; |
| 495 | int SG_length; |
| 496 | |
| 497 | /* SG List of Buffers */ |
| 498 | struct scatterlist *SGlist; |
| 499 | }; |
| 500 | |
| 501 | struct ivtv_open_id { |
| 502 | u32 open_id; |
| 503 | int type; |
| 504 | struct ivtv *itv; |
| 505 | }; |
| 506 | |
| 507 | #define IVTV_YUV_UPDATE_HORIZONTAL 0x01 |
| 508 | #define IVTV_YUV_UPDATE_VERTICAL 0x02 |
| 509 | |
| 510 | struct yuv_frame_info |
| 511 | { |
| 512 | u32 update; |
| 513 | int src_x; |
| 514 | int src_y; |
| 515 | unsigned int src_w; |
| 516 | unsigned int src_h; |
| 517 | int dst_x; |
| 518 | int dst_y; |
| 519 | unsigned int dst_w; |
| 520 | unsigned int dst_h; |
| 521 | int pan_x; |
| 522 | int pan_y; |
| 523 | u32 vis_w; |
| 524 | u32 vis_h; |
| 525 | u32 interlaced_y; |
| 526 | u32 interlaced_uv; |
| 527 | int tru_x; |
| 528 | u32 tru_w; |
| 529 | u32 tru_h; |
| 530 | u32 offset_y; |
| 531 | }; |
| 532 | |
| 533 | #define IVTV_YUV_MODE_INTERLACED 0x00 |
| 534 | #define IVTV_YUV_MODE_PROGRESSIVE 0x01 |
| 535 | #define IVTV_YUV_MODE_AUTO 0x02 |
| 536 | #define IVTV_YUV_MODE_MASK 0x03 |
| 537 | |
| 538 | #define IVTV_YUV_SYNC_EVEN 0x00 |
| 539 | #define IVTV_YUV_SYNC_ODD 0x04 |
| 540 | #define IVTV_YUV_SYNC_MASK 0x04 |
| 541 | |
| 542 | struct yuv_playback_info |
| 543 | { |
| 544 | u32 reg_2834; |
| 545 | u32 reg_2838; |
| 546 | u32 reg_283c; |
| 547 | u32 reg_2840; |
| 548 | u32 reg_2844; |
| 549 | u32 reg_2848; |
| 550 | u32 reg_2854; |
| 551 | u32 reg_285c; |
| 552 | u32 reg_2864; |
| 553 | |
| 554 | u32 reg_2870; |
| 555 | u32 reg_2874; |
| 556 | u32 reg_2890; |
| 557 | u32 reg_2898; |
| 558 | u32 reg_289c; |
| 559 | |
| 560 | u32 reg_2918; |
| 561 | u32 reg_291c; |
| 562 | u32 reg_2920; |
| 563 | u32 reg_2924; |
| 564 | u32 reg_2928; |
| 565 | u32 reg_292c; |
| 566 | u32 reg_2930; |
| 567 | |
| 568 | u32 reg_2934; |
| 569 | |
| 570 | u32 reg_2938; |
| 571 | u32 reg_293c; |
| 572 | u32 reg_2940; |
| 573 | u32 reg_2944; |
| 574 | u32 reg_2948; |
| 575 | u32 reg_294c; |
| 576 | u32 reg_2950; |
| 577 | u32 reg_2954; |
| 578 | u32 reg_2958; |
| 579 | u32 reg_295c; |
| 580 | u32 reg_2960; |
| 581 | u32 reg_2964; |
| 582 | u32 reg_2968; |
| 583 | u32 reg_296c; |
| 584 | |
| 585 | u32 reg_2970; |
| 586 | |
| 587 | int v_filter_1; |
| 588 | int v_filter_2; |
| 589 | int h_filter; |
| 590 | |
| 591 | u32 osd_x_offset; |
| 592 | u32 osd_y_offset; |
| 593 | |
| 594 | u32 osd_x_pan; |
| 595 | u32 osd_y_pan; |
| 596 | |
| 597 | u32 osd_vis_w; |
| 598 | u32 osd_vis_h; |
| 599 | |
| 600 | int decode_height; |
| 601 | |
| 602 | int frame_interlaced; |
| 603 | int frame_interlaced_last; |
| 604 | |
| 605 | int lace_mode; |
| 606 | int lace_threshold; |
| 607 | int lace_threshold_last; |
| 608 | int lace_sync_field; |
| 609 | |
| 610 | atomic_t next_dma_frame; |
| 611 | atomic_t next_fill_frame; |
| 612 | |
| 613 | u32 yuv_forced_update; |
| 614 | int update_frame; |
| 615 | struct workqueue_struct *work_queues; |
| 616 | struct work_struct work_queue; |
| 617 | struct yuv_frame_info new_frame_info[4]; |
| 618 | struct yuv_frame_info old_frame_info; |
| 619 | struct yuv_frame_info old_frame_info_args; |
| 620 | |
| 621 | void *blanking_ptr; |
| 622 | dma_addr_t blanking_dmaptr; |
| 623 | }; |
| 624 | |
| 625 | #define IVTV_VBI_FRAMES 32 |
| 626 | |
| 627 | /* VBI data */ |
| 628 | struct vbi_info { |
| 629 | u32 dec_start; |
| 630 | u32 enc_start, enc_size; |
| 631 | int fpi; |
| 632 | u32 frame; |
| 633 | u32 dma_offset; |
| 634 | u8 cc_data_odd[256]; |
| 635 | u8 cc_data_even[256]; |
| 636 | int cc_pos; |
| 637 | u8 cc_no_update; |
| 638 | u8 vps[5]; |
| 639 | u8 vps_found; |
| 640 | int wss; |
| 641 | u8 wss_found; |
| 642 | u8 wss_no_update; |
| 643 | u32 raw_decoder_line_size; |
| 644 | u8 raw_decoder_sav_odd_field; |
| 645 | u8 raw_decoder_sav_even_field; |
| 646 | u32 sliced_decoder_line_size; |
| 647 | u8 sliced_decoder_sav_odd_field; |
| 648 | u8 sliced_decoder_sav_even_field; |
| 649 | struct v4l2_format in; |
| 650 | /* convenience pointer to sliced struct in vbi_in union */ |
| 651 | struct v4l2_sliced_vbi_format *sliced_in; |
| 652 | u32 service_set_in; |
| 653 | u32 service_set_out; |
| 654 | int insert_mpeg; |
| 655 | |
| 656 | /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines. |
| 657 | One for /dev/vbi0 and one for /dev/vbi8 */ |
| 658 | struct v4l2_sliced_vbi_data sliced_data[36]; |
| 659 | struct v4l2_sliced_vbi_data sliced_dec_data[36]; |
| 660 | |
| 661 | /* Buffer for VBI data inserted into MPEG stream. |
| 662 | The first byte is a dummy byte that's never used. |
| 663 | The next 16 bytes contain the MPEG header for the VBI data, |
| 664 | the remainder is the actual VBI data. |
| 665 | The max size accepted by the MPEG VBI reinsertion turns out |
| 666 | to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes, |
| 667 | where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is |
| 668 | a single line header byte and 2 * 18 is the number of VBI lines per frame. |
| 669 | |
| 670 | However, it seems that the data must be 1K aligned, so we have to |
| 671 | pad the data until the 1 or 2 K boundary. |
| 672 | |
| 673 | This pointer array will allocate 2049 bytes to store each VBI frame. */ |
| 674 | u8 *sliced_mpeg_data[IVTV_VBI_FRAMES]; |
| 675 | u32 sliced_mpeg_size[IVTV_VBI_FRAMES]; |
| 676 | struct ivtv_buffer sliced_mpeg_buf; |
| 677 | u32 inserted_frame; |
| 678 | |
| 679 | struct workqueue_struct *work_queues; |
| 680 | struct work_struct work_queue; |
| 681 | u32 start[2], count; |
| 682 | u32 raw_size; |
| 683 | u32 sliced_size; |
| 684 | }; |
| 685 | |
| 686 | /* forward declaration of struct defined in ivtv-cards.h */ |
| 687 | struct ivtv_card; |
| 688 | |
| 689 | /* Struct to hold info about ivtv cards */ |
| 690 | struct ivtv { |
| 691 | int num; /* board number, -1 during init! */ |
| 692 | char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */ |
| 693 | struct pci_dev *dev; /* PCI device */ |
| 694 | const struct ivtv_card *card; /* card information */ |
| 695 | const char *card_name; /* full name of the card */ |
| 696 | u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */ |
| 697 | u8 is_50hz; |
| 698 | u8 is_60hz; |
| 699 | u8 is_out_50hz; |
| 700 | u8 is_out_60hz; |
| 701 | u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */ |
| 702 | u8 nof_inputs; /* number of video inputs */ |
| 703 | u8 nof_audio_inputs; /* number of audio inputs */ |
| 704 | u32 v4l2_cap; /* V4L2 capabilities of card */ |
| 705 | u32 hw_flags; /* Hardware description of the board */ |
| 706 | |
| 707 | /* controlling Video decoder function */ |
| 708 | int (*video_dec_func)(struct ivtv *, unsigned int, void *); |
| 709 | |
| 710 | struct ivtv_options options; /* User options */ |
| 711 | int stream_buf_size[IVTV_MAX_STREAMS]; /* Stream buffer size */ |
| 712 | struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* Stream data */ |
| 713 | int speed; |
| 714 | u8 speed_mute_audio; |
| 715 | unsigned long i_flags; /* global ivtv flags */ |
| 716 | atomic_t capturing; /* count number of active capture streams */ |
| 717 | atomic_t decoding; /* count number of active decoding streams */ |
| 718 | u32 irq_rr_idx; /* Round-robin stream index */ |
| 719 | int cur_dma_stream; /* index of stream doing DMA */ |
| 720 | u32 dma_data_req_offset; |
| 721 | u32 dma_data_req_size; |
| 722 | int output_mode; /* NONE, MPG, YUV, UDMA YUV, passthrough */ |
| 723 | spinlock_t lock; /* lock access to this struct */ |
| 724 | int search_pack_header; |
| 725 | |
| 726 | spinlock_t dma_reg_lock; /* lock access to DMA engine registers */ |
| 727 | |
| 728 | /* User based DMA for OSD */ |
| 729 | struct ivtv_user_dma udma; |
| 730 | |
| 731 | int open_id; /* incremented each time an open occurs, used as unique ID. |
| 732 | starts at 1, so 0 can be used as uninitialized value |
| 733 | in the stream->id. */ |
| 734 | |
| 735 | u32 base_addr; |
| 736 | u32 irqmask; |
| 737 | struct timer_list dma_timer; /* Timer used to catch unfinished DMAs */ |
| 738 | |
| 739 | struct vbi_info vbi; |
| 740 | |
| 741 | struct ivtv_mailbox_data enc_mbox; |
| 742 | struct ivtv_mailbox_data dec_mbox; |
| 743 | struct ivtv_api_cache api_cache[256]; /* Cached API Commands */ |
| 744 | |
| 745 | u8 card_rev; |
| 746 | volatile void __iomem *enc_mem, *dec_mem, *reg_mem; |
| 747 | |
| 748 | u32 pgm_info_offset; |
| 749 | u32 pgm_info_num; |
| 750 | u32 pgm_info_write_idx; |
| 751 | u32 pgm_info_read_idx; |
| 752 | struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; |
| 753 | |
| 754 | u64 mpg_data_received; |
| 755 | u64 vbi_data_inserted; |
| 756 | |
| 757 | wait_queue_head_t cap_w; |
| 758 | /* when the next decoder event arrives this queue is woken up */ |
| 759 | wait_queue_head_t event_waitq; |
| 760 | /* when the next decoder vsync arrives this queue is woken up */ |
| 761 | wait_queue_head_t vsync_waitq; |
| 762 | /* when the current DMA is finished this queue is woken up */ |
| 763 | wait_queue_head_t dma_waitq; |
| 764 | |
| 765 | /* OSD support */ |
| 766 | unsigned long osd_video_pbase; |
| 767 | int osd_global_alpha_state; /* 0=off : 1=on */ |
| 768 | int osd_local_alpha_state; /* 0=off : 1=on */ |
| 769 | int osd_color_key_state; /* 0=off : 1=on */ |
| 770 | u8 osd_global_alpha; /* Current global alpha */ |
| 771 | u32 osd_color_key; /* Current color key */ |
| 772 | u32 osd_pixelformat; /* Current pixel format */ |
| 773 | struct v4l2_rect osd_rect; /* Current OSD position and size */ |
| 774 | struct v4l2_rect main_rect; /* Current Main window position and size */ |
| 775 | |
| 776 | u32 last_dec_timing[3]; /* Store last retrieved pts/scr/frame values */ |
| 777 | |
| 778 | /* i2c */ |
| 779 | struct i2c_adapter i2c_adap; |
| 780 | struct i2c_algo_bit_data i2c_algo; |
| 781 | struct i2c_client i2c_client; |
| 782 | struct mutex i2c_bus_lock; |
| 783 | int i2c_state; |
| 784 | struct i2c_client *i2c_clients[I2C_CLIENTS_MAX]; |
| 785 | |
| 786 | /* v4l2 and User settings */ |
| 787 | |
| 788 | /* codec settings */ |
| 789 | struct cx2341x_mpeg_params params; |
| 790 | u32 audio_input; |
| 791 | u32 active_input; |
| 792 | u32 active_output; |
| 793 | v4l2_std_id std; |
| 794 | v4l2_std_id std_out; |
| 795 | v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */ |
| 796 | u8 audio_stereo_mode; |
| 797 | u8 audio_bilingual_mode; |
| 798 | |
| 799 | /* dualwatch */ |
| 800 | unsigned long dualwatch_jiffies; |
| 801 | u16 dualwatch_stereo_mode; |
| 802 | |
| 803 | /* Digitizer type */ |
| 804 | int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */ |
| 805 | |
| 806 | u32 lastVsyncFrame; |
| 807 | |
| 808 | struct yuv_playback_info yuv_info; |
| 809 | struct osd_info *osd_info; |
| 810 | }; |
| 811 | |
| 812 | /* Globals */ |
| 813 | extern struct ivtv *ivtv_cards[]; |
| 814 | extern int ivtv_cards_active; |
| 815 | extern int ivtv_first_minor; |
| 816 | extern spinlock_t ivtv_cards_lock; |
| 817 | |
| 818 | /*==============Prototypes==================*/ |
| 819 | |
| 820 | /* Hardware/IRQ */ |
| 821 | void ivtv_set_irq_mask(struct ivtv *itv, u32 mask); |
| 822 | void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask); |
| 823 | |
| 824 | /* try to set output mode, return current mode. */ |
| 825 | int ivtv_set_output_mode(struct ivtv *itv, int mode); |
| 826 | |
| 827 | /* return current output stream based on current mode */ |
| 828 | struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv); |
| 829 | |
| 830 | /* Return non-zero if a signal is pending */ |
| 831 | int ivtv_sleep_timeout(int timeout, int intr); |
| 832 | |
| 833 | /* Wait on queue, returns -EINTR if interrupted */ |
| 834 | int ivtv_waitq(wait_queue_head_t *waitq); |
| 835 | |
| 836 | /* Read Hauppauge eeprom */ |
| 837 | struct tveeprom; /* forward reference */ |
| 838 | void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv); |
| 839 | |
| 840 | /* This is a PCI post thing, where if the pci register is not read, then |
| 841 | the write doesn't always take effect right away. By reading back the |
| 842 | register any pending PCI writes will be performed (in order), and so |
| 843 | you can be sure that the writes are guaranteed to be done. |
| 844 | |
| 845 | Rarely needed, only in some timing sensitive cases. |
| 846 | Apparently if this is not done some motherboards seem |
| 847 | to kill the firmware and get into the broken state until computer is |
| 848 | rebooted. */ |
| 849 | #define write_sync(val, reg) \ |
| 850 | do { writel(val, reg); readl(reg); } while (0) |
| 851 | |
| 852 | #define read_reg(reg) readl(itv->reg_mem + (reg)) |
| 853 | #define write_reg(val, reg) writel(val, itv->reg_mem + (reg)) |
| 854 | #define write_reg_sync(val, reg) \ |
| 855 | do { write_reg(val, reg); read_reg(reg); } while (0) |
| 856 | |
| 857 | #define read_enc(addr) readl(itv->enc_mem + (u32)(addr)) |
| 858 | #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr)) |
| 859 | #define write_enc_sync(val, addr) \ |
| 860 | do { write_enc(val, addr); read_enc(addr); } while (0) |
| 861 | |
| 862 | #define read_dec(addr) readl(itv->dec_mem + (u32)(addr)) |
| 863 | #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr)) |
| 864 | #define write_dec_sync(val, addr) \ |
| 865 | do { write_dec(val, addr); read_dec(addr); } while (0) |
| 866 | |
| 867 | #endif /* IVTV_DRIVER_H */ |