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Peter Korsgaard238b8722006-12-06 20:35:17 -08001/*
2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
3 *
4 * Peter Korsgaard <jacmet@sunsite.dk>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/module.h>
13#include <linux/console.h>
14#include <linux/serial.h>
15#include <linux/serial_core.h>
16#include <linux/tty.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <asm/io.h>
20
Grant Likely00775822007-10-02 12:15:49 +100021#define ULITE_NAME "ttyUL"
Peter Korsgaard238b8722006-12-06 20:35:17 -080022#define ULITE_MAJOR 204
23#define ULITE_MINOR 187
24#define ULITE_NR_UARTS 4
25
Grant Likely435706b2007-10-02 12:15:59 +100026/* ---------------------------------------------------------------------
27 * Register definitions
28 *
29 * For register details see datasheet:
30 * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
31 */
32
Peter Korsgaard238b8722006-12-06 20:35:17 -080033#define ULITE_RX 0x00
34#define ULITE_TX 0x04
35#define ULITE_STATUS 0x08
36#define ULITE_CONTROL 0x0c
37
38#define ULITE_REGION 16
39
40#define ULITE_STATUS_RXVALID 0x01
41#define ULITE_STATUS_RXFULL 0x02
42#define ULITE_STATUS_TXEMPTY 0x04
43#define ULITE_STATUS_TXFULL 0x08
44#define ULITE_STATUS_IE 0x10
45#define ULITE_STATUS_OVERRUN 0x20
46#define ULITE_STATUS_FRAME 0x40
47#define ULITE_STATUS_PARITY 0x80
48
49#define ULITE_CONTROL_RST_TX 0x01
50#define ULITE_CONTROL_RST_RX 0x02
51#define ULITE_CONTROL_IE 0x10
52
53
Grant Likely483c79d2007-10-02 12:15:44 +100054static struct uart_port ulite_ports[ULITE_NR_UARTS];
Peter Korsgaard238b8722006-12-06 20:35:17 -080055
Grant Likely435706b2007-10-02 12:15:59 +100056/* ---------------------------------------------------------------------
57 * Core UART driver operations
58 */
59
Peter Korsgaard238b8722006-12-06 20:35:17 -080060static int ulite_receive(struct uart_port *port, int stat)
61{
62 struct tty_struct *tty = port->info->tty;
63 unsigned char ch = 0;
64 char flag = TTY_NORMAL;
65
66 if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
67 | ULITE_STATUS_FRAME)) == 0)
68 return 0;
69
70 /* stats */
71 if (stat & ULITE_STATUS_RXVALID) {
72 port->icount.rx++;
Grant Likelya15da8e2007-10-02 12:15:39 +100073 ch = in_be32((void*)port->membase + ULITE_RX);
Peter Korsgaard238b8722006-12-06 20:35:17 -080074
75 if (stat & ULITE_STATUS_PARITY)
76 port->icount.parity++;
77 }
78
79 if (stat & ULITE_STATUS_OVERRUN)
80 port->icount.overrun++;
81
82 if (stat & ULITE_STATUS_FRAME)
83 port->icount.frame++;
84
85
86 /* drop byte with parity error if IGNPAR specificed */
87 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
88 stat &= ~ULITE_STATUS_RXVALID;
89
90 stat &= port->read_status_mask;
91
92 if (stat & ULITE_STATUS_PARITY)
93 flag = TTY_PARITY;
94
95
96 stat &= ~port->ignore_status_mask;
97
98 if (stat & ULITE_STATUS_RXVALID)
99 tty_insert_flip_char(tty, ch, flag);
100
101 if (stat & ULITE_STATUS_FRAME)
102 tty_insert_flip_char(tty, 0, TTY_FRAME);
103
104 if (stat & ULITE_STATUS_OVERRUN)
105 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
106
107 return 1;
108}
109
110static int ulite_transmit(struct uart_port *port, int stat)
111{
112 struct circ_buf *xmit = &port->info->xmit;
113
114 if (stat & ULITE_STATUS_TXFULL)
115 return 0;
116
117 if (port->x_char) {
Grant Likelya15da8e2007-10-02 12:15:39 +1000118 out_be32((void*)port->membase + ULITE_TX, port->x_char);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800119 port->x_char = 0;
120 port->icount.tx++;
121 return 1;
122 }
123
124 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
125 return 0;
126
Grant Likelya15da8e2007-10-02 12:15:39 +1000127 out_be32((void*)port->membase + ULITE_TX, xmit->buf[xmit->tail]);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800128 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
129 port->icount.tx++;
130
131 /* wake up */
132 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
133 uart_write_wakeup(port);
134
135 return 1;
136}
137
138static irqreturn_t ulite_isr(int irq, void *dev_id)
139{
140 struct uart_port *port = (struct uart_port *)dev_id;
141 int busy;
142
143 do {
Grant Likelya15da8e2007-10-02 12:15:39 +1000144 int stat = in_be32((void*)port->membase + ULITE_STATUS);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800145 busy = ulite_receive(port, stat);
146 busy |= ulite_transmit(port, stat);
147 } while (busy);
148
149 tty_flip_buffer_push(port->info->tty);
150
151 return IRQ_HANDLED;
152}
153
154static unsigned int ulite_tx_empty(struct uart_port *port)
155{
156 unsigned long flags;
157 unsigned int ret;
158
159 spin_lock_irqsave(&port->lock, flags);
Grant Likelya15da8e2007-10-02 12:15:39 +1000160 ret = in_be32((void*)port->membase + ULITE_STATUS);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800161 spin_unlock_irqrestore(&port->lock, flags);
162
163 return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
164}
165
166static unsigned int ulite_get_mctrl(struct uart_port *port)
167{
168 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
169}
170
171static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
172{
173 /* N/A */
174}
175
176static void ulite_stop_tx(struct uart_port *port)
177{
178 /* N/A */
179}
180
181static void ulite_start_tx(struct uart_port *port)
182{
Grant Likelya15da8e2007-10-02 12:15:39 +1000183 ulite_transmit(port, in_be32((void*)port->membase + ULITE_STATUS));
Peter Korsgaard238b8722006-12-06 20:35:17 -0800184}
185
186static void ulite_stop_rx(struct uart_port *port)
187{
188 /* don't forward any more data (like !CREAD) */
189 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
190 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
191}
192
193static void ulite_enable_ms(struct uart_port *port)
194{
195 /* N/A */
196}
197
198static void ulite_break_ctl(struct uart_port *port, int ctl)
199{
200 /* N/A */
201}
202
203static int ulite_startup(struct uart_port *port)
204{
205 int ret;
206
207 ret = request_irq(port->irq, ulite_isr,
208 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
209 if (ret)
210 return ret;
211
Grant Likelya15da8e2007-10-02 12:15:39 +1000212 out_be32((void*)port->membase + ULITE_CONTROL,
213 ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
214 out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800215
216 return 0;
217}
218
219static void ulite_shutdown(struct uart_port *port)
220{
Grant Likelya15da8e2007-10-02 12:15:39 +1000221 out_be32((void*)port->membase + ULITE_CONTROL, 0);
222 in_be32((void*)port->membase + ULITE_CONTROL); /* dummy */
Peter Korsgaard238b8722006-12-06 20:35:17 -0800223 free_irq(port->irq, port);
224}
225
Alan Cox606d0992006-12-08 02:38:45 -0800226static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
227 struct ktermios *old)
Peter Korsgaard238b8722006-12-06 20:35:17 -0800228{
229 unsigned long flags;
230 unsigned int baud;
231
232 spin_lock_irqsave(&port->lock, flags);
233
234 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
235 | ULITE_STATUS_TXFULL;
236
237 if (termios->c_iflag & INPCK)
238 port->read_status_mask |=
239 ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
240
241 port->ignore_status_mask = 0;
242 if (termios->c_iflag & IGNPAR)
243 port->ignore_status_mask |= ULITE_STATUS_PARITY
244 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
245
246 /* ignore all characters if CREAD is not set */
247 if ((termios->c_cflag & CREAD) == 0)
248 port->ignore_status_mask |=
249 ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
250 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
251
252 /* update timeout */
253 baud = uart_get_baud_rate(port, termios, old, 0, 460800);
254 uart_update_timeout(port, termios->c_cflag, baud);
255
256 spin_unlock_irqrestore(&port->lock, flags);
257}
258
259static const char *ulite_type(struct uart_port *port)
260{
261 return port->type == PORT_UARTLITE ? "uartlite" : NULL;
262}
263
264static void ulite_release_port(struct uart_port *port)
265{
266 release_mem_region(port->mapbase, ULITE_REGION);
267 iounmap(port->membase);
Al Virob81831c2007-02-09 16:38:25 +0000268 port->membase = NULL;
Peter Korsgaard238b8722006-12-06 20:35:17 -0800269}
270
271static int ulite_request_port(struct uart_port *port)
272{
273 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
274 dev_err(port->dev, "Memory region busy\n");
275 return -EBUSY;
276 }
277
278 port->membase = ioremap(port->mapbase, ULITE_REGION);
279 if (!port->membase) {
280 dev_err(port->dev, "Unable to map registers\n");
281 release_mem_region(port->mapbase, ULITE_REGION);
282 return -EBUSY;
283 }
284
285 return 0;
286}
287
288static void ulite_config_port(struct uart_port *port, int flags)
289{
Peter Korsgaarde21654a2006-12-22 16:38:40 +0100290 if (!ulite_request_port(port))
291 port->type = PORT_UARTLITE;
Peter Korsgaard238b8722006-12-06 20:35:17 -0800292}
293
294static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
295{
296 /* we don't want the core code to modify any port params */
297 return -EINVAL;
298}
299
300static struct uart_ops ulite_ops = {
301 .tx_empty = ulite_tx_empty,
302 .set_mctrl = ulite_set_mctrl,
303 .get_mctrl = ulite_get_mctrl,
304 .stop_tx = ulite_stop_tx,
305 .start_tx = ulite_start_tx,
306 .stop_rx = ulite_stop_rx,
307 .enable_ms = ulite_enable_ms,
308 .break_ctl = ulite_break_ctl,
309 .startup = ulite_startup,
310 .shutdown = ulite_shutdown,
311 .set_termios = ulite_set_termios,
312 .type = ulite_type,
313 .release_port = ulite_release_port,
314 .request_port = ulite_request_port,
315 .config_port = ulite_config_port,
316 .verify_port = ulite_verify_port
317};
318
Grant Likely435706b2007-10-02 12:15:59 +1000319/* ---------------------------------------------------------------------
320 * Console driver operations
321 */
322
Peter Korsgaard238b8722006-12-06 20:35:17 -0800323#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
324static void ulite_console_wait_tx(struct uart_port *port)
325{
326 int i;
327
328 /* wait up to 10ms for the character(s) to be sent */
329 for (i = 0; i < 10000; i++) {
Grant Likelya15da8e2007-10-02 12:15:39 +1000330 if (in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY)
Peter Korsgaard238b8722006-12-06 20:35:17 -0800331 break;
332 udelay(1);
333 }
334}
335
336static void ulite_console_putchar(struct uart_port *port, int ch)
337{
338 ulite_console_wait_tx(port);
Grant Likelya15da8e2007-10-02 12:15:39 +1000339 out_be32((void*)port->membase + ULITE_TX, ch);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800340}
341
342static void ulite_console_write(struct console *co, const char *s,
343 unsigned int count)
344{
Grant Likely483c79d2007-10-02 12:15:44 +1000345 struct uart_port *port = &ulite_ports[co->index];
Peter Korsgaard238b8722006-12-06 20:35:17 -0800346 unsigned long flags;
347 unsigned int ier;
348 int locked = 1;
349
350 if (oops_in_progress) {
351 locked = spin_trylock_irqsave(&port->lock, flags);
352 } else
353 spin_lock_irqsave(&port->lock, flags);
354
355 /* save and disable interrupt */
Grant Likelya15da8e2007-10-02 12:15:39 +1000356 ier = in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
357 out_be32((void*)port->membase + ULITE_CONTROL, 0);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800358
359 uart_console_write(port, s, count, ulite_console_putchar);
360
361 ulite_console_wait_tx(port);
362
363 /* restore interrupt state */
364 if (ier)
Grant Likelya15da8e2007-10-02 12:15:39 +1000365 out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800366
367 if (locked)
368 spin_unlock_irqrestore(&port->lock, flags);
369}
370
371static int __init ulite_console_setup(struct console *co, char *options)
372{
373 struct uart_port *port;
374 int baud = 9600;
375 int bits = 8;
376 int parity = 'n';
377 int flow = 'n';
378
379 if (co->index < 0 || co->index >= ULITE_NR_UARTS)
380 return -EINVAL;
381
Grant Likely483c79d2007-10-02 12:15:44 +1000382 port = &ulite_ports[co->index];
Peter Korsgaard238b8722006-12-06 20:35:17 -0800383
384 /* not initialized yet? */
385 if (!port->membase)
386 return -ENODEV;
387
388 if (options)
389 uart_parse_options(options, &baud, &parity, &bits, &flow);
390
391 return uart_set_options(port, co, baud, parity, bits, flow);
392}
393
394static struct uart_driver ulite_uart_driver;
395
396static struct console ulite_console = {
Grant Likely00775822007-10-02 12:15:49 +1000397 .name = ULITE_NAME,
Peter Korsgaard238b8722006-12-06 20:35:17 -0800398 .write = ulite_console_write,
399 .device = uart_console_device,
400 .setup = ulite_console_setup,
401 .flags = CON_PRINTBUFFER,
402 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
403 .data = &ulite_uart_driver,
404};
405
406static int __init ulite_console_init(void)
407{
408 register_console(&ulite_console);
409 return 0;
410}
411
412console_initcall(ulite_console_init);
413
414#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
415
416static struct uart_driver ulite_uart_driver = {
417 .owner = THIS_MODULE,
418 .driver_name = "uartlite",
Grant Likely00775822007-10-02 12:15:49 +1000419 .dev_name = ULITE_NAME,
Peter Korsgaard238b8722006-12-06 20:35:17 -0800420 .major = ULITE_MAJOR,
421 .minor = ULITE_MINOR,
422 .nr = ULITE_NR_UARTS,
423#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
424 .cons = &ulite_console,
425#endif
426};
427
Grant Likely435706b2007-10-02 12:15:59 +1000428/* ---------------------------------------------------------------------
429 * Port assignment functions (mapping devices to uart_port structures)
430 */
431
432/** ulite_assign: register a uartlite device with the driver
433 *
434 * @dev: pointer to device structure
435 * @id: requested id number. Pass -1 for automatic port assignment
436 * @base: base address of uartlite registers
437 * @irq: irq number for uartlite
438 *
439 * Returns: 0 on success, <0 otherwise
440 */
Grant Likely8fa7b612007-10-02 12:15:54 +1000441static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
442{
443 struct uart_port *port;
444 int rc;
445
446 /* if id = -1; then scan for a free id and use that */
447 if (id < 0) {
448 for (id = 0; id < ULITE_NR_UARTS; id++)
449 if (ulite_ports[id].mapbase == 0)
450 break;
451 }
452 if (id < 0 || id >= ULITE_NR_UARTS) {
453 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
454 return -EINVAL;
455 }
456
457 if (ulite_ports[id].mapbase) {
458 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
459 ULITE_NAME, id);
460 return -EBUSY;
461 }
462
463 port = &ulite_ports[id];
464
465 spin_lock_init(&port->lock);
466 port->fifosize = 16;
467 port->regshift = 2;
468 port->iotype = UPIO_MEM;
469 port->iobase = 1; /* mark port in use */
470 port->mapbase = base;
471 port->membase = NULL;
472 port->ops = &ulite_ops;
473 port->irq = irq;
474 port->flags = UPF_BOOT_AUTOCONF;
475 port->dev = dev;
476 port->type = PORT_UNKNOWN;
477 port->line = id;
478
479 dev_set_drvdata(dev, port);
480
481 /* Register the port */
482 rc = uart_add_one_port(&ulite_uart_driver, port);
483 if (rc) {
484 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
485 port->mapbase = 0;
486 dev_set_drvdata(dev, NULL);
487 return rc;
488 }
489
490 return 0;
491}
492
Grant Likely435706b2007-10-02 12:15:59 +1000493/** ulite_release: register a uartlite device with the driver
494 *
495 * @dev: pointer to device structure
496 */
Grant Likely8fa7b612007-10-02 12:15:54 +1000497static int __devinit ulite_release(struct device *dev)
498{
499 struct uart_port *port = dev_get_drvdata(dev);
500 int rc = 0;
501
502 if (port) {
503 rc = uart_remove_one_port(&ulite_uart_driver, port);
504 dev_set_drvdata(dev, NULL);
505 port->mapbase = 0;
506 }
507
508 return rc;
509}
510
Grant Likely435706b2007-10-02 12:15:59 +1000511/* ---------------------------------------------------------------------
512 * Platform bus binding
513 */
514
Peter Korsgaard238b8722006-12-06 20:35:17 -0800515static int __devinit ulite_probe(struct platform_device *pdev)
516{
517 struct resource *res, *res2;
Peter Korsgaard238b8722006-12-06 20:35:17 -0800518
519 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
520 if (!res)
521 return -ENODEV;
522
523 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
524 if (!res2)
525 return -ENODEV;
526
Grant Likely8fa7b612007-10-02 12:15:54 +1000527 return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800528}
529
530static int ulite_remove(struct platform_device *pdev)
531{
Grant Likely8fa7b612007-10-02 12:15:54 +1000532 return ulite_release(&pdev->dev);
Peter Korsgaard238b8722006-12-06 20:35:17 -0800533}
534
535static struct platform_driver ulite_platform_driver = {
536 .probe = ulite_probe,
537 .remove = ulite_remove,
538 .driver = {
539 .owner = THIS_MODULE,
540 .name = "uartlite",
541 },
542};
543
Grant Likely435706b2007-10-02 12:15:59 +1000544/* ---------------------------------------------------------------------
545 * Module setup/teardown
546 */
547
Peter Korsgaard238b8722006-12-06 20:35:17 -0800548int __init ulite_init(void)
549{
550 int ret;
551
552 ret = uart_register_driver(&ulite_uart_driver);
553 if (ret)
554 return ret;
555
556 ret = platform_driver_register(&ulite_platform_driver);
557 if (ret)
558 uart_unregister_driver(&ulite_uart_driver);
559
560 return ret;
561}
562
563void __exit ulite_exit(void)
564{
565 platform_driver_unregister(&ulite_platform_driver);
566 uart_unregister_driver(&ulite_uart_driver);
567}
568
569module_init(ulite_init);
570module_exit(ulite_exit);
571
572MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
573MODULE_DESCRIPTION("Xilinx uartlite serial driver");
574MODULE_LICENSE("GPL");