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Luis R. Rodriguezd15dd3e2009-08-12 09:56:59 -07001/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef ATH_H
18#define ATH_H
19
20#include <linux/skbuff.h>
Luis R. Rodriguezbcd8f542009-09-09 22:43:17 -070021#include <linux/if_ether.h>
Luis R. Rodriguezb002a4a2009-09-13 00:03:27 -070022#include <net/mac80211.h>
Luis R. Rodriguezd15dd3e2009-08-12 09:56:59 -070023
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -080024/*
25 * The key cache is used for h/w cipher state and also for
26 * tracking station state such as the current tx antenna.
27 * We also setup a mapping table between key cache slot indices
28 * and station state to short-circuit node lookups on rx.
29 * Different parts have different size key caches. We handle
30 * up to ATH_KEYMAX entries (could dynamically allocate state).
31 */
32#define ATH_KEYMAX 128 /* max key cache size we handle */
33
Luis R. Rodriguez17753742009-09-09 22:19:26 -070034static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
35
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -080036struct ath_ani {
37 bool caldone;
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -080038 unsigned int longcal_timer;
39 unsigned int shortcal_timer;
40 unsigned int resetcal_timer;
41 unsigned int checkani_timer;
42 struct timer_list timer;
43};
44
Luis R. Rodriguez211f5852009-10-06 21:19:07 -040045enum ath_device_state {
46 ATH_HW_UNAVAILABLE,
47 ATH_HW_INITIALIZED,
48};
49
Sujith497ad9a2010-04-01 10:28:20 +053050enum ath_bus_type {
51 ATH_PCI,
52 ATH_AHB,
53 ATH_USB,
54};
55
Luis R. Rodriguez608b88c2009-08-17 18:07:23 -070056struct reg_dmn_pair_mapping {
57 u16 regDmnEnum;
58 u16 reg_5ghz_ctl;
59 u16 reg_2ghz_ctl;
60};
61
62struct ath_regulatory {
63 char alpha2[2];
64 u16 country_code;
65 u16 max_power_level;
66 u32 tp_scale;
67 u16 current_rd;
68 u16 current_rd_ext;
69 int16_t power_limit;
70 struct reg_dmn_pair_mapping *regpair;
71};
72
Bruno Randolf34a13052010-09-08 16:04:33 +090073enum ath_crypt_caps {
Bruno Randolfce2220d2010-09-17 11:36:25 +090074 ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0),
75 ATH_CRYPT_CAP_MIC_COMBINED = BIT(1),
Bruno Randolf34a13052010-09-08 16:04:33 +090076};
77
Bruno Randolf1bba5b72010-09-08 16:04:38 +090078struct ath_keyval {
79 u8 kv_type;
80 u8 kv_pad;
81 u16 kv_len;
82 u8 kv_val[16]; /* TK */
83 u8 kv_mic[8]; /* Michael MIC key */
84 u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
85 * supports both MIC keys in the same key cache entry;
86 * in that case, kv_mic is the RX key) */
87};
88
89enum ath_cipher {
90 ATH_CIPHER_WEP = 0,
91 ATH_CIPHER_AES_OCB = 1,
92 ATH_CIPHER_AES_CCM = 2,
93 ATH_CIPHER_CKIP = 3,
94 ATH_CIPHER_TKIP = 4,
95 ATH_CIPHER_CLR = 5,
96 ATH_CIPHER_MIC = 127
97};
98
Sujith50f56312010-04-16 11:53:50 +053099/**
100 * struct ath_ops - Register read/write operations
101 *
102 * @read: Register read
103 * @write: Register write
104 * @enable_write_buffer: Enable multiple register writes
Felix Fietkau435c1612010-10-05 12:03:42 +0200105 * @write_flush: flush buffered register writes and disable buffering
Sujith50f56312010-04-16 11:53:50 +0530106 */
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -0700107struct ath_ops {
108 unsigned int (*read)(void *, u32 reg_offset);
Sujith50f56312010-04-16 11:53:50 +0530109 void (*write)(void *, u32 val, u32 reg_offset);
110 void (*enable_write_buffer)(void *);
Sujith50f56312010-04-16 11:53:50 +0530111 void (*write_flush) (void *);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -0700112};
113
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -0700114struct ath_common;
115
116struct ath_bus_ops {
Sujith497ad9a2010-04-01 10:28:20 +0530117 enum ath_bus_type ath_bus_type;
118 void (*read_cachesize)(struct ath_common *common, int *csz);
119 bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
120 void (*bt_coex_prep)(struct ath_common *common);
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -0700121};
122
Luis R. Rodriguezd15dd3e2009-08-12 09:56:59 -0700123struct ath_common {
Luis R. Rodriguez13b81552009-09-10 17:52:45 -0700124 void *ah;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -0400125 void *priv;
Luis R. Rodriguezb002a4a2009-09-13 00:03:27 -0700126 struct ieee80211_hw *hw;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700127 int debug_mask;
Luis R. Rodriguez211f5852009-10-06 21:19:07 -0400128 enum ath_device_state state;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700129
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800130 struct ath_ani ani;
131
Luis R. Rodriguezd15dd3e2009-08-12 09:56:59 -0700132 u16 cachelsz;
Luis R. Rodriguez15107182009-09-10 09:22:37 -0700133 u16 curaid;
134 u8 macaddr[ETH_ALEN];
135 u8 curbssid[ETH_ALEN];
136 u8 bssidmask[ETH_ALEN];
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700137
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700138 u8 tx_chainmask;
139 u8 rx_chainmask;
140
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -0800141 u32 rx_bufsize;
142
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800143 u32 keymax;
144 DECLARE_BITMAP(keymap, ATH_KEYMAX);
Felix Fietkau56363dd2010-08-28 18:21:21 +0200145 DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX);
Bruno Randolf34a13052010-09-08 16:04:33 +0900146 enum ath_crypt_caps crypt_caps;
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800147
Luis R. Rodriguez608b88c2009-08-17 18:07:23 -0700148 struct ath_regulatory regulatory;
Luis R. Rodriguez9adca122009-09-10 18:04:47 -0700149 const struct ath_ops *ops;
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -0700150 const struct ath_bus_ops *bus_ops;
Luis R. Rodriguezd15dd3e2009-08-12 09:56:59 -0700151};
152
153struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
154 u32 len,
155 gfp_t gfp_mask);
156
Luis R. Rodriguez13b81552009-09-10 17:52:45 -0700157void ath_hw_setbssidmask(struct ath_common *common);
Bruno Randolf1bba5b72010-09-08 16:04:38 +0900158void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key);
159int ath_key_config(struct ath_common *common,
160 struct ieee80211_vif *vif,
161 struct ieee80211_sta *sta,
162 struct ieee80211_key_conf *key);
163bool ath_hw_keyreset(struct ath_common *common, u16 entry);
Luis R. Rodriguez13b81552009-09-10 17:52:45 -0700164
Luis R. Rodriguezd15dd3e2009-08-12 09:56:59 -0700165#endif /* ATH_H */