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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * DEC I/O ASIC interrupts.
3 *
4 * Copyright (c) 2002, 2003 Maciej W. Rozycki
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/types.h>
15
16#include <asm/dec/ioasic.h>
17#include <asm/dec/ioasic_addrs.h>
18#include <asm/dec/ioasic_ints.h>
19
Linus Torvalds1da177e2005-04-16 15:20:36 -070020static int ioasic_irq_base;
21
Thomas Gleixner009c2002011-03-23 21:08:51 +000022static void unmask_ioasic_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070023{
24 u32 simr;
25
26 simr = ioasic_read(IO_REG_SIMR);
Thomas Gleixner009c2002011-03-23 21:08:51 +000027 simr |= (1 << (d->irq - ioasic_irq_base));
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 ioasic_write(IO_REG_SIMR, simr);
29}
30
Thomas Gleixner009c2002011-03-23 21:08:51 +000031static void mask_ioasic_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070032{
33 u32 simr;
34
35 simr = ioasic_read(IO_REG_SIMR);
Thomas Gleixner009c2002011-03-23 21:08:51 +000036 simr &= ~(1 << (d->irq - ioasic_irq_base));
Linus Torvalds1da177e2005-04-16 15:20:36 -070037 ioasic_write(IO_REG_SIMR, simr);
38}
39
Thomas Gleixner009c2002011-03-23 21:08:51 +000040static void ack_ioasic_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070041{
Thomas Gleixner009c2002011-03-23 21:08:51 +000042 mask_ioasic_irq(d);
Linus Torvalds1da177e2005-04-16 15:20:36 -070043 fast_iob();
44}
45
Ralf Baechle94dee172006-07-02 14:41:42 +010046static struct irq_chip ioasic_irq_type = {
Atsushi Nemoto70d21cd2007-01-15 00:07:25 +090047 .name = "IO-ASIC",
Thomas Gleixner009c2002011-03-23 21:08:51 +000048 .irq_ack = ack_ioasic_irq,
49 .irq_mask = mask_ioasic_irq,
50 .irq_mask_ack = ack_ioasic_irq,
51 .irq_unmask = unmask_ioasic_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -070052};
53
Maciej W. Rozycki5359b932013-09-12 12:14:31 +010054void clear_ioasic_dma_irq(unsigned int irq)
55{
56 u32 sir;
57
58 sir = ~(1 << (irq - ioasic_irq_base));
59 ioasic_write(IO_REG_SIR, sir);
60}
61
Ralf Baechle94dee172006-07-02 14:41:42 +010062static struct irq_chip ioasic_dma_irq_type = {
Atsushi Nemoto70d21cd2007-01-15 00:07:25 +090063 .name = "IO-ASIC-DMA",
Thomas Gleixner009c2002011-03-23 21:08:51 +000064 .irq_ack = ack_ioasic_irq,
65 .irq_mask = mask_ioasic_irq,
66 .irq_mask_ack = ack_ioasic_irq,
67 .irq_unmask = unmask_ioasic_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -070068};
69
Linus Torvalds1da177e2005-04-16 15:20:36 -070070void __init init_ioasic_irqs(int base)
71{
72 int i;
73
74 /* Mask interrupts. */
75 ioasic_write(IO_REG_SIMR, 0);
76 fast_iob();
77
Atsushi Nemoto1603b5a2006-11-02 02:08:36 +090078 for (i = base; i < base + IO_INR_DMA; i++)
Thomas Gleixnere4ec7982011-03-27 15:19:28 +020079 irq_set_chip_and_handler(i, &ioasic_irq_type,
Atsushi Nemoto14178362006-11-14 01:13:18 +090080 handle_level_irq);
Atsushi Nemoto1603b5a2006-11-02 02:08:36 +090081 for (; i < base + IO_IRQ_LINES; i++)
Thomas Gleixnere4ec7982011-03-27 15:19:28 +020082 irq_set_chip(i, &ioasic_dma_irq_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
84 ioasic_irq_base = base;
85}