blob: 2f7c60c8e588609fba333d07c7857ab8adb4de09 [file] [log] [blame]
Will Deacon12a0ef72013-11-06 17:20:22 +00001lib-y := bitops.o clear_user.o delay.o copy_from_user.o \
2 copy_to_user.o copy_in_user.o copy_page.o \
3 clear_page.o memchr.o memcpy.o memmove.o memset.o \
zhichang.yuan0a42cb02014-04-28 13:11:34 +08004 memcmp.o strcmp.o strncmp.o strlen.o strnlen.o \
5 strchr.o strrchr.o
Will Deaconc0385b22015-02-03 12:39:03 +00006
Ard Biesheuvel5be8b702016-02-25 20:48:53 +01007# Tell the compiler to treat all general purpose registers (with the
8# exception of the IP registers, which are already handled by the caller
9# in case of a PLT) as callee-saved, which allows for efficient runtime
10# patching of the bl instruction in the caller with an atomic instruction
11# when supported by the CPU. Result and argument registers are handled
12# correctly, based on the function prototype.
Will Deaconc0385b22015-02-03 12:39:03 +000013lib-$(CONFIG_ARM64_LSE_ATOMICS) += atomic_ll_sc.o
Tri Vo5fa09db2018-09-19 12:27:50 -070014CFLAGS_atomic_ll_sc.o := -ffixed-x1 -ffixed-x2 \
Will Deaconc0385b22015-02-03 12:39:03 +000015 -ffixed-x3 -ffixed-x4 -ffixed-x5 -ffixed-x6 \
16 -ffixed-x7 -fcall-saved-x8 -fcall-saved-x9 \
17 -fcall-saved-x10 -fcall-saved-x11 -fcall-saved-x12 \
18 -fcall-saved-x13 -fcall-saved-x14 -fcall-saved-x15 \
Ard Biesheuvel5be8b702016-02-25 20:48:53 +010019 -fcall-saved-x18