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Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301/*
2 * drivers/ata/sata_dwc_460ex.c
3 *
4 * Synopsys DesignWare Cores (DWC) SATA host driver
5 *
6 * Author: Mark Miesfeld <mmiesfeld@amcc.com>
7 *
8 * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr@denx.de>
9 * Copyright 2008 DENX Software Engineering
10 *
11 * Based on versions provided by AMCC and Synopsys which are:
12 * Copyright 2006 Applied Micro Circuits Corporation
13 * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20
21#ifdef CONFIG_SATA_DWC_DEBUG
22#define DEBUG
23#endif
24
25#ifdef CONFIG_SATA_DWC_VDEBUG
26#define VERBOSE_DEBUG
27#define DEBUG_NCQ
28#endif
29
30#include <linux/kernel.h>
31#include <linux/module.h>
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053032#include <linux/device.h>
Mans Rullgard50b43372016-04-26 12:03:10 +030033#include <linux/dmaengine.h>
Rob Herringc11eede2013-11-10 23:19:08 -060034#include <linux/of_address.h>
35#include <linux/of_irq.h>
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053036#include <linux/of_platform.h>
37#include <linux/platform_device.h>
Mans Rullgard0f48deb2016-04-26 12:03:11 +030038#include <linux/phy/phy.h>
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053039#include <linux/libata.h>
40#include <linux/slab.h>
Andy Shevchenko8b344482015-03-03 22:41:21 +020041
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053042#include "libata.h"
43
44#include <scsi/scsi_host.h>
45#include <scsi/scsi_cmnd.h>
46
Sergei Shtylyovc2119622011-01-28 21:55:55 +030047/* These two are defined in "libata.h" */
48#undef DRV_NAME
49#undef DRV_VERSION
Jeff Garzik72d5f2d2012-12-14 09:43:39 -050050
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053051#define DRV_NAME "sata-dwc"
Sergei Shtylyov84b47e32011-01-28 22:01:01 +030052#define DRV_VERSION "1.3"
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053053
Mans Rullgardee81d6c2016-04-26 12:03:20 +030054#define sata_dwc_writel(a, v) writel_relaxed(v, a)
55#define sata_dwc_readl(a) readl_relaxed(a)
Andy Shevchenko84683a72015-01-07 15:24:21 +020056
57#ifndef NO_IRQ
58#define NO_IRQ 0
59#endif
60
Andy Shevchenko4ea8c202016-04-26 12:03:05 +030061#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length */
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053062
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053063enum {
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053064 SATA_DWC_MAX_PORTS = 1,
65
66 SATA_DWC_SCR_OFFSET = 0x24,
67 SATA_DWC_REG_OFFSET = 0x64,
68};
69
70/* DWC SATA Registers */
71struct sata_dwc_regs {
72 u32 fptagr; /* 1st party DMA tag */
73 u32 fpbor; /* 1st party DMA buffer offset */
74 u32 fptcr; /* 1st party DMA Xfr count */
75 u32 dmacr; /* DMA Control */
76 u32 dbtsr; /* DMA Burst Transac size */
77 u32 intpr; /* Interrupt Pending */
78 u32 intmr; /* Interrupt Mask */
79 u32 errmr; /* Error Mask */
80 u32 llcr; /* Link Layer Control */
81 u32 phycr; /* PHY Control */
82 u32 physr; /* PHY Status */
83 u32 rxbistpd; /* Recvd BIST pattern def register */
84 u32 rxbistpd1; /* Recvd BIST data dword1 */
85 u32 rxbistpd2; /* Recvd BIST pattern data dword2 */
86 u32 txbistpd; /* Trans BIST pattern def register */
87 u32 txbistpd1; /* Trans BIST data dword1 */
88 u32 txbistpd2; /* Trans BIST data dword2 */
89 u32 bistcr; /* BIST Control Register */
90 u32 bistfctr; /* BIST FIS Count Register */
91 u32 bistsr; /* BIST Status Register */
92 u32 bistdecr; /* BIST Dword Error count register */
93 u32 res[15]; /* Reserved locations */
94 u32 testr; /* Test Register */
95 u32 versionr; /* Version Register */
96 u32 idr; /* ID Register */
97 u32 unimpl[192]; /* Unimplemented */
Andy Shevchenkod6ecf0c2016-04-26 12:03:18 +030098 u32 dmadr[256]; /* FIFO Locations in DMA Mode */
Rupjyoti Sarmah62936002010-07-06 16:36:03 +053099};
100
101enum {
102 SCR_SCONTROL_DET_ENABLE = 0x00000001,
103 SCR_SSTATUS_DET_PRESENT = 0x00000001,
104 SCR_SERROR_DIAG_X = 0x04000000,
105/* DWC SATA Register Operations */
106 SATA_DWC_TXFIFO_DEPTH = 0x01FF,
107 SATA_DWC_RXFIFO_DEPTH = 0x01FF,
108 SATA_DWC_DMACR_TMOD_TXCHEN = 0x00000004,
109 SATA_DWC_DMACR_TXCHEN = (0x00000001 | SATA_DWC_DMACR_TMOD_TXCHEN),
110 SATA_DWC_DMACR_RXCHEN = (0x00000002 | SATA_DWC_DMACR_TMOD_TXCHEN),
111 SATA_DWC_DMACR_TXRXCH_CLEAR = SATA_DWC_DMACR_TMOD_TXCHEN,
112 SATA_DWC_INTPR_DMAT = 0x00000001,
113 SATA_DWC_INTPR_NEWFP = 0x00000002,
114 SATA_DWC_INTPR_PMABRT = 0x00000004,
115 SATA_DWC_INTPR_ERR = 0x00000008,
116 SATA_DWC_INTPR_NEWBIST = 0x00000010,
117 SATA_DWC_INTPR_IPF = 0x10000000,
118 SATA_DWC_INTMR_DMATM = 0x00000001,
119 SATA_DWC_INTMR_NEWFPM = 0x00000002,
120 SATA_DWC_INTMR_PMABRTM = 0x00000004,
121 SATA_DWC_INTMR_ERRM = 0x00000008,
122 SATA_DWC_INTMR_NEWBISTM = 0x00000010,
123 SATA_DWC_LLCR_SCRAMEN = 0x00000001,
124 SATA_DWC_LLCR_DESCRAMEN = 0x00000002,
125 SATA_DWC_LLCR_RPDEN = 0x00000004,
126/* This is all error bits, zero's are reserved fields. */
127 SATA_DWC_SERROR_ERR_BITS = 0x0FFF0F03
128};
129
130#define SATA_DWC_SCR0_SPD_GET(v) (((v) >> 4) & 0x0000000F)
131#define SATA_DWC_DMACR_TX_CLEAR(v) (((v) & ~SATA_DWC_DMACR_TXCHEN) |\
132 SATA_DWC_DMACR_TMOD_TXCHEN)
133#define SATA_DWC_DMACR_RX_CLEAR(v) (((v) & ~SATA_DWC_DMACR_RXCHEN) |\
134 SATA_DWC_DMACR_TMOD_TXCHEN)
135#define SATA_DWC_DBTSR_MWR(size) (((size)/4) & SATA_DWC_TXFIFO_DEPTH)
136#define SATA_DWC_DBTSR_MRD(size) ((((size)/4) & SATA_DWC_RXFIFO_DEPTH)\
137 << 16)
138struct sata_dwc_device {
139 struct device *dev; /* generic device struct */
140 struct ata_probe_ent *pe; /* ptr to probe-ent */
141 struct ata_host *host;
Mans Rullgardadc64ec2016-04-26 12:03:17 +0300142 struct sata_dwc_regs __iomem *sata_dwc_regs; /* DW SATA specific */
Mans Rullgard2d20da02016-04-26 12:03:12 +0300143 u32 sactive_issued;
144 u32 sactive_queued;
Mans Rullgard0f48deb2016-04-26 12:03:11 +0300145 struct phy *phy;
Andy Shevchenkod6ecf0c2016-04-26 12:03:18 +0300146 phys_addr_t dmadr;
Mans Rullgard50b43372016-04-26 12:03:10 +0300147#ifdef CONFIG_SATA_DWC_OLD_DMA
Andy Shevchenko8b344482015-03-03 22:41:21 +0200148 struct dw_dma_chip *dma;
Mans Rullgard50b43372016-04-26 12:03:10 +0300149#endif
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530150};
151
152#define SATA_DWC_QCMD_MAX 32
153
154struct sata_dwc_device_port {
155 struct sata_dwc_device *hsdev;
156 int cmd_issued[SATA_DWC_QCMD_MAX];
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530157 int dma_pending[SATA_DWC_QCMD_MAX];
Andy Shevchenko8b344482015-03-03 22:41:21 +0200158
159 /* DMA info */
Andy Shevchenko8b344482015-03-03 22:41:21 +0200160 struct dma_chan *chan;
161 struct dma_async_tx_descriptor *desc[SATA_DWC_QCMD_MAX];
162 u32 dma_interrupt_count;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530163};
164
165/*
Andy Shevchenko4bb41be2016-04-26 12:03:13 +0300166 * Commonly used DWC SATA driver macros
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530167 */
Andy Shevchenko4bb41be2016-04-26 12:03:13 +0300168#define HSDEV_FROM_HOST(host) ((struct sata_dwc_device *)(host)->private_data)
169#define HSDEV_FROM_AP(ap) ((struct sata_dwc_device *)(ap)->host->private_data)
170#define HSDEVP_FROM_AP(ap) ((struct sata_dwc_device_port *)(ap)->private_data)
171#define HSDEV_FROM_QC(qc) ((struct sata_dwc_device *)(qc)->ap->host->private_data)
172#define HSDEV_FROM_HSDEVP(p) ((struct sata_dwc_device *)(p)->hsdev)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530173
174enum {
175 SATA_DWC_CMD_ISSUED_NOT = 0,
176 SATA_DWC_CMD_ISSUED_PEND = 1,
177 SATA_DWC_CMD_ISSUED_EXEC = 2,
178 SATA_DWC_CMD_ISSUED_NODATA = 3,
179
180 SATA_DWC_DMA_PENDING_NONE = 0,
181 SATA_DWC_DMA_PENDING_TX = 1,
182 SATA_DWC_DMA_PENDING_RX = 2,
183};
184
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530185/*
186 * Prototypes
187 */
188static void sata_dwc_bmdma_start_by_tag(struct ata_queued_cmd *qc, u8 tag);
189static int sata_dwc_qc_complete(struct ata_port *ap, struct ata_queued_cmd *qc,
190 u32 check_status);
191static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32 check_status);
192static void sata_dwc_port_stop(struct ata_port *ap);
193static void sata_dwc_clear_dmacr(struct sata_dwc_device_port *hsdevp, u8 tag);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530194
Mans Rullgard50b43372016-04-26 12:03:10 +0300195#ifdef CONFIG_SATA_DWC_OLD_DMA
196
197#include <linux/platform_data/dma-dw.h>
198#include <linux/dma/dw.h>
199
200static struct dw_dma_slave sata_dwc_dma_dws = {
201 .src_id = 0,
202 .dst_id = 0,
203 .m_master = 1,
204 .p_master = 0,
205};
206
207static bool sata_dwc_dma_filter(struct dma_chan *chan, void *param)
208{
209 struct dw_dma_slave *dws = &sata_dwc_dma_dws;
210
211 if (dws->dma_dev != chan->device->dev)
212 return false;
213
214 chan->private = dws;
215 return true;
216}
217
218static int sata_dwc_dma_get_channel_old(struct sata_dwc_device_port *hsdevp)
219{
220 struct sata_dwc_device *hsdev = hsdevp->hsdev;
221 struct dw_dma_slave *dws = &sata_dwc_dma_dws;
222 dma_cap_mask_t mask;
223
224 dws->dma_dev = hsdev->dev;
225
226 dma_cap_zero(mask);
227 dma_cap_set(DMA_SLAVE, mask);
228
229 /* Acquire DMA channel */
230 hsdevp->chan = dma_request_channel(mask, sata_dwc_dma_filter, hsdevp);
231 if (!hsdevp->chan) {
232 dev_err(hsdev->dev, "%s: dma channel unavailable\n",
233 __func__);
234 return -EAGAIN;
235 }
236
237 return 0;
238}
239
240static int sata_dwc_dma_init_old(struct platform_device *pdev,
241 struct sata_dwc_device *hsdev)
242{
243 struct device_node *np = pdev->dev.of_node;
Andy Shevchenko73ec1b52016-04-26 12:03:22 +0300244 struct resource *res;
Mans Rullgard50b43372016-04-26 12:03:10 +0300245
246 hsdev->dma = devm_kzalloc(&pdev->dev, sizeof(*hsdev->dma), GFP_KERNEL);
247 if (!hsdev->dma)
248 return -ENOMEM;
249
250 hsdev->dma->dev = &pdev->dev;
251
252 /* Get SATA DMA interrupt number */
253 hsdev->dma->irq = irq_of_parse_and_map(np, 1);
254 if (hsdev->dma->irq == NO_IRQ) {
255 dev_err(&pdev->dev, "no SATA DMA irq\n");
256 return -ENODEV;
257 }
258
259 /* Get physical SATA DMA register base address */
Andy Shevchenko73ec1b52016-04-26 12:03:22 +0300260 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
261 hsdev->dma->regs = devm_ioremap_resource(&pdev->dev, res);
Wei Yongjun01c29202016-07-19 11:27:53 +0000262 if (IS_ERR(hsdev->dma->regs))
Andy Shevchenko73ec1b52016-04-26 12:03:22 +0300263 return PTR_ERR(hsdev->dma->regs);
Mans Rullgard50b43372016-04-26 12:03:10 +0300264
265 /* Initialize AHB DMAC */
Andy Shevchenko73ec1b52016-04-26 12:03:22 +0300266 return dw_dma_probe(hsdev->dma);
Mans Rullgard50b43372016-04-26 12:03:10 +0300267}
268
269static void sata_dwc_dma_exit_old(struct sata_dwc_device *hsdev)
270{
271 if (!hsdev->dma)
272 return;
273
274 dw_dma_remove(hsdev->dma);
Mans Rullgard50b43372016-04-26 12:03:10 +0300275}
276
277#endif
278
Sergei Shtylyov84b47e32011-01-28 22:01:01 +0300279static const char *get_prot_descript(u8 protocol)
280{
Christoph Hellwig37f92d72016-07-16 22:16:43 +0900281 switch (protocol) {
Sergei Shtylyov84b47e32011-01-28 22:01:01 +0300282 case ATA_PROT_NODATA:
283 return "ATA no data";
284 case ATA_PROT_PIO:
285 return "ATA PIO";
286 case ATA_PROT_DMA:
287 return "ATA DMA";
288 case ATA_PROT_NCQ:
289 return "ATA NCQ";
Hannes Reinecke5b844b62016-07-14 09:05:48 +0900290 case ATA_PROT_NCQ_NODATA:
291 return "ATA NCQ no data";
Sergei Shtylyov84b47e32011-01-28 22:01:01 +0300292 case ATAPI_PROT_NODATA:
293 return "ATAPI no data";
294 case ATAPI_PROT_PIO:
295 return "ATAPI PIO";
296 case ATAPI_PROT_DMA:
297 return "ATAPI DMA";
298 default:
299 return "unknown";
300 }
301}
302
303static const char *get_dma_dir_descript(int dma_dir)
304{
305 switch ((enum dma_data_direction)dma_dir) {
306 case DMA_BIDIRECTIONAL:
307 return "bidirectional";
308 case DMA_TO_DEVICE:
309 return "to device";
310 case DMA_FROM_DEVICE:
311 return "from device";
312 default:
313 return "none";
314 }
315}
316
Andy Shevchenkodb7a6572015-03-03 22:41:22 +0200317static void sata_dwc_tf_dump(struct ata_port *ap, struct ata_taskfile *tf)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530318{
Andy Shevchenkodb7a6572015-03-03 22:41:22 +0200319 dev_vdbg(ap->dev,
Andy Shevchenkod5785142015-03-03 21:21:58 +0200320 "taskfile cmd: 0x%02x protocol: %s flags: 0x%lx device: %x\n",
321 tf->command, get_prot_descript(tf->protocol), tf->flags,
322 tf->device);
Andy Shevchenkodb7a6572015-03-03 22:41:22 +0200323 dev_vdbg(ap->dev,
Andy Shevchenkod5785142015-03-03 21:21:58 +0200324 "feature: 0x%02x nsect: 0x%x lbal: 0x%x lbam: 0x%x lbah: 0x%x\n",
325 tf->feature, tf->nsect, tf->lbal, tf->lbam, tf->lbah);
Andy Shevchenkodb7a6572015-03-03 22:41:22 +0200326 dev_vdbg(ap->dev,
Andy Shevchenkod5785142015-03-03 21:21:58 +0200327 "hob_feature: 0x%02x hob_nsect: 0x%x hob_lbal: 0x%x hob_lbam: 0x%x hob_lbah: 0x%x\n",
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530328 tf->hob_feature, tf->hob_nsect, tf->hob_lbal, tf->hob_lbam,
329 tf->hob_lbah);
330}
331
Andy Shevchenko8b344482015-03-03 22:41:21 +0200332static void dma_dwc_xfer_done(void *hsdev_instance)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530333{
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530334 unsigned long flags;
Joe Perchesd5185d62014-03-26 09:34:49 -0700335 struct sata_dwc_device *hsdev = hsdev_instance;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530336 struct ata_host *host = (struct ata_host *)hsdev->host;
337 struct ata_port *ap;
338 struct sata_dwc_device_port *hsdevp;
339 u8 tag = 0;
340 unsigned int port = 0;
341
342 spin_lock_irqsave(&host->lock, flags);
343 ap = host->ports[port];
344 hsdevp = HSDEVP_FROM_AP(ap);
345 tag = ap->link.active_tag;
346
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530347 /*
Andy Shevchenko8b344482015-03-03 22:41:21 +0200348 * Each DMA command produces 2 interrupts. Only
349 * complete the command after both interrupts have been
350 * seen. (See sata_dwc_isr())
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530351 */
Andy Shevchenko8b344482015-03-03 22:41:21 +0200352 hsdevp->dma_interrupt_count++;
353 sata_dwc_clear_dmacr(hsdevp, tag);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530354
Andy Shevchenko8b344482015-03-03 22:41:21 +0200355 if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_NONE) {
356 dev_err(ap->dev, "DMA not pending tag=0x%02x pending=%d\n",
357 tag, hsdevp->dma_pending[tag]);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530358 }
359
Andy Shevchenko8b344482015-03-03 22:41:21 +0200360 if ((hsdevp->dma_interrupt_count % 2) == 0)
Dan Carpenter8d5fe8d2015-03-30 13:30:25 +0300361 sata_dwc_dma_xfer_complete(ap, 1);
Andy Shevchenko8b344482015-03-03 22:41:21 +0200362
363 spin_unlock_irqrestore(&host->lock, flags);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530364}
365
Andy Shevchenko8b344482015-03-03 22:41:21 +0200366static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd *qc)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530367{
Andy Shevchenko8b344482015-03-03 22:41:21 +0200368 struct ata_port *ap = qc->ap;
369 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
370 struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
Andy Shevchenko8b344482015-03-03 22:41:21 +0200371 struct dma_slave_config sconf;
372 struct dma_async_tx_descriptor *desc;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530373
Andy Shevchenko8b344482015-03-03 22:41:21 +0200374 if (qc->dma_dir == DMA_DEV_TO_MEM) {
Andy Shevchenkod6ecf0c2016-04-26 12:03:18 +0300375 sconf.src_addr = hsdev->dmadr;
Andy Shevchenko59a75ce2016-04-26 12:03:06 +0300376 sconf.device_fc = false;
Andy Shevchenko8b344482015-03-03 22:41:21 +0200377 } else { /* DMA_MEM_TO_DEV */
Andy Shevchenkod6ecf0c2016-04-26 12:03:18 +0300378 sconf.dst_addr = hsdev->dmadr;
Andy Shevchenko8b344482015-03-03 22:41:21 +0200379 sconf.device_fc = false;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530380 }
381
Andy Shevchenko8b344482015-03-03 22:41:21 +0200382 sconf.direction = qc->dma_dir;
Andy Shevchenko4ea8c202016-04-26 12:03:05 +0300383 sconf.src_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
384 sconf.dst_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
Andy Shevchenko8b344482015-03-03 22:41:21 +0200385 sconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
386 sconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
387
388 dmaengine_slave_config(hsdevp->chan, &sconf);
389
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530390 /* Convert SG list to linked list of items (LLIs) for AHB DMA */
Andy Shevchenko8b344482015-03-03 22:41:21 +0200391 desc = dmaengine_prep_slave_sg(hsdevp->chan, qc->sg, qc->n_elem,
392 qc->dma_dir,
393 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530394
Andy Shevchenko8b344482015-03-03 22:41:21 +0200395 if (!desc)
396 return NULL;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530397
Andy Shevchenko8b344482015-03-03 22:41:21 +0200398 desc->callback = dma_dwc_xfer_done;
399 desc->callback_param = hsdev;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530400
Andy Shevchenkod6ecf0c2016-04-26 12:03:18 +0300401 dev_dbg(hsdev->dev, "%s sg: 0x%p, count: %d addr: %pa\n", __func__,
402 qc->sg, qc->n_elem, &hsdev->dmadr);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530403
Andy Shevchenko8b344482015-03-03 22:41:21 +0200404 return desc;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530405}
406
407static int sata_dwc_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
408{
409 if (scr > SCR_NOTIFICATION) {
410 dev_err(link->ap->dev, "%s: Incorrect SCR offset 0x%02x\n",
411 __func__, scr);
412 return -EINVAL;
413 }
414
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300415 *val = sata_dwc_readl(link->ap->ioaddr.scr_addr + (scr * 4));
Andy Shevchenkobb08ab62016-04-26 12:03:23 +0300416 dev_dbg(link->ap->dev, "%s: id=%d reg=%d val=0x%08x\n", __func__,
417 link->ap->print_id, scr, *val);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530418
419 return 0;
420}
421
422static int sata_dwc_scr_write(struct ata_link *link, unsigned int scr, u32 val)
423{
Andy Shevchenkobb08ab62016-04-26 12:03:23 +0300424 dev_dbg(link->ap->dev, "%s: id=%d reg=%d val=0x%08x\n", __func__,
425 link->ap->print_id, scr, val);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530426 if (scr > SCR_NOTIFICATION) {
427 dev_err(link->ap->dev, "%s: Incorrect SCR offset 0x%02x\n",
428 __func__, scr);
429 return -EINVAL;
430 }
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300431 sata_dwc_writel(link->ap->ioaddr.scr_addr + (scr * 4), val);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530432
433 return 0;
434}
435
Mans Rullgard2d20da02016-04-26 12:03:12 +0300436static void clear_serror(struct ata_port *ap)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530437{
438 u32 val;
Mans Rullgard2d20da02016-04-26 12:03:12 +0300439 sata_dwc_scr_read(&ap->link, SCR_ERROR, &val);
440 sata_dwc_scr_write(&ap->link, SCR_ERROR, val);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530441}
442
443static void clear_interrupt_bit(struct sata_dwc_device *hsdev, u32 bit)
444{
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300445 sata_dwc_writel(&hsdev->sata_dwc_regs->intpr,
446 sata_dwc_readl(&hsdev->sata_dwc_regs->intpr));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530447}
448
449static u32 qcmd_tag_to_mask(u8 tag)
450{
451 return 0x00000001 << (tag & 0x1f);
452}
453
454/* See ahci.c */
455static void sata_dwc_error_intr(struct ata_port *ap,
456 struct sata_dwc_device *hsdev, uint intpr)
457{
458 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
459 struct ata_eh_info *ehi = &ap->link.eh_info;
460 unsigned int err_mask = 0, action = 0;
461 struct ata_queued_cmd *qc;
462 u32 serror;
463 u8 status, tag;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530464
465 ata_ehi_clear_desc(ehi);
466
Mans Rullgard2d20da02016-04-26 12:03:12 +0300467 sata_dwc_scr_read(&ap->link, SCR_ERROR, &serror);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530468 status = ap->ops->sff_check_status(ap);
469
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530470 tag = ap->link.active_tag;
471
Andy Shevchenko8b344482015-03-03 22:41:21 +0200472 dev_err(ap->dev,
473 "%s SCR_ERROR=0x%08x intpr=0x%08x status=0x%08x dma_intp=%d pending=%d issued=%d",
474 __func__, serror, intpr, status, hsdevp->dma_interrupt_count,
475 hsdevp->dma_pending[tag], hsdevp->cmd_issued[tag]);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530476
477 /* Clear error register and interrupt bit */
Mans Rullgard2d20da02016-04-26 12:03:12 +0300478 clear_serror(ap);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530479 clear_interrupt_bit(hsdev, SATA_DWC_INTPR_ERR);
480
481 /* This is the only error happening now. TODO check for exact error */
482
483 err_mask |= AC_ERR_HOST_BUS;
484 action |= ATA_EH_RESET;
485
486 /* Pass this on to EH */
487 ehi->serror |= serror;
488 ehi->action |= action;
489
490 qc = ata_qc_from_tag(ap, tag);
491 if (qc)
492 qc->err_mask |= err_mask;
493 else
494 ehi->err_mask |= err_mask;
495
496 ata_port_abort(ap);
497}
498
499/*
500 * Function : sata_dwc_isr
501 * arguments : irq, void *dev_instance, struct pt_regs *regs
502 * Return value : irqreturn_t - status of IRQ
503 * This Interrupt handler called via port ops registered function.
504 * .irq_handler = sata_dwc_isr
505 */
506static irqreturn_t sata_dwc_isr(int irq, void *dev_instance)
507{
508 struct ata_host *host = (struct ata_host *)dev_instance;
509 struct sata_dwc_device *hsdev = HSDEV_FROM_HOST(host);
510 struct ata_port *ap;
511 struct ata_queued_cmd *qc;
512 unsigned long flags;
513 u8 status, tag;
514 int handled, num_processed, port = 0;
515 uint intpr, sactive, sactive2, tag_mask;
516 struct sata_dwc_device_port *hsdevp;
Mans Rullgard2d20da02016-04-26 12:03:12 +0300517 hsdev->sactive_issued = 0;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530518
519 spin_lock_irqsave(&host->lock, flags);
520
521 /* Read the interrupt register */
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300522 intpr = sata_dwc_readl(&hsdev->sata_dwc_regs->intpr);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530523
524 ap = host->ports[port];
525 hsdevp = HSDEVP_FROM_AP(ap);
526
527 dev_dbg(ap->dev, "%s intpr=0x%08x active_tag=%d\n", __func__, intpr,
528 ap->link.active_tag);
529
530 /* Check for error interrupt */
531 if (intpr & SATA_DWC_INTPR_ERR) {
532 sata_dwc_error_intr(ap, hsdev, intpr);
533 handled = 1;
534 goto DONE;
535 }
536
537 /* Check for DMA SETUP FIS (FP DMA) interrupt */
538 if (intpr & SATA_DWC_INTPR_NEWFP) {
539 clear_interrupt_bit(hsdev, SATA_DWC_INTPR_NEWFP);
540
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300541 tag = (u8)(sata_dwc_readl(&hsdev->sata_dwc_regs->fptagr));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530542 dev_dbg(ap->dev, "%s: NEWFP tag=%d\n", __func__, tag);
543 if (hsdevp->cmd_issued[tag] != SATA_DWC_CMD_ISSUED_PEND)
544 dev_warn(ap->dev, "CMD tag=%d not pending?\n", tag);
545
Mans Rullgard2d20da02016-04-26 12:03:12 +0300546 hsdev->sactive_issued |= qcmd_tag_to_mask(tag);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530547
548 qc = ata_qc_from_tag(ap, tag);
549 /*
550 * Start FP DMA for NCQ command. At this point the tag is the
551 * active tag. It is the tag that matches the command about to
552 * be completed.
553 */
554 qc->ap->link.active_tag = tag;
555 sata_dwc_bmdma_start_by_tag(qc, tag);
556
557 handled = 1;
558 goto DONE;
559 }
Mans Rullgard2d20da02016-04-26 12:03:12 +0300560 sata_dwc_scr_read(&ap->link, SCR_ACTIVE, &sactive);
561 tag_mask = (hsdev->sactive_issued | sactive) ^ sactive;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530562
563 /* If no sactive issued and tag_mask is zero then this is not NCQ */
Mans Rullgard2d20da02016-04-26 12:03:12 +0300564 if (hsdev->sactive_issued == 0 && tag_mask == 0) {
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530565 if (ap->link.active_tag == ATA_TAG_POISON)
566 tag = 0;
567 else
568 tag = ap->link.active_tag;
569 qc = ata_qc_from_tag(ap, tag);
570
571 /* DEV interrupt w/ no active qc? */
572 if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) {
Andy Shevchenkod5785142015-03-03 21:21:58 +0200573 dev_err(ap->dev,
574 "%s interrupt with no active qc qc=%p\n",
575 __func__, qc);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530576 ap->ops->sff_check_status(ap);
577 handled = 1;
578 goto DONE;
579 }
580 status = ap->ops->sff_check_status(ap);
581
582 qc->ap->link.active_tag = tag;
583 hsdevp->cmd_issued[tag] = SATA_DWC_CMD_ISSUED_NOT;
584
585 if (status & ATA_ERR) {
586 dev_dbg(ap->dev, "interrupt ATA_ERR (0x%x)\n", status);
587 sata_dwc_qc_complete(ap, qc, 1);
588 handled = 1;
589 goto DONE;
590 }
591
592 dev_dbg(ap->dev, "%s non-NCQ cmd interrupt, protocol: %s\n",
Sergei Shtylyov84b47e32011-01-28 22:01:01 +0300593 __func__, get_prot_descript(qc->tf.protocol));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530594DRVSTILLBUSY:
595 if (ata_is_dma(qc->tf.protocol)) {
596 /*
597 * Each DMA transaction produces 2 interrupts. The DMAC
598 * transfer complete interrupt and the SATA controller
599 * operation done interrupt. The command should be
600 * completed only after both interrupts are seen.
601 */
Andy Shevchenko8b344482015-03-03 22:41:21 +0200602 hsdevp->dma_interrupt_count++;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530603 if (hsdevp->dma_pending[tag] == \
604 SATA_DWC_DMA_PENDING_NONE) {
Andy Shevchenkod5785142015-03-03 21:21:58 +0200605 dev_err(ap->dev,
606 "%s: DMA not pending intpr=0x%08x status=0x%08x pending=%d\n",
607 __func__, intpr, status,
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530608 hsdevp->dma_pending[tag]);
609 }
610
Andy Shevchenko8b344482015-03-03 22:41:21 +0200611 if ((hsdevp->dma_interrupt_count % 2) == 0)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530612 sata_dwc_dma_xfer_complete(ap, 1);
613 } else if (ata_is_pio(qc->tf.protocol)) {
614 ata_sff_hsm_move(ap, qc, status, 0);
615 handled = 1;
616 goto DONE;
617 } else {
618 if (unlikely(sata_dwc_qc_complete(ap, qc, 1)))
619 goto DRVSTILLBUSY;
620 }
621
622 handled = 1;
623 goto DONE;
624 }
625
626 /*
627 * This is a NCQ command. At this point we need to figure out for which
628 * tags we have gotten a completion interrupt. One interrupt may serve
629 * as completion for more than one operation when commands are queued
630 * (NCQ). We need to process each completed command.
631 */
632
633 /* process completed commands */
Mans Rullgard2d20da02016-04-26 12:03:12 +0300634 sata_dwc_scr_read(&ap->link, SCR_ACTIVE, &sactive);
635 tag_mask = (hsdev->sactive_issued | sactive) ^ sactive;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530636
Mans Rullgard2d20da02016-04-26 12:03:12 +0300637 if (sactive != 0 || hsdev->sactive_issued > 1 || tag_mask > 1) {
Andy Shevchenkod5785142015-03-03 21:21:58 +0200638 dev_dbg(ap->dev,
639 "%s NCQ:sactive=0x%08x sactive_issued=0x%08x tag_mask=0x%08x\n",
Mans Rullgard2d20da02016-04-26 12:03:12 +0300640 __func__, sactive, hsdev->sactive_issued, tag_mask);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530641 }
642
Mans Rullgard2d20da02016-04-26 12:03:12 +0300643 if ((tag_mask | hsdev->sactive_issued) != hsdev->sactive_issued) {
Andy Shevchenkod5785142015-03-03 21:21:58 +0200644 dev_warn(ap->dev,
Mans Rullgard2d20da02016-04-26 12:03:12 +0300645 "Bad tag mask? sactive=0x%08x sactive_issued=0x%08x tag_mask=0x%08x\n",
646 sactive, hsdev->sactive_issued, tag_mask);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530647 }
648
649 /* read just to clear ... not bad if currently still busy */
650 status = ap->ops->sff_check_status(ap);
651 dev_dbg(ap->dev, "%s ATA status register=0x%x\n", __func__, status);
652
653 tag = 0;
654 num_processed = 0;
655 while (tag_mask) {
656 num_processed++;
657 while (!(tag_mask & 0x00000001)) {
658 tag++;
659 tag_mask <<= 1;
660 }
661
662 tag_mask &= (~0x00000001);
663 qc = ata_qc_from_tag(ap, tag);
664
665 /* To be picked up by completion functions */
666 qc->ap->link.active_tag = tag;
667 hsdevp->cmd_issued[tag] = SATA_DWC_CMD_ISSUED_NOT;
668
669 /* Let libata/scsi layers handle error */
670 if (status & ATA_ERR) {
671 dev_dbg(ap->dev, "%s ATA_ERR (0x%x)\n", __func__,
672 status);
673 sata_dwc_qc_complete(ap, qc, 1);
674 handled = 1;
675 goto DONE;
676 }
677
678 /* Process completed command */
679 dev_dbg(ap->dev, "%s NCQ command, protocol: %s\n", __func__,
Sergei Shtylyov84b47e32011-01-28 22:01:01 +0300680 get_prot_descript(qc->tf.protocol));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530681 if (ata_is_dma(qc->tf.protocol)) {
Andy Shevchenko8b344482015-03-03 22:41:21 +0200682 hsdevp->dma_interrupt_count++;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530683 if (hsdevp->dma_pending[tag] == \
684 SATA_DWC_DMA_PENDING_NONE)
685 dev_warn(ap->dev, "%s: DMA not pending?\n",
686 __func__);
Andy Shevchenko8b344482015-03-03 22:41:21 +0200687 if ((hsdevp->dma_interrupt_count % 2) == 0)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530688 sata_dwc_dma_xfer_complete(ap, 1);
689 } else {
690 if (unlikely(sata_dwc_qc_complete(ap, qc, 1)))
691 goto STILLBUSY;
692 }
693 continue;
694
695STILLBUSY:
696 ap->stats.idle_irq++;
697 dev_warn(ap->dev, "STILL BUSY IRQ ata%d: irq trap\n",
698 ap->print_id);
699 } /* while tag_mask */
700
701 /*
702 * Check to see if any commands completed while we were processing our
703 * initial set of completed commands (read status clears interrupts,
704 * so we might miss a completed command interrupt if one came in while
705 * we were processing --we read status as part of processing a completed
706 * command).
707 */
Mans Rullgard2d20da02016-04-26 12:03:12 +0300708 sata_dwc_scr_read(&ap->link, SCR_ACTIVE, &sactive2);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530709 if (sactive2 != sactive) {
Andy Shevchenkod5785142015-03-03 21:21:58 +0200710 dev_dbg(ap->dev,
711 "More completed - sactive=0x%x sactive2=0x%x\n",
712 sactive, sactive2);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530713 }
714 handled = 1;
715
716DONE:
717 spin_unlock_irqrestore(&host->lock, flags);
718 return IRQ_RETVAL(handled);
719}
720
721static void sata_dwc_clear_dmacr(struct sata_dwc_device_port *hsdevp, u8 tag)
722{
723 struct sata_dwc_device *hsdev = HSDEV_FROM_HSDEVP(hsdevp);
Mans Rullgardaf50f3a2016-04-26 12:03:21 +0300724 u32 dmacr = sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530725
726 if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_RX) {
Mans Rullgardaf50f3a2016-04-26 12:03:21 +0300727 dmacr = SATA_DWC_DMACR_RX_CLEAR(dmacr);
728 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530729 } else if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_TX) {
Mans Rullgardaf50f3a2016-04-26 12:03:21 +0300730 dmacr = SATA_DWC_DMACR_TX_CLEAR(dmacr);
731 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530732 } else {
733 /*
734 * This should not happen, it indicates the driver is out of
735 * sync. If it does happen, clear dmacr anyway.
736 */
Andy Shevchenkodb7a6572015-03-03 22:41:22 +0200737 dev_err(hsdev->dev,
Andy Shevchenkod5785142015-03-03 21:21:58 +0200738 "%s DMA protocol RX and TX DMA not pending tag=0x%02x pending=%d dmacr: 0x%08x\n",
Mans Rullgardaf50f3a2016-04-26 12:03:21 +0300739 __func__, tag, hsdevp->dma_pending[tag], dmacr);
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300740 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr,
741 SATA_DWC_DMACR_TXRXCH_CLEAR);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530742 }
743}
744
745static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32 check_status)
746{
747 struct ata_queued_cmd *qc;
748 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
749 struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
750 u8 tag = 0;
751
752 tag = ap->link.active_tag;
753 qc = ata_qc_from_tag(ap, tag);
754 if (!qc) {
755 dev_err(ap->dev, "failed to get qc");
756 return;
757 }
758
759#ifdef DEBUG_NCQ
760 if (tag > 0) {
Andy Shevchenkod5785142015-03-03 21:21:58 +0200761 dev_info(ap->dev,
762 "%s tag=%u cmd=0x%02x dma dir=%s proto=%s dmacr=0x%08x\n",
763 __func__, qc->tag, qc->tf.command,
Sergei Shtylyov84b47e32011-01-28 22:01:01 +0300764 get_dma_dir_descript(qc->dma_dir),
765 get_prot_descript(qc->tf.protocol),
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300766 sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530767 }
768#endif
769
770 if (ata_is_dma(qc->tf.protocol)) {
771 if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_NONE) {
Andy Shevchenkod5785142015-03-03 21:21:58 +0200772 dev_err(ap->dev,
773 "%s DMA protocol RX and TX DMA not pending dmacr: 0x%08x\n",
774 __func__,
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300775 sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530776 }
777
778 hsdevp->dma_pending[tag] = SATA_DWC_DMA_PENDING_NONE;
779 sata_dwc_qc_complete(ap, qc, check_status);
780 ap->link.active_tag = ATA_TAG_POISON;
781 } else {
782 sata_dwc_qc_complete(ap, qc, check_status);
783 }
784}
785
786static int sata_dwc_qc_complete(struct ata_port *ap, struct ata_queued_cmd *qc,
787 u32 check_status)
788{
789 u8 status = 0;
790 u32 mask = 0x0;
791 u8 tag = qc->tag;
Mans Rullgard2d20da02016-04-26 12:03:12 +0300792 struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530793 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
Mans Rullgard2d20da02016-04-26 12:03:12 +0300794 hsdev->sactive_queued = 0;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530795 dev_dbg(ap->dev, "%s checkstatus? %x\n", __func__, check_status);
796
797 if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_TX)
798 dev_err(ap->dev, "TX DMA PENDING\n");
799 else if (hsdevp->dma_pending[tag] == SATA_DWC_DMA_PENDING_RX)
800 dev_err(ap->dev, "RX DMA PENDING\n");
Andy Shevchenkod5785142015-03-03 21:21:58 +0200801 dev_dbg(ap->dev,
802 "QC complete cmd=0x%02x status=0x%02x ata%u: protocol=%d\n",
803 qc->tf.command, status, ap->print_id, qc->tf.protocol);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530804
805 /* clear active bit */
806 mask = (~(qcmd_tag_to_mask(tag)));
Mans Rullgard2d20da02016-04-26 12:03:12 +0300807 hsdev->sactive_queued = hsdev->sactive_queued & mask;
808 hsdev->sactive_issued = hsdev->sactive_issued & mask;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530809 ata_qc_complete(qc);
810 return 0;
811}
812
813static void sata_dwc_enable_interrupts(struct sata_dwc_device *hsdev)
814{
815 /* Enable selective interrupts by setting the interrupt maskregister*/
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300816 sata_dwc_writel(&hsdev->sata_dwc_regs->intmr,
817 SATA_DWC_INTMR_ERRM |
818 SATA_DWC_INTMR_NEWFPM |
819 SATA_DWC_INTMR_PMABRTM |
820 SATA_DWC_INTMR_DMATM);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530821 /*
822 * Unmask the error bits that should trigger an error interrupt by
823 * setting the error mask register.
824 */
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300825 sata_dwc_writel(&hsdev->sata_dwc_regs->errmr, SATA_DWC_SERROR_ERR_BITS);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530826
Andy Shevchenkodb7a6572015-03-03 22:41:22 +0200827 dev_dbg(hsdev->dev, "%s: INTMR = 0x%08x, ERRMR = 0x%08x\n",
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300828 __func__, sata_dwc_readl(&hsdev->sata_dwc_regs->intmr),
829 sata_dwc_readl(&hsdev->sata_dwc_regs->errmr));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530830}
831
Mans Rullgardae95d952016-04-26 12:03:15 +0300832static void sata_dwc_setup_port(struct ata_ioports *port, void __iomem *base)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530833{
Mans Rullgardae95d952016-04-26 12:03:15 +0300834 port->cmd_addr = base + 0x00;
835 port->data_addr = base + 0x00;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530836
Mans Rullgardae95d952016-04-26 12:03:15 +0300837 port->error_addr = base + 0x04;
838 port->feature_addr = base + 0x04;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530839
Mans Rullgardae95d952016-04-26 12:03:15 +0300840 port->nsect_addr = base + 0x08;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530841
Mans Rullgardae95d952016-04-26 12:03:15 +0300842 port->lbal_addr = base + 0x0c;
843 port->lbam_addr = base + 0x10;
844 port->lbah_addr = base + 0x14;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530845
Mans Rullgardae95d952016-04-26 12:03:15 +0300846 port->device_addr = base + 0x18;
847 port->command_addr = base + 0x1c;
848 port->status_addr = base + 0x1c;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530849
Mans Rullgardae95d952016-04-26 12:03:15 +0300850 port->altstatus_addr = base + 0x20;
851 port->ctl_addr = base + 0x20;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530852}
853
Mans Rullgard50b43372016-04-26 12:03:10 +0300854static int sata_dwc_dma_get_channel(struct sata_dwc_device_port *hsdevp)
855{
856 struct sata_dwc_device *hsdev = hsdevp->hsdev;
857 struct device *dev = hsdev->dev;
858
859#ifdef CONFIG_SATA_DWC_OLD_DMA
860 if (!of_find_property(dev->of_node, "dmas", NULL))
861 return sata_dwc_dma_get_channel_old(hsdevp);
862#endif
863
864 hsdevp->chan = dma_request_chan(dev, "sata-dma");
865 if (IS_ERR(hsdevp->chan)) {
866 dev_err(dev, "failed to allocate dma channel: %ld\n",
867 PTR_ERR(hsdevp->chan));
868 return PTR_ERR(hsdevp->chan);
869 }
870
871 return 0;
872}
873
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530874/*
875 * Function : sata_dwc_port_start
876 * arguments : struct ata_ioports *port
877 * Return value : returns 0 if success, error code otherwise
878 * This function allocates the scatter gather LLI table for AHB DMA
879 */
880static int sata_dwc_port_start(struct ata_port *ap)
881{
882 int err = 0;
883 struct sata_dwc_device *hsdev;
884 struct sata_dwc_device_port *hsdevp = NULL;
885 struct device *pdev;
886 int i;
887
888 hsdev = HSDEV_FROM_AP(ap);
889
890 dev_dbg(ap->dev, "%s: port_no=%d\n", __func__, ap->port_no);
891
892 hsdev->host = ap->host;
893 pdev = ap->host->dev;
894 if (!pdev) {
895 dev_err(ap->dev, "%s: no ap->host->dev\n", __func__);
896 err = -ENODEV;
897 goto CLEANUP;
898 }
899
900 /* Allocate Port Struct */
901 hsdevp = kzalloc(sizeof(*hsdevp), GFP_KERNEL);
902 if (!hsdevp) {
903 dev_err(ap->dev, "%s: kmalloc failed for hsdevp\n", __func__);
904 err = -ENOMEM;
905 goto CLEANUP;
906 }
907 hsdevp->hsdev = hsdev;
908
Mans Rullgard50b43372016-04-26 12:03:10 +0300909 err = sata_dwc_dma_get_channel(hsdevp);
910 if (err)
Andy Shevchenko8b344482015-03-03 22:41:21 +0200911 goto CLEANUP_ALLOC;
Andy Shevchenko8b344482015-03-03 22:41:21 +0200912
Mans Rullgard0f48deb2016-04-26 12:03:11 +0300913 err = phy_power_on(hsdev->phy);
914 if (err)
915 goto CLEANUP_ALLOC;
916
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530917 for (i = 0; i < SATA_DWC_QCMD_MAX; i++)
918 hsdevp->cmd_issued[i] = SATA_DWC_CMD_ISSUED_NOT;
919
Andy Shevchenkod7c256e2015-01-07 15:24:22 +0200920 ap->bmdma_prd = NULL; /* set these so libata doesn't use them */
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530921 ap->bmdma_prd_dma = 0;
922
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530923 if (ap->port_no == 0) {
924 dev_dbg(ap->dev, "%s: clearing TXCHEN, RXCHEN in DMAC\n",
925 __func__);
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300926 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr,
927 SATA_DWC_DMACR_TXRXCH_CLEAR);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530928
929 dev_dbg(ap->dev, "%s: setting burst size in DBTSR\n",
930 __func__);
Mans Rullgardee81d6c2016-04-26 12:03:20 +0300931 sata_dwc_writel(&hsdev->sata_dwc_regs->dbtsr,
932 (SATA_DWC_DBTSR_MWR(AHB_DMA_BRST_DFLT) |
933 SATA_DWC_DBTSR_MRD(AHB_DMA_BRST_DFLT)));
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530934 }
935
936 /* Clear any error bits before libata starts issuing commands */
Mans Rullgard2d20da02016-04-26 12:03:12 +0300937 clear_serror(ap);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530938 ap->private_data = hsdevp;
Julia Lawalla081da62011-08-08 13:17:57 +0200939 dev_dbg(ap->dev, "%s: done\n", __func__);
940 return 0;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530941
Julia Lawalla081da62011-08-08 13:17:57 +0200942CLEANUP_ALLOC:
943 kfree(hsdevp);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530944CLEANUP:
Julia Lawalla081da62011-08-08 13:17:57 +0200945 dev_dbg(ap->dev, "%s: fail. ap->id = %d\n", __func__, ap->print_id);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530946 return err;
947}
948
949static void sata_dwc_port_stop(struct ata_port *ap)
950{
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530951 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
Mans Rullgard0f48deb2016-04-26 12:03:11 +0300952 struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530953
954 dev_dbg(ap->dev, "%s: ap->id = %d\n", __func__, ap->print_id);
955
Andy Shevchenko9e8b8552016-04-26 12:03:19 +0300956 dmaengine_terminate_sync(hsdevp->chan);
Andy Shevchenko8b344482015-03-03 22:41:21 +0200957 dma_release_channel(hsdevp->chan);
Mans Rullgard0f48deb2016-04-26 12:03:11 +0300958 phy_power_off(hsdev->phy);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530959
Andy Shevchenko8b344482015-03-03 22:41:21 +0200960 kfree(hsdevp);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530961 ap->private_data = NULL;
962}
963
964/*
965 * Function : sata_dwc_exec_command_by_tag
966 * arguments : ata_port *ap, ata_taskfile *tf, u8 tag, u32 cmd_issued
967 * Return value : None
968 * This function keeps track of individual command tag ids and calls
969 * ata_exec_command in libata
970 */
971static void sata_dwc_exec_command_by_tag(struct ata_port *ap,
972 struct ata_taskfile *tf,
973 u8 tag, u32 cmd_issued)
974{
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530975 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
976
977 dev_dbg(ap->dev, "%s cmd(0x%02x): %s tag=%d\n", __func__, tf->command,
Sergei Shtylyovc2119622011-01-28 21:55:55 +0300978 ata_get_cmd_descript(tf->command), tag);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530979
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530980 hsdevp->cmd_issued[tag] = cmd_issued;
Mans Rullgard55e610c2016-04-26 12:03:02 +0300981
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530982 /*
983 * Clear SError before executing a new command.
984 * sata_dwc_scr_write and read can not be used here. Clearing the PM
985 * managed SError register for the disk needs to be done before the
986 * task file is loaded.
987 */
Mans Rullgard2d20da02016-04-26 12:03:12 +0300988 clear_serror(ap);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +0530989 ata_sff_exec_command(ap, tf);
990}
991
992static void sata_dwc_bmdma_setup_by_tag(struct ata_queued_cmd *qc, u8 tag)
993{
994 sata_dwc_exec_command_by_tag(qc->ap, &qc->tf, tag,
995 SATA_DWC_CMD_ISSUED_PEND);
996}
997
998static void sata_dwc_bmdma_setup(struct ata_queued_cmd *qc)
999{
1000 u8 tag = qc->tag;
1001
1002 if (ata_is_ncq(qc->tf.protocol)) {
1003 dev_dbg(qc->ap->dev, "%s: ap->link.sactive=0x%08x tag=%d\n",
1004 __func__, qc->ap->link.sactive, tag);
1005 } else {
1006 tag = 0;
1007 }
1008 sata_dwc_bmdma_setup_by_tag(qc, tag);
1009}
1010
1011static void sata_dwc_bmdma_start_by_tag(struct ata_queued_cmd *qc, u8 tag)
1012{
1013 int start_dma;
Andy Shevchenko8b344482015-03-03 22:41:21 +02001014 u32 reg;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301015 struct sata_dwc_device *hsdev = HSDEV_FROM_QC(qc);
1016 struct ata_port *ap = qc->ap;
1017 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
Andy Shevchenko8b344482015-03-03 22:41:21 +02001018 struct dma_async_tx_descriptor *desc = hsdevp->desc[tag];
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301019 int dir = qc->dma_dir;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301020
1021 if (hsdevp->cmd_issued[tag] != SATA_DWC_CMD_ISSUED_NOT) {
1022 start_dma = 1;
1023 if (dir == DMA_TO_DEVICE)
1024 hsdevp->dma_pending[tag] = SATA_DWC_DMA_PENDING_TX;
1025 else
1026 hsdevp->dma_pending[tag] = SATA_DWC_DMA_PENDING_RX;
1027 } else {
Andy Shevchenkod5785142015-03-03 21:21:58 +02001028 dev_err(ap->dev,
1029 "%s: Command not pending cmd_issued=%d (tag=%d) DMA NOT started\n",
1030 __func__, hsdevp->cmd_issued[tag], tag);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301031 start_dma = 0;
1032 }
1033
Andy Shevchenkod5785142015-03-03 21:21:58 +02001034 dev_dbg(ap->dev,
1035 "%s qc=%p tag: %x cmd: 0x%02x dma_dir: %s start_dma? %x\n",
1036 __func__, qc, tag, qc->tf.command,
Sergei Shtylyov84b47e32011-01-28 22:01:01 +03001037 get_dma_dir_descript(qc->dma_dir), start_dma);
Andy Shevchenkodb7a6572015-03-03 22:41:22 +02001038 sata_dwc_tf_dump(ap, &qc->tf);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301039
1040 if (start_dma) {
Mans Rullgard2d20da02016-04-26 12:03:12 +03001041 sata_dwc_scr_read(&ap->link, SCR_ERROR, &reg);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301042 if (reg & SATA_DWC_SERROR_ERR_BITS) {
1043 dev_err(ap->dev, "%s: ****** SError=0x%08x ******\n",
1044 __func__, reg);
1045 }
1046
1047 if (dir == DMA_TO_DEVICE)
Mans Rullgardee81d6c2016-04-26 12:03:20 +03001048 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr,
1049 SATA_DWC_DMACR_TXCHEN);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301050 else
Mans Rullgardee81d6c2016-04-26 12:03:20 +03001051 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr,
1052 SATA_DWC_DMACR_RXCHEN);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301053
1054 /* Enable AHB DMA transfer on the specified channel */
Andy Shevchenko8b344482015-03-03 22:41:21 +02001055 dmaengine_submit(desc);
1056 dma_async_issue_pending(hsdevp->chan);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301057 }
1058}
1059
1060static void sata_dwc_bmdma_start(struct ata_queued_cmd *qc)
1061{
1062 u8 tag = qc->tag;
1063
1064 if (ata_is_ncq(qc->tf.protocol)) {
1065 dev_dbg(qc->ap->dev, "%s: ap->link.sactive=0x%08x tag=%d\n",
1066 __func__, qc->ap->link.sactive, tag);
1067 } else {
1068 tag = 0;
1069 }
1070 dev_dbg(qc->ap->dev, "%s\n", __func__);
1071 sata_dwc_bmdma_start_by_tag(qc, tag);
1072}
1073
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301074static unsigned int sata_dwc_qc_issue(struct ata_queued_cmd *qc)
1075{
1076 u32 sactive;
1077 u8 tag = qc->tag;
1078 struct ata_port *ap = qc->ap;
Mans Rullgardae4c3482016-04-26 12:03:08 +03001079 struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301080
1081#ifdef DEBUG_NCQ
1082 if (qc->tag > 0 || ap->link.sactive > 1)
Andy Shevchenkod5785142015-03-03 21:21:58 +02001083 dev_info(ap->dev,
1084 "%s ap id=%d cmd(0x%02x)=%s qc tag=%d prot=%s ap active_tag=0x%08x ap sactive=0x%08x\n",
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301085 __func__, ap->print_id, qc->tf.command,
Sergei Shtylyovc2119622011-01-28 21:55:55 +03001086 ata_get_cmd_descript(qc->tf.command),
Sergei Shtylyov84b47e32011-01-28 22:01:01 +03001087 qc->tag, get_prot_descript(qc->tf.protocol),
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301088 ap->link.active_tag, ap->link.sactive);
1089#endif
1090
1091 if (!ata_is_ncq(qc->tf.protocol))
1092 tag = 0;
Mans Rullgardae4c3482016-04-26 12:03:08 +03001093
1094 if (ata_is_dma(qc->tf.protocol)) {
1095 hsdevp->desc[tag] = dma_dwc_xfer_setup(qc);
1096 if (!hsdevp->desc[tag])
1097 return AC_ERR_SYSTEM;
1098 } else {
1099 hsdevp->desc[tag] = NULL;
1100 }
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301101
1102 if (ata_is_ncq(qc->tf.protocol)) {
Mans Rullgard2d20da02016-04-26 12:03:12 +03001103 sata_dwc_scr_read(&ap->link, SCR_ACTIVE, &sactive);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301104 sactive |= (0x00000001 << tag);
Mans Rullgard2d20da02016-04-26 12:03:12 +03001105 sata_dwc_scr_write(&ap->link, SCR_ACTIVE, sactive);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301106
Andy Shevchenkod5785142015-03-03 21:21:58 +02001107 dev_dbg(qc->ap->dev,
1108 "%s: tag=%d ap->link.sactive = 0x%08x sactive=0x%08x\n",
1109 __func__, tag, qc->ap->link.sactive, sactive);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301110
1111 ap->ops->sff_tf_load(ap, &qc->tf);
Andy Shevchenko077028e2016-04-26 12:03:09 +03001112 sata_dwc_exec_command_by_tag(ap, &qc->tf, tag,
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301113 SATA_DWC_CMD_ISSUED_PEND);
1114 } else {
Andy Shevchenko077028e2016-04-26 12:03:09 +03001115 return ata_bmdma_qc_issue(qc);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301116 }
1117 return 0;
1118}
1119
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301120static void sata_dwc_error_handler(struct ata_port *ap)
1121{
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301122 ata_sff_error_handler(ap);
1123}
1124
Andy Shevchenkod7c256e2015-01-07 15:24:22 +02001125static int sata_dwc_hardreset(struct ata_link *link, unsigned int *class,
1126 unsigned long deadline)
Thang Q. Nguyen3a8b7882012-04-17 15:43:13 +07001127{
1128 struct sata_dwc_device *hsdev = HSDEV_FROM_AP(link->ap);
1129 int ret;
1130
1131 ret = sata_sff_hardreset(link, class, deadline);
1132
1133 sata_dwc_enable_interrupts(hsdev);
1134
1135 /* Reconfigure the DMA control register */
Mans Rullgardee81d6c2016-04-26 12:03:20 +03001136 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr,
1137 SATA_DWC_DMACR_TXRXCH_CLEAR);
Thang Q. Nguyen3a8b7882012-04-17 15:43:13 +07001138
1139 /* Reconfigure the DMA Burst Transaction Size register */
Mans Rullgardee81d6c2016-04-26 12:03:20 +03001140 sata_dwc_writel(&hsdev->sata_dwc_regs->dbtsr,
1141 SATA_DWC_DBTSR_MWR(AHB_DMA_BRST_DFLT) |
1142 SATA_DWC_DBTSR_MRD(AHB_DMA_BRST_DFLT));
Thang Q. Nguyen3a8b7882012-04-17 15:43:13 +07001143
1144 return ret;
1145}
1146
Christian Lampartera7e6de52016-04-26 12:03:03 +03001147static void sata_dwc_dev_select(struct ata_port *ap, unsigned int device)
1148{
1149 /* SATA DWC is master only */
1150}
1151
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301152/*
1153 * scsi mid-layer and libata interface structures
1154 */
1155static struct scsi_host_template sata_dwc_sht = {
1156 ATA_NCQ_SHT(DRV_NAME),
1157 /*
1158 * test-only: Currently this driver doesn't handle NCQ
1159 * correctly. We enable NCQ but set the queue depth to a
1160 * max of 1. This will get fixed in in a future release.
1161 */
1162 .sg_tablesize = LIBATA_MAX_PRD,
Andy Shevchenkod7c256e2015-01-07 15:24:22 +02001163 /* .can_queue = ATA_MAX_QUEUE, */
Andy Shevchenko6689dfa2016-04-26 12:03:04 +03001164 /*
1165 * Make sure a LLI block is not created that will span 8K max FIS
1166 * boundary. If the block spans such a FIS boundary, there is a chance
1167 * that a DMA burst will cross that boundary -- this results in an
1168 * error in the host controller.
1169 */
1170 .dma_boundary = 0x1fff /* ATA_DMA_BOUNDARY */,
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301171};
1172
1173static struct ata_port_operations sata_dwc_ops = {
1174 .inherits = &ata_sff_port_ops,
1175
1176 .error_handler = sata_dwc_error_handler,
Thang Q. Nguyen3a8b7882012-04-17 15:43:13 +07001177 .hardreset = sata_dwc_hardreset,
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301178
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301179 .qc_issue = sata_dwc_qc_issue,
1180
1181 .scr_read = sata_dwc_scr_read,
1182 .scr_write = sata_dwc_scr_write,
1183
1184 .port_start = sata_dwc_port_start,
1185 .port_stop = sata_dwc_port_stop,
1186
Christian Lampartera7e6de52016-04-26 12:03:03 +03001187 .sff_dev_select = sata_dwc_dev_select,
1188
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301189 .bmdma_setup = sata_dwc_bmdma_setup,
1190 .bmdma_start = sata_dwc_bmdma_start,
1191};
1192
1193static const struct ata_port_info sata_dwc_port_info[] = {
1194 {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +03001195 .flags = ATA_FLAG_SATA | ATA_FLAG_NCQ,
Sergei Shtylyovb83a4c32011-01-25 19:27:35 +03001196 .pio_mask = ATA_PIO4,
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301197 .udma_mask = ATA_UDMA6,
1198 .port_ops = &sata_dwc_ops,
1199 },
1200};
1201
Grant Likely1c48a5c2011-02-17 02:43:24 -07001202static int sata_dwc_probe(struct platform_device *ofdev)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301203{
1204 struct sata_dwc_device *hsdev;
1205 u32 idr, versionr;
1206 char *ver = (char *)&versionr;
Mans Rullgard175553e2016-04-26 12:03:16 +03001207 void __iomem *base;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301208 int err = 0;
Andy Shevchenko4aaa7182015-01-07 15:24:19 +02001209 int irq;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301210 struct ata_host *host;
1211 struct ata_port_info pi = sata_dwc_port_info[0];
1212 const struct ata_port_info *ppi[] = { &pi, NULL };
Thang Q. Nguyendc7f71f2012-05-10 11:17:10 +07001213 struct device_node *np = ofdev->dev.of_node;
Andy Shevchenko73ec1b52016-04-26 12:03:22 +03001214 struct resource *res;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301215
1216 /* Allocate DWC SATA device */
Andy Shevchenkod537fc02015-01-08 12:50:14 +02001217 host = ata_host_alloc_pinfo(&ofdev->dev, ppi, SATA_DWC_MAX_PORTS);
1218 hsdev = devm_kzalloc(&ofdev->dev, sizeof(*hsdev), GFP_KERNEL);
1219 if (!host || !hsdev)
Andy Shevchenkoc592b742015-01-08 12:50:13 +02001220 return -ENOMEM;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301221
Andy Shevchenkod537fc02015-01-08 12:50:14 +02001222 host->private_data = hsdev;
1223
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301224 /* Ioremap SATA registers */
Andy Shevchenko73ec1b52016-04-26 12:03:22 +03001225 res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
1226 base = devm_ioremap_resource(&ofdev->dev, res);
Wei Yongjun01c29202016-07-19 11:27:53 +00001227 if (IS_ERR(base))
Andy Shevchenko73ec1b52016-04-26 12:03:22 +03001228 return PTR_ERR(base);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301229 dev_dbg(&ofdev->dev, "ioremap done for SATA register address\n");
1230
1231 /* Synopsys DWC SATA specific Registers */
Mans Rullgard175553e2016-04-26 12:03:16 +03001232 hsdev->sata_dwc_regs = base + SATA_DWC_REG_OFFSET;
Andy Shevchenkod6ecf0c2016-04-26 12:03:18 +03001233 hsdev->dmadr = res->start + SATA_DWC_REG_OFFSET + offsetof(struct sata_dwc_regs, dmadr);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301234
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301235 /* Setup port */
1236 host->ports[0]->ioaddr.cmd_addr = base;
1237 host->ports[0]->ioaddr.scr_addr = base + SATA_DWC_SCR_OFFSET;
Mans Rullgardae95d952016-04-26 12:03:15 +03001238 sata_dwc_setup_port(&host->ports[0]->ioaddr, base);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301239
1240 /* Read the ID and Version Registers */
Mans Rullgardee81d6c2016-04-26 12:03:20 +03001241 idr = sata_dwc_readl(&hsdev->sata_dwc_regs->idr);
1242 versionr = sata_dwc_readl(&hsdev->sata_dwc_regs->versionr);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301243 dev_notice(&ofdev->dev, "id %d, controller version %c.%c%c\n",
1244 idr, ver[0], ver[1], ver[2]);
1245
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301246 /* Save dev for later use in dev_xxx() routines */
Andy Shevchenkodb7a6572015-03-03 22:41:22 +02001247 hsdev->dev = &ofdev->dev;
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301248
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301249 /* Enable SATA Interrupts */
1250 sata_dwc_enable_interrupts(hsdev);
1251
1252 /* Get SATA interrupt number */
Andy Shevchenko90379082015-01-08 12:50:12 +02001253 irq = irq_of_parse_and_map(np, 0);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301254 if (irq == NO_IRQ) {
1255 dev_err(&ofdev->dev, "no SATA DMA irq\n");
1256 err = -ENODEV;
1257 goto error_out;
1258 }
1259
Mans Rullgard50b43372016-04-26 12:03:10 +03001260#ifdef CONFIG_SATA_DWC_OLD_DMA
1261 if (!of_find_property(np, "dmas", NULL)) {
1262 err = sata_dwc_dma_init_old(ofdev, hsdev);
1263 if (err)
1264 goto error_out;
1265 }
1266#endif
1267
Mans Rullgard0f48deb2016-04-26 12:03:11 +03001268 hsdev->phy = devm_phy_optional_get(hsdev->dev, "sata-phy");
1269 if (IS_ERR(hsdev->phy)) {
1270 err = PTR_ERR(hsdev->phy);
1271 hsdev->phy = NULL;
1272 goto error_out;
1273 }
1274
1275 err = phy_init(hsdev->phy);
1276 if (err)
1277 goto error_out;
1278
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301279 /*
1280 * Now, register with libATA core, this will also initiate the
1281 * device discovery process, invoking our port_start() handler &
1282 * error_handler() to execute a dummy Softreset EH session
1283 */
Andy Shevchenko4aaa7182015-01-07 15:24:19 +02001284 err = ata_host_activate(host, irq, sata_dwc_isr, 0, &sata_dwc_sht);
1285 if (err)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301286 dev_err(&ofdev->dev, "failed to activate host");
1287
1288 dev_set_drvdata(&ofdev->dev, host);
1289 return 0;
1290
1291error_out:
Mans Rullgard0f48deb2016-04-26 12:03:11 +03001292 phy_exit(hsdev->phy);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301293 return err;
1294}
1295
Stephen Rothwell60652d02010-08-16 12:20:59 +10001296static int sata_dwc_remove(struct platform_device *ofdev)
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301297{
1298 struct device *dev = &ofdev->dev;
1299 struct ata_host *host = dev_get_drvdata(dev);
1300 struct sata_dwc_device *hsdev = host->private_data;
1301
1302 ata_host_detach(host);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301303
Mans Rullgard0f48deb2016-04-26 12:03:11 +03001304 phy_exit(hsdev->phy);
1305
Mans Rullgard50b43372016-04-26 12:03:10 +03001306#ifdef CONFIG_SATA_DWC_OLD_DMA
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301307 /* Free SATA DMA resources */
Mans Rullgard50b43372016-04-26 12:03:10 +03001308 sata_dwc_dma_exit_old(hsdev);
1309#endif
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301310
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301311 dev_dbg(&ofdev->dev, "done\n");
1312 return 0;
1313}
1314
1315static const struct of_device_id sata_dwc_match[] = {
1316 { .compatible = "amcc,sata-460ex", },
1317 {}
1318};
1319MODULE_DEVICE_TABLE(of, sata_dwc_match);
1320
Grant Likely1c48a5c2011-02-17 02:43:24 -07001321static struct platform_driver sata_dwc_driver = {
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301322 .driver = {
1323 .name = DRV_NAME,
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301324 .of_match_table = sata_dwc_match,
1325 },
1326 .probe = sata_dwc_probe,
1327 .remove = sata_dwc_remove,
1328};
1329
Axel Lin99c8ea32011-11-27 14:44:26 +08001330module_platform_driver(sata_dwc_driver);
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301331
1332MODULE_LICENSE("GPL");
1333MODULE_AUTHOR("Mark Miesfeld <mmiesfeld@amcc.com>");
Andy Shevchenkod5785142015-03-03 21:21:58 +02001334MODULE_DESCRIPTION("DesignWare Cores SATA controller low level driver");
Rupjyoti Sarmah62936002010-07-06 16:36:03 +05301335MODULE_VERSION(DRV_VERSION);