blob: 596a75924d90210b092d93904c54521d1e903279 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Generic Generic NCR5380 driver
3 *
4 * Copyright 1993, Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * drew@colorado.edu
8 * +1 (303) 440-4894
9 *
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
12 *
13 * NCR53C400A extensions (c) 1996, Ingmar Baumgart
14 * ingmar@gonzo.schwaben.de
15 *
16 * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
17 * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
18 *
19 * Added ISAPNP support for DTC436 adapters,
20 * Thomas Sailer, sailer@ife.ee.ethz.ch
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 *
Finn Thain9c41ab22016-03-23 21:10:28 +110022 * See Documentation/scsi/g_NCR5380.txt for more info.
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 */
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/blkdev.h>
Finn Thain161c0052016-01-03 16:05:46 +110027#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <scsi/scsi_host.h>
29#include "g_NCR5380.h"
30#include "NCR5380.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <linux/init.h>
32#include <linux/ioport.h>
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020033#include <linux/isa.h>
34#include <linux/pnp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <linux/interrupt.h>
36
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020037#define MAX_CARDS 8
38
39/* old-style parameters for compatibility */
Finn Thainc0965e62016-01-03 16:05:05 +110040static int ncr_irq;
Finn Thainc0965e62016-01-03 16:05:05 +110041static int ncr_addr;
42static int ncr_5380;
43static int ncr_53c400;
44static int ncr_53c400a;
45static int dtc_3181e;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110046static int hp_c2502;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020047module_param(ncr_irq, int, 0);
48module_param(ncr_addr, int, 0);
49module_param(ncr_5380, int, 0);
50module_param(ncr_53c400, int, 0);
51module_param(ncr_53c400a, int, 0);
52module_param(dtc_3181e, int, 0);
53module_param(hp_c2502, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020055static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
56module_param_array(irq, int, NULL, 0);
57MODULE_PARM_DESC(irq, "IRQ number(s)");
58
59static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
60module_param_array(base, int, NULL, 0);
61MODULE_PARM_DESC(base, "base address(es)");
62
63static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
64module_param_array(card, int, NULL, 0);
65MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
66
67MODULE_LICENSE("GPL");
Linus Torvalds1da177e2005-04-16 15:20:36 -070068
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110069#ifndef SCSI_G_NCR5380_MEM
70/*
71 * Configure I/O address of 53C400A or DTC436 by writing magic numbers
72 * to ports 0x779 and 0x379.
73 */
74static void magic_configure(int idx, u8 irq, u8 magic[])
75{
76 u8 cfg = 0;
77
78 outb(magic[0], 0x779);
79 outb(magic[1], 0x379);
80 outb(magic[2], 0x379);
81 outb(magic[3], 0x379);
82 outb(magic[4], 0x379);
83
84 /* allowed IRQs for HP C2502 */
85 if (irq != 2 && irq != 3 && irq != 4 && irq != 5 && irq != 7)
86 irq = 0;
87 if (idx >= 0 && idx <= 7)
88 cfg = 0x80 | idx | (irq << 4);
89 outb(cfg, 0x379);
90}
91#endif
92
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020093static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
94 struct device *pdev, int base, int irq, int board)
Linus Torvalds1da177e2005-04-16 15:20:36 -070095{
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 unsigned int *ports;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110097 u8 *magic = NULL;
Ondrej Zary702a98c2010-08-10 18:01:16 -070098#ifndef SCSI_G_NCR5380_MEM
99 int i;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100100 int port_idx = -1;
Finn Thain9d376402016-03-23 21:10:10 +1100101 unsigned long region_size;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700102#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200103 static unsigned int ncr_53c400a_ports[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
105 };
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200106 static unsigned int dtc_3181e_ports[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
108 };
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200109 static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100110 0x59, 0xb9, 0xc5, 0xae, 0xa6
111 };
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200112 static u8 hp_c2502_magic[] = { /* HP C2502 */
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100113 0x0f, 0x22, 0xf0, 0x20, 0x80
114 };
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200115 int flags, ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 struct Scsi_Host *instance;
Ondrej Zary12150792016-01-03 16:06:15 +1100117 struct NCR5380_hostdata *hostdata;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700118#ifdef SCSI_G_NCR5380_MEM
Al Viroc818cb62006-03-24 03:15:37 -0800119 void __iomem *iomem;
Finn Thain9d376402016-03-23 21:10:10 +1100120 resource_size_t iomem_size;
Al Viroc818cb62006-03-24 03:15:37 -0800121#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200123 ports = NULL;
124 flags = 0;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200125 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200126 case BOARD_NCR5380:
127 flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
128 break;
129 case BOARD_NCR53C400A:
130 ports = ncr_53c400a_ports;
131 magic = ncr_53c400a_magic;
132 break;
133 case BOARD_HP_C2502:
134 ports = ncr_53c400a_ports;
135 magic = hp_c2502_magic;
136 break;
137 case BOARD_DTC3181E:
138 ports = dtc_3181e_ports;
139 magic = ncr_53c400a_magic;
140 break;
141 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142
Ondrej Zary702a98c2010-08-10 18:01:16 -0700143#ifndef SCSI_G_NCR5380_MEM
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200144 if (ports && magic) {
145 /* wakeup sequence for the NCR53C400A and DTC3181E */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200147 /* Disable the adapter and look for a free io port */
148 magic_configure(-1, 0, magic);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200150 region_size = 16;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200151 if (base)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200152 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200153 if (base == ports[i]) { /* index found */
154 if (!request_region(ports[i],
155 region_size,
156 "ncr53c80"))
157 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200158 break;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200159 }
160 }
161 else
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200162 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200163 if (!request_region(ports[i], region_size,
164 "ncr53c80"))
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200165 continue;
166 if (inb(ports[i]) == 0xff)
167 break;
168 release_region(ports[i], region_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200170 if (ports[i]) {
171 /* At this point we have our region reserved */
172 magic_configure(i, 0, magic); /* no IRQ yet */
Ondrej Zary5157e982016-11-11 10:00:20 +1100173 base = ports[i];
174 outb(0xc0, base + 9);
175 if (inb(base + 9) != 0x80) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200176 ret = -ENODEV;
177 goto out_release;
178 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200179 port_idx = i;
180 } else
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200181 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200183 else
184 {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200185 /* NCR5380 - no configuration, just grab */
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200186 region_size = 8;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200187 if (!base || !request_region(base, region_size, "ncr5380"))
188 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200189 }
190#else
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200191 iomem_size = NCR53C400_region_size;
192 if (!request_mem_region(base, iomem_size, "ncr5380"))
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200193 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200194 iomem = ioremap(base, iomem_size);
195 if (!iomem) {
196 release_mem_region(base, iomem_size);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200197 return -ENOMEM;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200198 }
199#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200200 instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
201 if (instance == NULL) {
202 ret = -ENOMEM;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200203 goto out_release;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200204 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200205 hostdata = shost_priv(instance);
206
207#ifndef SCSI_G_NCR5380_MEM
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200208 instance->io_port = base;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200209 instance->n_io_port = region_size;
210 hostdata->io_width = 1; /* 8-bit PDMA by default */
211
212 /*
213 * On NCR53C400 boards, NCR5380 registers are mapped 8 past
214 * the base address.
215 */
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200216 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200217 case BOARD_NCR53C400:
218 instance->io_port += 8;
219 hostdata->c400_ctl_status = 0;
220 hostdata->c400_blk_cnt = 1;
221 hostdata->c400_host_buf = 4;
222 break;
223 case BOARD_DTC3181E:
224 hostdata->io_width = 2; /* 16-bit PDMA */
225 /* fall through */
226 case BOARD_NCR53C400A:
227 case BOARD_HP_C2502:
228 hostdata->c400_ctl_status = 9;
229 hostdata->c400_blk_cnt = 10;
230 hostdata->c400_host_buf = 8;
231 break;
232 }
233#else
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200234 instance->base = base;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200235 hostdata->iomem = iomem;
236 hostdata->iomem_size = iomem_size;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200237 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200238 case BOARD_NCR53C400:
239 hostdata->c400_ctl_status = 0x100;
240 hostdata->c400_blk_cnt = 0x101;
241 hostdata->c400_host_buf = 0x104;
242 break;
243 case BOARD_DTC3181E:
244 case BOARD_NCR53C400A:
245 case BOARD_HP_C2502:
246 pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200247 ret = -EINVAL;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200248 goto out_unregister;
249 }
250#endif
251
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200252 ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
253 if (ret)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200254 goto out_unregister;
255
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200256 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200257 case BOARD_NCR53C400:
258 case BOARD_DTC3181E:
259 case BOARD_NCR53C400A:
260 case BOARD_HP_C2502:
261 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
262 }
263
264 NCR5380_maybe_reset_bus(instance);
265
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200266 if (irq != IRQ_AUTO)
267 instance->irq = irq;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200268 else
269 instance->irq = NCR5380_probe_irq(instance, 0xffff);
270
271 /* Compatibility with documented NCR5380 kernel parameters */
272 if (instance->irq == 255)
273 instance->irq = NO_IRQ;
274
275 if (instance->irq != NO_IRQ) {
276#ifndef SCSI_G_NCR5380_MEM
277 /* set IRQ for HP C2502 */
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200278 if (board == BOARD_HP_C2502)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200279 magic_configure(port_idx, instance->irq, magic);
280#endif
281 if (request_irq(instance->irq, generic_NCR5380_intr,
282 0, "NCR5380", instance)) {
283 printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
284 instance->irq = NO_IRQ;
285 }
286 }
287
288 if (instance->irq == NO_IRQ) {
289 printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
290 printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
291 }
292
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200293 ret = scsi_add_host(instance, pdev);
294 if (ret)
295 goto out_free_irq;
296 scsi_scan_host(instance);
297 dev_set_drvdata(pdev, instance);
298 return 0;
Finn Thain0ad0eff2016-01-03 16:05:21 +1100299
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200300out_free_irq:
301 if (instance->irq != NO_IRQ)
302 free_irq(instance->irq, instance);
303 NCR5380_exit(instance);
Finn Thain0ad0eff2016-01-03 16:05:21 +1100304out_unregister:
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200305 scsi_host_put(instance);
Finn Thain0ad0eff2016-01-03 16:05:21 +1100306out_release:
307#ifndef SCSI_G_NCR5380_MEM
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200308 release_region(base, region_size);
Finn Thain0ad0eff2016-01-03 16:05:21 +1100309#else
310 iounmap(iomem);
Finn Thain9d376402016-03-23 21:10:10 +1100311 release_mem_region(base, iomem_size);
Finn Thain0ad0eff2016-01-03 16:05:21 +1100312#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200313 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314}
315
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200316static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317{
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200318 scsi_remove_host(instance);
Finn Thain22f5f102014-11-12 16:11:56 +1100319 if (instance->irq != NO_IRQ)
Jeff Garzik1e641662007-11-11 19:52:05 -0500320 free_irq(instance->irq, instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 NCR5380_exit(instance);
Ondrej Zary702a98c2010-08-10 18:01:16 -0700322#ifndef SCSI_G_NCR5380_MEM
Finn Thainb01ec342016-01-03 16:05:07 +1100323 release_region(instance->io_port, instance->n_io_port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324#else
Finn Thain9d376402016-03-23 21:10:10 +1100325 {
326 struct NCR5380_hostdata *hostdata = shost_priv(instance);
327
328 iounmap(hostdata->iomem);
329 release_mem_region(instance->base, hostdata->iomem_size);
330 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200332 scsi_host_put(instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333}
334
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100336 * generic_NCR5380_pread - pseudo DMA read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 * @instance: adapter to read from
338 * @dst: buffer to read into
339 * @len: buffer length
340 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300341 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342 * controller
343 */
344
Finn Thain6c4b88c2016-03-23 21:10:17 +1100345static inline int generic_NCR5380_pread(struct Scsi_Host *instance,
346 unsigned char *dst, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347{
Finn Thain54d8fe42016-01-03 16:05:06 +1100348 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 int blocks = len / 128;
350 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351
Ondrej Zary12150792016-01-03 16:06:15 +1100352 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
353 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100355 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100357 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
359 return -1;
360 }
Ondrej Zary12150792016-01-03 16:06:15 +1100361 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
362 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363
Ondrej Zary702a98c2010-08-10 18:01:16 -0700364#ifndef SCSI_G_NCR5380_MEM
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100365 if (hostdata->io_width == 2)
366 insw(instance->io_port + hostdata->c400_host_buf,
367 dst + start, 64);
368 else
369 insb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100370 dst + start, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371#else
Ondrej Zary702a98c2010-08-10 18:01:16 -0700372 /* implies SCSI_G_NCR5380_MEM */
Finn Thain54d8fe42016-01-03 16:05:06 +1100373 memcpy_fromio(dst + start,
374 hostdata->iomem + NCR53C400_host_buffer, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375#endif
376 start += 128;
377 blocks--;
378 }
379
380 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100381 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
382 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383
Ondrej Zary702a98c2010-08-10 18:01:16 -0700384#ifndef SCSI_G_NCR5380_MEM
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100385 if (hostdata->io_width == 2)
386 insw(instance->io_port + hostdata->c400_host_buf,
387 dst + start, 64);
388 else
389 insb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100390 dst + start, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391#else
Ondrej Zary702a98c2010-08-10 18:01:16 -0700392 /* implies SCSI_G_NCR5380_MEM */
Finn Thain54d8fe42016-01-03 16:05:06 +1100393 memcpy_fromio(dst + start,
394 hostdata->iomem + NCR53C400_host_buffer, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395#endif
396 start += 128;
397 blocks--;
398 }
399
Ondrej Zary12150792016-01-03 16:06:15 +1100400 if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 printk("53C400r: no 53C80 gated irq after transfer");
402
Ondrej Zary42fc6372016-01-03 16:06:18 +1100403 /* wait for 53C80 registers to be available */
404 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405 ;
Ondrej Zary42fc6372016-01-03 16:06:18 +1100406
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
408 printk(KERN_ERR "53C400r: no end dma signal\n");
409
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 return 0;
411}
412
413/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100414 * generic_NCR5380_pwrite - pseudo DMA write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 * @instance: adapter to read from
416 * @dst: buffer to read into
417 * @len: buffer length
418 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300419 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 * controller
421 */
422
Finn Thain6c4b88c2016-03-23 21:10:17 +1100423static inline int generic_NCR5380_pwrite(struct Scsi_Host *instance,
424 unsigned char *src, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425{
Finn Thain54d8fe42016-01-03 16:05:06 +1100426 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427 int blocks = len / 128;
428 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429
Ondrej Zary12150792016-01-03 16:06:15 +1100430 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
431 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100433 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434 printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
435 return -1;
436 }
437
Ondrej Zary12150792016-01-03 16:06:15 +1100438 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100440 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 ; // FIXME - timeout
Ondrej Zary702a98c2010-08-10 18:01:16 -0700442#ifndef SCSI_G_NCR5380_MEM
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100443 if (hostdata->io_width == 2)
444 outsw(instance->io_port + hostdata->c400_host_buf,
445 src + start, 64);
446 else
447 outsb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100448 src + start, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449#else
Ondrej Zary702a98c2010-08-10 18:01:16 -0700450 /* implies SCSI_G_NCR5380_MEM */
Finn Thain54d8fe42016-01-03 16:05:06 +1100451 memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
452 src + start, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700453#endif
454 start += 128;
455 blocks--;
456 }
457 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100458 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459 ; // FIXME - no timeout
460
Ondrej Zary702a98c2010-08-10 18:01:16 -0700461#ifndef SCSI_G_NCR5380_MEM
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100462 if (hostdata->io_width == 2)
463 outsw(instance->io_port + hostdata->c400_host_buf,
464 src + start, 64);
465 else
466 outsb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100467 src + start, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468#else
Ondrej Zary702a98c2010-08-10 18:01:16 -0700469 /* implies SCSI_G_NCR5380_MEM */
Finn Thain54d8fe42016-01-03 16:05:06 +1100470 memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
471 src + start, 128);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472#endif
473 start += 128;
474 blocks--;
475 }
476
Ondrej Zary42fc6372016-01-03 16:06:18 +1100477 /* wait for 53C80 registers to be available */
478 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100479 udelay(4); /* DTC436 chip hangs without this */
480 /* FIXME - no timeout */
481 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
484 printk(KERN_ERR "53C400w: no end dma signal\n");
485 }
Ondrej Zary42fc6372016-01-03 16:06:18 +1100486
Linus Torvalds1da177e2005-04-16 15:20:36 -0700487 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
488 ; // TIMEOUT
489 return 0;
490}
Finn Thainff3d4572016-01-03 16:05:25 +1100491
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100492static int generic_NCR5380_dma_xfer_len(struct Scsi_Host *instance,
493 struct scsi_cmnd *cmd)
Finn Thainff3d4572016-01-03 16:05:25 +1100494{
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100495 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Finn Thainff3d4572016-01-03 16:05:25 +1100496 int transfersize = cmd->transfersize;
497
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100498 if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
499 return 0;
500
Finn Thainff3d4572016-01-03 16:05:25 +1100501 /* Limit transfers to 32K, for xx400 & xx406
502 * pseudoDMA that transfers in 128 bytes blocks.
503 */
504 if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
505 !(cmd->SCp.this_residual % transfersize))
506 transfersize = 32 * 1024;
507
Ondrej Zaryf0394622016-01-03 16:06:14 +1100508 /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
509 if (transfersize % 128)
510 transfersize = 0;
511
Finn Thainff3d4572016-01-03 16:05:25 +1100512 return transfersize;
513}
514
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515/*
516 * Include the NCR5380 core code that we build our driver around
517 */
518
519#include "NCR5380.c"
520
Christoph Hellwigd0be4a7d2005-10-31 18:31:40 +0100521static struct scsi_host_template driver_template = {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200522 .module = THIS_MODULE,
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100523 .proc_name = DRV_MODULE_NAME,
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100524 .name = "Generic NCR5380/NCR53C400 SCSI",
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100525 .info = generic_NCR5380_info,
526 .queuecommand = generic_NCR5380_queue_command,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527 .eh_abort_handler = generic_NCR5380_abort,
528 .eh_bus_reset_handler = generic_NCR5380_bus_reset,
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100529 .can_queue = 16,
530 .this_id = 7,
531 .sg_tablesize = SG_ALL,
532 .cmd_per_lun = 2,
533 .use_clustering = DISABLE_CLUSTERING,
Finn Thain32b26a12016-01-03 16:05:58 +1100534 .cmd_size = NCR5380_CMD_SIZE,
Finn Thain0a4e3612016-01-03 16:06:07 +1100535 .max_sectors = 128,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536};
Finn Thain161c0052016-01-03 16:05:46 +1100537
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200539static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
540{
541 int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
542 irq[ndev], card[ndev]);
543 if (ret) {
544 if (base[ndev])
545 printk(KERN_WARNING "Card not found at address 0x%03x\n",
546 base[ndev]);
547 return 0;
548 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200550 return 1;
551}
552
553static int generic_NCR5380_isa_remove(struct device *pdev,
554 unsigned int ndev)
555{
556 generic_NCR5380_release_resources(dev_get_drvdata(pdev));
557 dev_set_drvdata(pdev, NULL);
558 return 0;
559}
560
561static struct isa_driver generic_NCR5380_isa_driver = {
562 .match = generic_NCR5380_isa_match,
563 .remove = generic_NCR5380_isa_remove,
564 .driver = {
565 .name = DRV_MODULE_NAME
566 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567};
568
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200569#if !defined(SCSI_G_NCR5380_MEM) && defined(CONFIG_PNP)
570static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
571 { .id = "DTC436e", .driver_data = BOARD_DTC3181E },
572 { .id = "" }
573};
574MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
575
576static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
577 const struct pnp_device_id *id)
578{
579 int base, irq;
580
581 if (pnp_activate_dev(pdev) < 0)
582 return -EBUSY;
583
584 base = pnp_port_start(pdev, 0);
585 irq = pnp_irq(pdev, 0);
586
587 return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
588 id->driver_data);
589}
590
591static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
592{
593 generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
594 pnp_set_drvdata(pdev, NULL);
595}
596
597static struct pnp_driver generic_NCR5380_pnp_driver = {
598 .name = DRV_MODULE_NAME,
599 .id_table = generic_NCR5380_pnp_ids,
600 .probe = generic_NCR5380_pnp_probe,
601 .remove = generic_NCR5380_pnp_remove,
602};
603#endif /* !defined(SCSI_G_NCR5380_MEM) && defined(CONFIG_PNP) */
604
605static int pnp_registered, isa_registered;
606
607static int __init generic_NCR5380_init(void)
608{
609 int ret = 0;
610
611 /* compatibility with old-style parameters */
612 if (irq[0] == 0 && base[0] == 0 && card[0] == -1) {
613 irq[0] = ncr_irq;
614 base[0] = ncr_addr;
615 if (ncr_5380)
616 card[0] = BOARD_NCR5380;
617 if (ncr_53c400)
618 card[0] = BOARD_NCR53C400;
619 if (ncr_53c400a)
620 card[0] = BOARD_NCR53C400A;
621 if (dtc_3181e)
622 card[0] = BOARD_DTC3181E;
623 if (hp_c2502)
624 card[0] = BOARD_HP_C2502;
625 }
626
627#if !defined(SCSI_G_NCR5380_MEM) && defined(CONFIG_PNP)
628 if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
629 pnp_registered = 1;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700630#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200631 ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
632 if (!ret)
633 isa_registered = 1;
634
635 return (pnp_registered || isa_registered) ? 0 : ret;
636}
637
638static void __exit generic_NCR5380_exit(void)
639{
640#if !defined(SCSI_G_NCR5380_MEM) && defined(CONFIG_PNP)
641 if (pnp_registered)
642 pnp_unregister_driver(&generic_NCR5380_pnp_driver);
643#endif
644 if (isa_registered)
645 isa_unregister_driver(&generic_NCR5380_isa_driver);
646}
647
648module_init(generic_NCR5380_init);
649module_exit(generic_NCR5380_exit);