| Auke Kok | 9a799d7 | 2007-09-15 14:07:45 -0700 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel 10 Gigabit PCI Express Linux driver |
| 4 | Copyright(c) 1999 - 2007 Intel Corporation. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | Linux NICS <linux.nics@intel.com> |
| 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 26 | |
| 27 | *******************************************************************************/ |
| 28 | |
| 29 | #ifndef _IXGBE_PHY_H_ |
| 30 | #define _IXGBE_PHY_H_ |
| 31 | |
| 32 | #include "ixgbe_type.h" |
| 33 | |
| Auke Kok | 9a799d7 | 2007-09-15 14:07:45 -0700 | [diff] [blame] | 34 | s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw); |
| 35 | s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, u32 *speed, bool *link_up); |
| 36 | s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, u32 speed, bool autoneg, |
| 37 | bool autoneg_wait_to_complete); |
| 38 | s32 ixgbe_identify_phy(struct ixgbe_hw *hw); |
| 39 | s32 ixgbe_reset_phy(struct ixgbe_hw *hw); |
| 40 | s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, |
| 41 | u32 device_type, u16 *phy_data); |
| 42 | |
| 43 | /* PHY specific */ |
| 44 | s32 ixgbe_setup_tnx_phy_link(struct ixgbe_hw *hw); |
| 45 | s32 ixgbe_check_tnx_phy_link(struct ixgbe_hw *hw, u32 *speed, bool *link_up); |
| 46 | s32 ixgbe_setup_tnx_phy_link_speed(struct ixgbe_hw *hw, u32 speed, bool autoneg, |
| 47 | bool autoneg_wait_to_complete); |
| 48 | |
| 49 | #endif /* _IXGBE_PHY_H_ */ |