blob: aa15beeb36ca8b7676a49894860f66baee32c7e1 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/***************************************************************************/
2
3/*
Greg Ungererb671b652006-06-26 10:33:10 +10004 * pit.c -- Freescale ColdFire PIT timer. Currently this type of
5 * hardware timer only exists in the Freescale ColdFire
Greg Ungererf15bf192005-11-07 14:09:50 +10006 * 5270/5271, 5282 and other CPUs.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
Greg Ungererb671b652006-06-26 10:33:10 +10008 * Copyright (C) 1999-2006, Greg Ungerer (gerg@snapgear.com)
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
10 *
11 */
12
13/***************************************************************************/
14
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/param.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
Greg Ungererb671b652006-06-26 10:33:10 +100020#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <asm/irq.h>
22#include <asm/coldfire.h>
23#include <asm/mcfpit.h>
24#include <asm/mcfsim.h>
25
26/***************************************************************************/
27
Greg Ungererb671b652006-06-26 10:33:10 +100028/*
29 * By default use timer1 as the system clock timer.
30 */
31#define TA(a) (MCF_IPSBAR + MCFPIT_BASE1 + (a))
32
33/***************************************************************************/
34
Linus Torvalds1da177e2005-04-16 15:20:36 -070035void coldfire_pit_tick(void)
36{
Greg Ungererb671b652006-06-26 10:33:10 +100037 unsigned short pcsr;
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
39 /* Reset the ColdFire timer */
Greg Ungererb671b652006-06-26 10:33:10 +100040 pcsr = __raw_readw(TA(MCFPIT_PCSR));
41 __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR));
Linus Torvalds1da177e2005-04-16 15:20:36 -070042}
43
44/***************************************************************************/
45
Greg Ungerer459c6a92007-02-07 12:02:52 +100046void coldfire_pit_init(irq_handler_t handler)
Linus Torvalds1da177e2005-04-16 15:20:36 -070047{
48 volatile unsigned char *icrp;
49 volatile unsigned long *imrp;
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
Thomas Gleixnerf6f23882006-07-01 19:29:18 -070051 request_irq(MCFINT_VECBASE + MCFINT_PIT1, handler, IRQF_DISABLED,
Linus Torvalds1da177e2005-04-16 15:20:36 -070052 "ColdFire Timer", NULL);
53
54 icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 +
55 MCFINTC_ICR0 + MCFINT_PIT1);
Greg Ungererf15bf192005-11-07 14:09:50 +100056 *icrp = ICR_INTRCONF;
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
Greg Ungererf15bf192005-11-07 14:09:50 +100058 imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR);
59 *imrp &= ~MCFPIT_IMR_IBIT;
Linus Torvalds1da177e2005-04-16 15:20:36 -070060
61 /* Set up PIT timer 1 as poll clock */
Greg Ungererb671b652006-06-26 10:33:10 +100062 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
63 __raw_writew(((MCF_CLK / 2) / 64) / HZ, TA(MCFPIT_PMR));
64 __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | MCFPIT_PCSR_OVW |
65 MCFPIT_PCSR_RLD | MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR));
Linus Torvalds1da177e2005-04-16 15:20:36 -070066}
67
68/***************************************************************************/
69
70unsigned long coldfire_pit_offset(void)
71{
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 volatile unsigned long *ipr;
73 unsigned long pmr, pcntr, offset;
74
Greg Ungererf15bf192005-11-07 14:09:50 +100075 ipr = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFPIT_IMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
Greg Ungererb671b652006-06-26 10:33:10 +100077 pmr = __raw_readw(TA(MCFPIT_PMR));
78 pcntr = __raw_readw(TA(MCFPIT_PCNTR));
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
80 /*
81 * If we are still in the first half of the upcount and a
82 * timer interupt is pending, then add on a ticks worth of time.
83 */
84 offset = ((pmr - pcntr) * (1000000 / HZ)) / pmr;
Greg Ungererf15bf192005-11-07 14:09:50 +100085 if ((offset < (1000000 / HZ / 2)) && (*ipr & MCFPIT_IMR_IBIT))
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 offset += 1000000 / HZ;
87 return offset;
88}
89
90/***************************************************************************/