Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/bitops.h> |
| 20 | #include <linux/slab.h> |
| 21 | #include <linux/of.h> |
| 22 | #include <linux/of_device.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/ktime.h> |
| 25 | #include <linux/regulator/driver.h> |
| 26 | #include <linux/regmap.h> |
| 27 | #include <linux/list.h> |
| 28 | |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 29 | /* Pin control enable input pins. */ |
| 30 | #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00 |
| 31 | #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01 |
| 32 | #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02 |
| 33 | #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04 |
| 34 | #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08 |
| 35 | #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10 |
| 36 | |
| 37 | /* Pin control high power mode input pins. */ |
| 38 | #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00 |
| 39 | #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01 |
| 40 | #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02 |
| 41 | #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04 |
| 42 | #define SPMI_REGULATOR_PIN_CTRL_HPM_EN3 0x08 |
| 43 | #define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10 |
| 44 | #define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20 |
| 45 | |
| 46 | /* |
| 47 | * Used with enable parameters to specify that hardware default register values |
| 48 | * should be left unaltered. |
| 49 | */ |
| 50 | #define SPMI_REGULATOR_USE_HW_DEFAULT 2 |
| 51 | |
| 52 | /* Soft start strength of a voltage switch type regulator */ |
| 53 | enum spmi_vs_soft_start_str { |
| 54 | SPMI_VS_SOFT_START_STR_0P05_UA = 0, |
| 55 | SPMI_VS_SOFT_START_STR_0P25_UA, |
| 56 | SPMI_VS_SOFT_START_STR_0P55_UA, |
| 57 | SPMI_VS_SOFT_START_STR_0P75_UA, |
| 58 | SPMI_VS_SOFT_START_STR_HW_DEFAULT, |
| 59 | }; |
| 60 | |
| 61 | /** |
| 62 | * struct spmi_regulator_init_data - spmi-regulator initialization data |
| 63 | * @pin_ctrl_enable: Bit mask specifying which hardware pins should be |
| 64 | * used to enable the regulator, if any |
| 65 | * Value should be an ORing of |
| 66 | * SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants. If |
| 67 | * the bit specified by |
| 68 | * SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is |
| 69 | * set, then pin control enable hardware registers |
| 70 | * will not be modified. |
| 71 | * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be |
| 72 | * used to force the regulator into high power |
| 73 | * mode, if any |
| 74 | * Value should be an ORing of |
| 75 | * SPMI_REGULATOR_PIN_CTRL_HPM_* constants. If |
| 76 | * the bit specified by |
| 77 | * SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is |
| 78 | * set, then pin control mode hardware registers |
| 79 | * will not be modified. |
| 80 | * @vs_soft_start_strength: This parameter sets the soft start strength for |
| 81 | * voltage switch type regulators. Its value |
| 82 | * should be one of SPMI_VS_SOFT_START_STR_*. If |
| 83 | * its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT, |
| 84 | * then the soft start strength will be left at its |
| 85 | * default hardware value. |
| 86 | */ |
| 87 | struct spmi_regulator_init_data { |
| 88 | unsigned pin_ctrl_enable; |
| 89 | unsigned pin_ctrl_hpm; |
| 90 | enum spmi_vs_soft_start_str vs_soft_start_strength; |
| 91 | }; |
| 92 | |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 93 | /* These types correspond to unique register layouts. */ |
| 94 | enum spmi_regulator_logical_type { |
| 95 | SPMI_REGULATOR_LOGICAL_TYPE_SMPS, |
| 96 | SPMI_REGULATOR_LOGICAL_TYPE_LDO, |
| 97 | SPMI_REGULATOR_LOGICAL_TYPE_VS, |
| 98 | SPMI_REGULATOR_LOGICAL_TYPE_BOOST, |
| 99 | SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS, |
| 100 | SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP, |
| 101 | SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO, |
| 102 | SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS, |
| 103 | SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, |
| 104 | SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, |
| 105 | }; |
| 106 | |
| 107 | enum spmi_regulator_type { |
| 108 | SPMI_REGULATOR_TYPE_BUCK = 0x03, |
| 109 | SPMI_REGULATOR_TYPE_LDO = 0x04, |
| 110 | SPMI_REGULATOR_TYPE_VS = 0x05, |
| 111 | SPMI_REGULATOR_TYPE_BOOST = 0x1b, |
| 112 | SPMI_REGULATOR_TYPE_FTS = 0x1c, |
| 113 | SPMI_REGULATOR_TYPE_BOOST_BYP = 0x1f, |
| 114 | SPMI_REGULATOR_TYPE_ULT_LDO = 0x21, |
| 115 | SPMI_REGULATOR_TYPE_ULT_BUCK = 0x22, |
| 116 | }; |
| 117 | |
| 118 | enum spmi_regulator_subtype { |
| 119 | SPMI_REGULATOR_SUBTYPE_GP_CTL = 0x08, |
| 120 | SPMI_REGULATOR_SUBTYPE_RF_CTL = 0x09, |
| 121 | SPMI_REGULATOR_SUBTYPE_N50 = 0x01, |
| 122 | SPMI_REGULATOR_SUBTYPE_N150 = 0x02, |
| 123 | SPMI_REGULATOR_SUBTYPE_N300 = 0x03, |
| 124 | SPMI_REGULATOR_SUBTYPE_N600 = 0x04, |
| 125 | SPMI_REGULATOR_SUBTYPE_N1200 = 0x05, |
| 126 | SPMI_REGULATOR_SUBTYPE_N600_ST = 0x06, |
| 127 | SPMI_REGULATOR_SUBTYPE_N1200_ST = 0x07, |
| 128 | SPMI_REGULATOR_SUBTYPE_N900_ST = 0x14, |
| 129 | SPMI_REGULATOR_SUBTYPE_N300_ST = 0x15, |
| 130 | SPMI_REGULATOR_SUBTYPE_P50 = 0x08, |
| 131 | SPMI_REGULATOR_SUBTYPE_P150 = 0x09, |
| 132 | SPMI_REGULATOR_SUBTYPE_P300 = 0x0a, |
| 133 | SPMI_REGULATOR_SUBTYPE_P600 = 0x0b, |
| 134 | SPMI_REGULATOR_SUBTYPE_P1200 = 0x0c, |
| 135 | SPMI_REGULATOR_SUBTYPE_LN = 0x10, |
| 136 | SPMI_REGULATOR_SUBTYPE_LV_P50 = 0x28, |
| 137 | SPMI_REGULATOR_SUBTYPE_LV_P150 = 0x29, |
| 138 | SPMI_REGULATOR_SUBTYPE_LV_P300 = 0x2a, |
| 139 | SPMI_REGULATOR_SUBTYPE_LV_P600 = 0x2b, |
| 140 | SPMI_REGULATOR_SUBTYPE_LV_P1200 = 0x2c, |
| 141 | SPMI_REGULATOR_SUBTYPE_LV_P450 = 0x2d, |
| 142 | SPMI_REGULATOR_SUBTYPE_LV100 = 0x01, |
| 143 | SPMI_REGULATOR_SUBTYPE_LV300 = 0x02, |
| 144 | SPMI_REGULATOR_SUBTYPE_MV300 = 0x08, |
| 145 | SPMI_REGULATOR_SUBTYPE_MV500 = 0x09, |
| 146 | SPMI_REGULATOR_SUBTYPE_HDMI = 0x10, |
| 147 | SPMI_REGULATOR_SUBTYPE_OTG = 0x11, |
| 148 | SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01, |
| 149 | SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08, |
| 150 | SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09, |
| 151 | SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01, |
| 152 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d, |
| 153 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, |
| 154 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, |
| 155 | SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, |
| 156 | }; |
| 157 | |
| 158 | enum spmi_common_regulator_registers { |
| 159 | SPMI_COMMON_REG_DIG_MAJOR_REV = 0x01, |
| 160 | SPMI_COMMON_REG_TYPE = 0x04, |
| 161 | SPMI_COMMON_REG_SUBTYPE = 0x05, |
| 162 | SPMI_COMMON_REG_VOLTAGE_RANGE = 0x40, |
| 163 | SPMI_COMMON_REG_VOLTAGE_SET = 0x41, |
| 164 | SPMI_COMMON_REG_MODE = 0x45, |
| 165 | SPMI_COMMON_REG_ENABLE = 0x46, |
| 166 | SPMI_COMMON_REG_PULL_DOWN = 0x48, |
| 167 | SPMI_COMMON_REG_SOFT_START = 0x4c, |
| 168 | SPMI_COMMON_REG_STEP_CTRL = 0x61, |
| 169 | }; |
| 170 | |
| 171 | enum spmi_vs_registers { |
| 172 | SPMI_VS_REG_OCP = 0x4a, |
| 173 | SPMI_VS_REG_SOFT_START = 0x4c, |
| 174 | }; |
| 175 | |
| 176 | enum spmi_boost_registers { |
| 177 | SPMI_BOOST_REG_CURRENT_LIMIT = 0x4a, |
| 178 | }; |
| 179 | |
| 180 | enum spmi_boost_byp_registers { |
| 181 | SPMI_BOOST_BYP_REG_CURRENT_LIMIT = 0x4b, |
| 182 | }; |
| 183 | |
| 184 | /* Used for indexing into ctrl_reg. These are offets from 0x40 */ |
| 185 | enum spmi_common_control_register_index { |
| 186 | SPMI_COMMON_IDX_VOLTAGE_RANGE = 0, |
| 187 | SPMI_COMMON_IDX_VOLTAGE_SET = 1, |
| 188 | SPMI_COMMON_IDX_MODE = 5, |
| 189 | SPMI_COMMON_IDX_ENABLE = 6, |
| 190 | }; |
| 191 | |
| 192 | /* Common regulator control register layout */ |
| 193 | #define SPMI_COMMON_ENABLE_MASK 0x80 |
| 194 | #define SPMI_COMMON_ENABLE 0x80 |
| 195 | #define SPMI_COMMON_DISABLE 0x00 |
| 196 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK 0x08 |
| 197 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK 0x04 |
| 198 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK 0x02 |
| 199 | #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK 0x01 |
| 200 | #define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK 0x0f |
| 201 | |
| 202 | /* Common regulator mode register layout */ |
| 203 | #define SPMI_COMMON_MODE_HPM_MASK 0x80 |
| 204 | #define SPMI_COMMON_MODE_AUTO_MASK 0x40 |
| 205 | #define SPMI_COMMON_MODE_BYPASS_MASK 0x20 |
| 206 | #define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK 0x10 |
| 207 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08 |
| 208 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04 |
| 209 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02 |
| 210 | #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01 |
| 211 | #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f |
| 212 | |
| 213 | /* Common regulator pull down control register layout */ |
| 214 | #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 |
| 215 | |
| 216 | /* LDO regulator current limit control register layout */ |
| 217 | #define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK 0x80 |
| 218 | |
| 219 | /* LDO regulator soft start control register layout */ |
| 220 | #define SPMI_LDO_SOFT_START_ENABLE_MASK 0x80 |
| 221 | |
| 222 | /* VS regulator over current protection control register layout */ |
| 223 | #define SPMI_VS_OCP_OVERRIDE 0x01 |
| 224 | #define SPMI_VS_OCP_NO_OVERRIDE 0x00 |
| 225 | |
| 226 | /* VS regulator soft start control register layout */ |
| 227 | #define SPMI_VS_SOFT_START_ENABLE_MASK 0x80 |
| 228 | #define SPMI_VS_SOFT_START_SEL_MASK 0x03 |
| 229 | |
| 230 | /* Boost regulator current limit control register layout */ |
| 231 | #define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK 0x80 |
| 232 | #define SPMI_BOOST_CURRENT_LIMIT_MASK 0x07 |
| 233 | |
| 234 | #define SPMI_VS_OCP_DEFAULT_MAX_RETRIES 10 |
| 235 | #define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS 30 |
| 236 | #define SPMI_VS_OCP_FALL_DELAY_US 90 |
| 237 | #define SPMI_VS_OCP_FAULT_DELAY_US 20000 |
| 238 | |
| 239 | #define SPMI_FTSMPS_STEP_CTRL_STEP_MASK 0x18 |
| 240 | #define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT 3 |
| 241 | #define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK 0x07 |
| 242 | #define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT 0 |
| 243 | |
| 244 | /* Clock rate in kHz of the FTSMPS regulator reference clock. */ |
| 245 | #define SPMI_FTSMPS_CLOCK_RATE 19200 |
| 246 | |
| 247 | /* Minimum voltage stepper delay for each step. */ |
| 248 | #define SPMI_FTSMPS_STEP_DELAY 8 |
| 249 | |
| 250 | /* |
| 251 | * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to |
| 252 | * adjust the step rate in order to account for oscillator variance. |
| 253 | */ |
| 254 | #define SPMI_FTSMPS_STEP_MARGIN_NUM 4 |
| 255 | #define SPMI_FTSMPS_STEP_MARGIN_DEN 5 |
| 256 | |
| 257 | /* |
| 258 | * This voltage in uV is returned by get_voltage functions when there is no way |
| 259 | * to determine the current voltage level. It is needed because the regulator |
| 260 | * framework treats a 0 uV voltage as an error. |
| 261 | */ |
| 262 | #define VOLTAGE_UNKNOWN 1 |
| 263 | |
| 264 | /* VSET value to decide the range of ULT SMPS */ |
| 265 | #define ULT_SMPS_RANGE_SPLIT 0x60 |
| 266 | |
| 267 | /** |
| 268 | * struct spmi_voltage_range - regulator set point voltage mapping description |
| 269 | * @min_uV: Minimum programmable output voltage resulting from |
| 270 | * set point register value 0x00 |
| 271 | * @max_uV: Maximum programmable output voltage |
| 272 | * @step_uV: Output voltage increase resulting from the set point |
| 273 | * register value increasing by 1 |
| 274 | * @set_point_min_uV: Minimum allowed voltage |
| 275 | * @set_point_max_uV: Maximum allowed voltage. This may be tweaked in order |
| 276 | * to pick which range should be used in the case of |
| 277 | * overlapping set points. |
| 278 | * @n_voltages: Number of preferred voltage set points present in this |
| 279 | * range |
| 280 | * @range_sel: Voltage range register value corresponding to this range |
| 281 | * |
| 282 | * The following relationships must be true for the values used in this struct: |
| 283 | * (max_uV - min_uV) % step_uV == 0 |
| 284 | * (set_point_min_uV - min_uV) % step_uV == 0* |
| 285 | * (set_point_max_uV - min_uV) % step_uV == 0* |
| 286 | * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1 |
| 287 | * |
| 288 | * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to |
| 289 | * specify that the voltage range has meaning, but is not preferred. |
| 290 | */ |
| 291 | struct spmi_voltage_range { |
| 292 | int min_uV; |
| 293 | int max_uV; |
| 294 | int step_uV; |
| 295 | int set_point_min_uV; |
| 296 | int set_point_max_uV; |
| 297 | unsigned n_voltages; |
| 298 | u8 range_sel; |
| 299 | }; |
| 300 | |
| 301 | /* |
| 302 | * The ranges specified in the spmi_voltage_set_points struct must be listed |
| 303 | * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV. |
| 304 | */ |
| 305 | struct spmi_voltage_set_points { |
| 306 | struct spmi_voltage_range *range; |
| 307 | int count; |
| 308 | unsigned n_voltages; |
| 309 | }; |
| 310 | |
| 311 | struct spmi_regulator { |
| 312 | struct regulator_desc desc; |
| 313 | struct device *dev; |
| 314 | struct delayed_work ocp_work; |
| 315 | struct regmap *regmap; |
| 316 | struct spmi_voltage_set_points *set_points; |
| 317 | enum spmi_regulator_logical_type logical_type; |
| 318 | int ocp_irq; |
| 319 | int ocp_count; |
| 320 | int ocp_max_retries; |
| 321 | int ocp_retry_delay_ms; |
| 322 | int hpm_min_load; |
| 323 | int slew_rate; |
| 324 | ktime_t vs_enable_time; |
| 325 | u16 base; |
| 326 | struct list_head node; |
| 327 | }; |
| 328 | |
| 329 | struct spmi_regulator_mapping { |
| 330 | enum spmi_regulator_type type; |
| 331 | enum spmi_regulator_subtype subtype; |
| 332 | enum spmi_regulator_logical_type logical_type; |
| 333 | u32 revision_min; |
| 334 | u32 revision_max; |
| 335 | struct regulator_ops *ops; |
| 336 | struct spmi_voltage_set_points *set_points; |
| 337 | int hpm_min_load; |
| 338 | }; |
| 339 | |
| 340 | struct spmi_regulator_data { |
| 341 | const char *name; |
| 342 | u16 base; |
| 343 | const char *supply; |
| 344 | const char *ocp; |
| 345 | u16 force_type; |
| 346 | }; |
| 347 | |
| 348 | #define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \ |
| 349 | _logical_type, _ops_val, _set_points_val, _hpm_min_load) \ |
| 350 | { \ |
| 351 | .type = SPMI_REGULATOR_TYPE_##_type, \ |
| 352 | .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ |
| 353 | .revision_min = _dig_major_min, \ |
| 354 | .revision_max = _dig_major_max, \ |
| 355 | .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \ |
| 356 | .ops = &spmi_##_ops_val##_ops, \ |
| 357 | .set_points = &_set_points_val##_set_points, \ |
| 358 | .hpm_min_load = _hpm_min_load, \ |
| 359 | } |
| 360 | |
| 361 | #define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \ |
| 362 | { \ |
| 363 | .type = SPMI_REGULATOR_TYPE_VS, \ |
| 364 | .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ |
| 365 | .revision_min = _dig_major_min, \ |
| 366 | .revision_max = _dig_major_max, \ |
| 367 | .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_VS, \ |
| 368 | .ops = &spmi_vs_ops, \ |
| 369 | } |
| 370 | |
| 371 | #define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \ |
| 372 | _set_point_max_uV, _max_uV, _step_uV) \ |
| 373 | { \ |
| 374 | .min_uV = _min_uV, \ |
| 375 | .max_uV = _max_uV, \ |
| 376 | .set_point_min_uV = _set_point_min_uV, \ |
| 377 | .set_point_max_uV = _set_point_max_uV, \ |
| 378 | .step_uV = _step_uV, \ |
| 379 | .range_sel = _range_sel, \ |
| 380 | } |
| 381 | |
| 382 | #define DEFINE_SPMI_SET_POINTS(name) \ |
| 383 | struct spmi_voltage_set_points name##_set_points = { \ |
| 384 | .range = name##_ranges, \ |
| 385 | .count = ARRAY_SIZE(name##_ranges), \ |
| 386 | } |
| 387 | |
| 388 | /* |
| 389 | * These tables contain the physically available PMIC regulator voltage setpoint |
| 390 | * ranges. Where two ranges overlap in hardware, one of the ranges is trimmed |
| 391 | * to ensure that the setpoints available to software are monotonically |
| 392 | * increasing and unique. The set_voltage callback functions expect these |
| 393 | * properties to hold. |
| 394 | */ |
| 395 | static struct spmi_voltage_range pldo_ranges[] = { |
| 396 | SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), |
| 397 | SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000), |
| 398 | SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000), |
| 399 | }; |
| 400 | |
| 401 | static struct spmi_voltage_range nldo1_ranges[] = { |
| 402 | SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), |
| 403 | }; |
| 404 | |
| 405 | static struct spmi_voltage_range nldo2_ranges[] = { |
| 406 | SPMI_VOLTAGE_RANGE(0, 375000, 0, 0, 1537500, 12500), |
| 407 | SPMI_VOLTAGE_RANGE(1, 375000, 375000, 768750, 768750, 6250), |
| 408 | SPMI_VOLTAGE_RANGE(2, 750000, 775000, 1537500, 1537500, 12500), |
| 409 | }; |
| 410 | |
| 411 | static struct spmi_voltage_range nldo3_ranges[] = { |
| 412 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), |
| 413 | SPMI_VOLTAGE_RANGE(1, 375000, 0, 0, 1537500, 12500), |
| 414 | SPMI_VOLTAGE_RANGE(2, 750000, 0, 0, 1537500, 12500), |
| 415 | }; |
| 416 | |
| 417 | static struct spmi_voltage_range ln_ldo_ranges[] = { |
| 418 | SPMI_VOLTAGE_RANGE(1, 690000, 690000, 1110000, 1110000, 60000), |
| 419 | SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000), |
| 420 | }; |
| 421 | |
| 422 | static struct spmi_voltage_range smps_ranges[] = { |
| 423 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), |
| 424 | SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000), |
| 425 | }; |
| 426 | |
| 427 | static struct spmi_voltage_range ftsmps_ranges[] = { |
| 428 | SPMI_VOLTAGE_RANGE(0, 0, 350000, 1275000, 1275000, 5000), |
| 429 | SPMI_VOLTAGE_RANGE(1, 0, 1280000, 2040000, 2040000, 10000), |
| 430 | }; |
| 431 | |
| 432 | static struct spmi_voltage_range ftsmps2p5_ranges[] = { |
| 433 | SPMI_VOLTAGE_RANGE(0, 80000, 350000, 1355000, 1355000, 5000), |
| 434 | SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000), |
| 435 | }; |
| 436 | |
| 437 | static struct spmi_voltage_range boost_ranges[] = { |
| 438 | SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000), |
| 439 | }; |
| 440 | |
| 441 | static struct spmi_voltage_range boost_byp_ranges[] = { |
| 442 | SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000), |
| 443 | }; |
| 444 | |
| 445 | static struct spmi_voltage_range ult_lo_smps_ranges[] = { |
| 446 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), |
| 447 | SPMI_VOLTAGE_RANGE(1, 750000, 0, 0, 1525000, 25000), |
| 448 | }; |
| 449 | |
| 450 | static struct spmi_voltage_range ult_ho_smps_ranges[] = { |
| 451 | SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000), |
| 452 | }; |
| 453 | |
| 454 | static struct spmi_voltage_range ult_nldo_ranges[] = { |
| 455 | SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), |
| 456 | }; |
| 457 | |
| 458 | static struct spmi_voltage_range ult_pldo_ranges[] = { |
| 459 | SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500), |
| 460 | }; |
| 461 | |
| 462 | static DEFINE_SPMI_SET_POINTS(pldo); |
| 463 | static DEFINE_SPMI_SET_POINTS(nldo1); |
| 464 | static DEFINE_SPMI_SET_POINTS(nldo2); |
| 465 | static DEFINE_SPMI_SET_POINTS(nldo3); |
| 466 | static DEFINE_SPMI_SET_POINTS(ln_ldo); |
| 467 | static DEFINE_SPMI_SET_POINTS(smps); |
| 468 | static DEFINE_SPMI_SET_POINTS(ftsmps); |
| 469 | static DEFINE_SPMI_SET_POINTS(ftsmps2p5); |
| 470 | static DEFINE_SPMI_SET_POINTS(boost); |
| 471 | static DEFINE_SPMI_SET_POINTS(boost_byp); |
| 472 | static DEFINE_SPMI_SET_POINTS(ult_lo_smps); |
| 473 | static DEFINE_SPMI_SET_POINTS(ult_ho_smps); |
| 474 | static DEFINE_SPMI_SET_POINTS(ult_nldo); |
| 475 | static DEFINE_SPMI_SET_POINTS(ult_pldo); |
| 476 | |
| 477 | static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, |
| 478 | int len) |
| 479 | { |
| 480 | return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len); |
| 481 | } |
| 482 | |
| 483 | static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr, |
| 484 | u8 *buf, int len) |
| 485 | { |
| 486 | return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len); |
| 487 | } |
| 488 | |
| 489 | static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val, |
| 490 | u8 mask) |
| 491 | { |
| 492 | return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val); |
| 493 | } |
| 494 | |
| 495 | static int spmi_regulator_common_is_enabled(struct regulator_dev *rdev) |
| 496 | { |
| 497 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 498 | u8 reg; |
| 499 | |
| 500 | spmi_vreg_read(vreg, SPMI_COMMON_REG_ENABLE, ®, 1); |
| 501 | |
| 502 | return (reg & SPMI_COMMON_ENABLE_MASK) == SPMI_COMMON_ENABLE; |
| 503 | } |
| 504 | |
| 505 | static int spmi_regulator_common_enable(struct regulator_dev *rdev) |
| 506 | { |
| 507 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 508 | |
| 509 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, |
| 510 | SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK); |
| 511 | } |
| 512 | |
| 513 | static int spmi_regulator_vs_enable(struct regulator_dev *rdev) |
| 514 | { |
| 515 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 516 | |
| 517 | if (vreg->ocp_irq) { |
| 518 | vreg->ocp_count = 0; |
| 519 | vreg->vs_enable_time = ktime_get(); |
| 520 | } |
| 521 | |
| 522 | return spmi_regulator_common_enable(rdev); |
| 523 | } |
| 524 | |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 525 | static int spmi_regulator_vs_ocp(struct regulator_dev *rdev) |
| 526 | { |
| 527 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 528 | u8 reg = SPMI_VS_OCP_OVERRIDE; |
| 529 | |
| 530 | return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, ®, 1); |
| 531 | } |
| 532 | |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 533 | static int spmi_regulator_common_disable(struct regulator_dev *rdev) |
| 534 | { |
| 535 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 536 | |
| 537 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, |
| 538 | SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK); |
| 539 | } |
| 540 | |
| 541 | static int spmi_regulator_select_voltage(struct spmi_regulator *vreg, |
| 542 | int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel, |
| 543 | unsigned *selector) |
| 544 | { |
| 545 | const struct spmi_voltage_range *range; |
| 546 | int uV = min_uV; |
| 547 | int lim_min_uV, lim_max_uV, i, range_id, range_max_uV; |
| 548 | |
| 549 | /* Check if request voltage is outside of physically settable range. */ |
| 550 | lim_min_uV = vreg->set_points->range[0].set_point_min_uV; |
| 551 | lim_max_uV = |
| 552 | vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV; |
| 553 | |
| 554 | if (uV < lim_min_uV && max_uV >= lim_min_uV) |
| 555 | uV = lim_min_uV; |
| 556 | |
| 557 | if (uV < lim_min_uV || uV > lim_max_uV) { |
| 558 | dev_err(vreg->dev, |
| 559 | "request v=[%d, %d] is outside possible v=[%d, %d]\n", |
| 560 | min_uV, max_uV, lim_min_uV, lim_max_uV); |
| 561 | return -EINVAL; |
| 562 | } |
| 563 | |
| 564 | /* Find the range which uV is inside of. */ |
| 565 | for (i = vreg->set_points->count - 1; i > 0; i--) { |
| 566 | range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV; |
| 567 | if (uV > range_max_uV && range_max_uV > 0) |
| 568 | break; |
| 569 | } |
| 570 | |
| 571 | range_id = i; |
| 572 | range = &vreg->set_points->range[range_id]; |
| 573 | *range_sel = range->range_sel; |
| 574 | |
| 575 | /* |
| 576 | * Force uV to be an allowed set point by applying a ceiling function to |
| 577 | * the uV value. |
| 578 | */ |
Axel Lin | 5d506a5 | 2015-07-09 16:48:50 +0800 | [diff] [blame] | 579 | *voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 580 | uV = *voltage_sel * range->step_uV + range->min_uV; |
| 581 | |
| 582 | if (uV > max_uV) { |
| 583 | dev_err(vreg->dev, |
| 584 | "request v=[%d, %d] cannot be met by any set point; " |
| 585 | "next set point: %d\n", |
| 586 | min_uV, max_uV, uV); |
| 587 | return -EINVAL; |
| 588 | } |
| 589 | |
| 590 | *selector = 0; |
| 591 | for (i = 0; i < range_id; i++) |
| 592 | *selector += vreg->set_points->range[i].n_voltages; |
| 593 | *selector += (uV - range->set_point_min_uV) / range->step_uV; |
| 594 | |
| 595 | return 0; |
| 596 | } |
| 597 | |
| 598 | static const struct spmi_voltage_range * |
| 599 | spmi_regulator_find_range(struct spmi_regulator *vreg) |
| 600 | { |
| 601 | u8 range_sel; |
| 602 | const struct spmi_voltage_range *range, *end; |
| 603 | |
| 604 | range = vreg->set_points->range; |
| 605 | end = range + vreg->set_points->count; |
| 606 | |
| 607 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1); |
| 608 | |
| 609 | for (; range < end; range++) |
| 610 | if (range->range_sel == range_sel) |
| 611 | return range; |
| 612 | |
| 613 | return NULL; |
| 614 | } |
| 615 | |
| 616 | static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg, |
| 617 | int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel, |
| 618 | unsigned *selector) |
| 619 | { |
| 620 | const struct spmi_voltage_range *range; |
| 621 | int uV = min_uV; |
| 622 | int i; |
| 623 | |
| 624 | range = spmi_regulator_find_range(vreg); |
| 625 | if (!range) |
| 626 | goto different_range; |
| 627 | |
| 628 | if (uV < range->min_uV && max_uV >= range->min_uV) |
| 629 | uV = range->min_uV; |
| 630 | |
| 631 | if (uV < range->min_uV || uV > range->max_uV) { |
| 632 | /* Current range doesn't support the requested voltage. */ |
| 633 | goto different_range; |
| 634 | } |
| 635 | |
| 636 | /* |
| 637 | * Force uV to be an allowed set point by applying a ceiling function to |
| 638 | * the uV value. |
| 639 | */ |
| 640 | *voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); |
| 641 | uV = *voltage_sel * range->step_uV + range->min_uV; |
| 642 | |
| 643 | if (uV > max_uV) { |
| 644 | /* |
| 645 | * No set point in the current voltage range is within the |
| 646 | * requested min_uV to max_uV range. |
| 647 | */ |
| 648 | goto different_range; |
| 649 | } |
| 650 | |
| 651 | *selector = 0; |
| 652 | for (i = 0; i < vreg->set_points->count; i++) { |
| 653 | if (uV >= vreg->set_points->range[i].set_point_min_uV |
Stephen Boyd | 9b2dfee | 2015-06-16 11:11:22 -0700 | [diff] [blame] | 654 | && uV <= vreg->set_points->range[i].set_point_max_uV) { |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 655 | *selector += |
| 656 | (uV - vreg->set_points->range[i].set_point_min_uV) |
| 657 | / vreg->set_points->range[i].step_uV; |
| 658 | break; |
Stephen Boyd | 9b2dfee | 2015-06-16 11:11:22 -0700 | [diff] [blame] | 659 | } |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 660 | |
| 661 | *selector += vreg->set_points->range[i].n_voltages; |
| 662 | } |
| 663 | |
| 664 | if (*selector >= vreg->set_points->n_voltages) |
| 665 | goto different_range; |
| 666 | |
| 667 | return 0; |
| 668 | |
| 669 | different_range: |
| 670 | return spmi_regulator_select_voltage(vreg, min_uV, max_uV, |
| 671 | range_sel, voltage_sel, selector); |
| 672 | } |
| 673 | |
| 674 | static int spmi_regulator_common_set_voltage(struct regulator_dev *rdev, |
| 675 | int min_uV, int max_uV, unsigned *selector) |
| 676 | { |
| 677 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 678 | int ret; |
| 679 | u8 buf[2]; |
| 680 | u8 range_sel, voltage_sel; |
| 681 | |
| 682 | /* |
| 683 | * Favor staying in the current voltage range if possible. This avoids |
| 684 | * voltage spikes that occur when changing the voltage range. |
| 685 | */ |
| 686 | ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV, |
| 687 | &range_sel, &voltage_sel, selector); |
| 688 | if (ret) |
| 689 | return ret; |
| 690 | |
| 691 | buf[0] = range_sel; |
| 692 | buf[1] = voltage_sel; |
| 693 | return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2); |
| 694 | } |
| 695 | |
| 696 | static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, |
| 697 | unsigned int old_selector, unsigned int new_selector) |
| 698 | { |
| 699 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 700 | const struct spmi_voltage_range *range; |
| 701 | int diff_uV; |
| 702 | |
| 703 | range = spmi_regulator_find_range(vreg); |
| 704 | if (!range) |
| 705 | return -EINVAL; |
| 706 | |
| 707 | diff_uV = abs(new_selector - old_selector) * range->step_uV; |
| 708 | |
| 709 | return DIV_ROUND_UP(diff_uV, vreg->slew_rate); |
| 710 | } |
| 711 | |
| 712 | static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev) |
| 713 | { |
| 714 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 715 | const struct spmi_voltage_range *range; |
| 716 | u8 voltage_sel; |
| 717 | |
| 718 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); |
| 719 | |
| 720 | range = spmi_regulator_find_range(vreg); |
| 721 | if (!range) |
| 722 | return VOLTAGE_UNKNOWN; |
| 723 | |
| 724 | return range->step_uV * voltage_sel + range->min_uV; |
| 725 | } |
| 726 | |
| 727 | static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev, |
| 728 | int min_uV, int max_uV, unsigned *selector) |
| 729 | { |
| 730 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 731 | int ret; |
| 732 | u8 range_sel, sel; |
| 733 | |
| 734 | ret = spmi_regulator_select_voltage(vreg, min_uV, max_uV, &range_sel, |
| 735 | &sel, selector); |
| 736 | if (ret) { |
| 737 | dev_err(vreg->dev, "could not set voltage, ret=%d\n", ret); |
| 738 | return ret; |
| 739 | } |
| 740 | |
| 741 | /* |
| 742 | * Certain types of regulators do not have a range select register so |
| 743 | * only voltage set register needs to be written. |
| 744 | */ |
| 745 | return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1); |
| 746 | } |
| 747 | |
| 748 | static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev) |
| 749 | { |
| 750 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 751 | const struct spmi_voltage_range *range = vreg->set_points->range; |
| 752 | u8 voltage_sel; |
| 753 | |
| 754 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); |
| 755 | |
| 756 | return range->step_uV * voltage_sel + range->min_uV; |
| 757 | } |
| 758 | |
| 759 | static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev, |
| 760 | int min_uV, int max_uV, unsigned *selector) |
| 761 | { |
| 762 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 763 | int ret; |
| 764 | u8 range_sel, voltage_sel; |
| 765 | |
| 766 | /* |
| 767 | * Favor staying in the current voltage range if possible. This avoids |
| 768 | * voltage spikes that occur when changing the voltage range. |
| 769 | */ |
| 770 | ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV, |
| 771 | &range_sel, &voltage_sel, selector); |
| 772 | if (ret) |
| 773 | return ret; |
| 774 | |
| 775 | /* |
| 776 | * Calculate VSET based on range |
| 777 | * In case of range 0: voltage_sel is a 7 bit value, can be written |
| 778 | * witout any modification. |
| 779 | * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to |
| 780 | * [011]. |
| 781 | */ |
| 782 | if (range_sel == 1) |
| 783 | voltage_sel |= ULT_SMPS_RANGE_SPLIT; |
| 784 | |
Julia Lawall | 0f94bff | 2015-06-16 06:45:14 -0700 | [diff] [blame] | 785 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET, |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 786 | voltage_sel, 0xff); |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 787 | } |
| 788 | |
| 789 | static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev) |
| 790 | { |
| 791 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 792 | const struct spmi_voltage_range *range; |
| 793 | u8 voltage_sel; |
| 794 | |
| 795 | spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); |
| 796 | |
| 797 | range = spmi_regulator_find_range(vreg); |
| 798 | if (!range) |
| 799 | return VOLTAGE_UNKNOWN; |
| 800 | |
| 801 | if (range->range_sel == 1) |
| 802 | voltage_sel &= ~ULT_SMPS_RANGE_SPLIT; |
| 803 | |
| 804 | return range->step_uV * voltage_sel + range->min_uV; |
| 805 | } |
| 806 | |
| 807 | static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, |
| 808 | unsigned selector) |
| 809 | { |
| 810 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 811 | int uV = 0; |
| 812 | int i; |
| 813 | |
| 814 | if (selector >= vreg->set_points->n_voltages) |
| 815 | return 0; |
| 816 | |
| 817 | for (i = 0; i < vreg->set_points->count; i++) { |
Stephen Boyd | 9b2dfee | 2015-06-16 11:11:22 -0700 | [diff] [blame] | 818 | if (selector < vreg->set_points->range[i].n_voltages) { |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 819 | uV = selector * vreg->set_points->range[i].step_uV |
| 820 | + vreg->set_points->range[i].set_point_min_uV; |
| 821 | break; |
Stephen Boyd | 9b2dfee | 2015-06-16 11:11:22 -0700 | [diff] [blame] | 822 | } |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 823 | |
| 824 | selector -= vreg->set_points->range[i].n_voltages; |
| 825 | } |
| 826 | |
| 827 | return uV; |
| 828 | } |
| 829 | |
| 830 | static int |
| 831 | spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable) |
| 832 | { |
| 833 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 834 | u8 mask = SPMI_COMMON_MODE_BYPASS_MASK; |
| 835 | u8 val = 0; |
| 836 | |
| 837 | if (enable) |
| 838 | val = mask; |
| 839 | |
| 840 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); |
| 841 | } |
| 842 | |
| 843 | static int |
| 844 | spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable) |
| 845 | { |
| 846 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 847 | u8 val; |
| 848 | int ret; |
| 849 | |
| 850 | ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1); |
| 851 | *enable = val & SPMI_COMMON_MODE_BYPASS_MASK; |
| 852 | |
| 853 | return ret; |
| 854 | } |
| 855 | |
| 856 | static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) |
| 857 | { |
| 858 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 859 | u8 reg; |
| 860 | |
| 861 | spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); |
| 862 | |
| 863 | if (reg & SPMI_COMMON_MODE_HPM_MASK) |
| 864 | return REGULATOR_MODE_NORMAL; |
| 865 | |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 866 | if (reg & SPMI_COMMON_MODE_AUTO_MASK) |
| 867 | return REGULATOR_MODE_FAST; |
| 868 | |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 869 | return REGULATOR_MODE_IDLE; |
| 870 | } |
| 871 | |
| 872 | static int |
| 873 | spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) |
| 874 | { |
| 875 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 876 | u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 877 | u8 val = 0; |
| 878 | |
| 879 | if (mode == REGULATOR_MODE_NORMAL) |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 880 | val = SPMI_COMMON_MODE_HPM_MASK; |
| 881 | else if (mode == REGULATOR_MODE_FAST) |
| 882 | val = SPMI_COMMON_MODE_AUTO_MASK; |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 883 | |
| 884 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); |
| 885 | } |
| 886 | |
| 887 | static int |
| 888 | spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) |
| 889 | { |
| 890 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 891 | unsigned int mode; |
| 892 | |
| 893 | if (load_uA >= vreg->hpm_min_load) |
| 894 | mode = REGULATOR_MODE_NORMAL; |
| 895 | else |
| 896 | mode = REGULATOR_MODE_IDLE; |
| 897 | |
| 898 | return spmi_regulator_common_set_mode(rdev, mode); |
| 899 | } |
| 900 | |
| 901 | static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev) |
| 902 | { |
| 903 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 904 | unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; |
| 905 | |
| 906 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN, |
| 907 | mask, mask); |
| 908 | } |
| 909 | |
| 910 | static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev) |
| 911 | { |
| 912 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 913 | unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK; |
| 914 | |
| 915 | return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START, |
| 916 | mask, mask); |
| 917 | } |
| 918 | |
| 919 | static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA) |
| 920 | { |
| 921 | struct spmi_regulator *vreg = rdev_get_drvdata(rdev); |
| 922 | enum spmi_regulator_logical_type type = vreg->logical_type; |
| 923 | unsigned int current_reg; |
| 924 | u8 reg; |
| 925 | u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK | |
| 926 | SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; |
| 927 | int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500; |
| 928 | |
| 929 | if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST) |
| 930 | current_reg = SPMI_BOOST_REG_CURRENT_LIMIT; |
| 931 | else |
| 932 | current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT; |
| 933 | |
| 934 | if (ilim_uA > max || ilim_uA <= 0) |
| 935 | return -EINVAL; |
| 936 | |
| 937 | reg = (ilim_uA - 1) / 500; |
| 938 | reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; |
| 939 | |
| 940 | return spmi_vreg_update_bits(vreg, current_reg, reg, mask); |
| 941 | } |
| 942 | |
| 943 | static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg) |
| 944 | { |
| 945 | int ret; |
| 946 | |
| 947 | ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, |
| 948 | SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK); |
| 949 | |
| 950 | vreg->vs_enable_time = ktime_get(); |
| 951 | |
| 952 | ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, |
| 953 | SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK); |
| 954 | |
| 955 | return ret; |
| 956 | } |
| 957 | |
| 958 | static void spmi_regulator_vs_ocp_work(struct work_struct *work) |
| 959 | { |
| 960 | struct delayed_work *dwork = to_delayed_work(work); |
| 961 | struct spmi_regulator *vreg |
| 962 | = container_of(dwork, struct spmi_regulator, ocp_work); |
| 963 | |
| 964 | spmi_regulator_vs_clear_ocp(vreg); |
| 965 | } |
| 966 | |
| 967 | static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data) |
| 968 | { |
| 969 | struct spmi_regulator *vreg = data; |
| 970 | ktime_t ocp_irq_time; |
| 971 | s64 ocp_trigger_delay_us; |
| 972 | |
| 973 | ocp_irq_time = ktime_get(); |
| 974 | ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time, |
| 975 | vreg->vs_enable_time); |
| 976 | |
| 977 | /* |
| 978 | * Reset the OCP count if there is a large delay between switch enable |
| 979 | * and when OCP triggers. This is indicative of a hotplug event as |
| 980 | * opposed to a fault. |
| 981 | */ |
| 982 | if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US) |
| 983 | vreg->ocp_count = 0; |
| 984 | |
| 985 | /* Wait for switch output to settle back to 0 V after OCP triggered. */ |
| 986 | udelay(SPMI_VS_OCP_FALL_DELAY_US); |
| 987 | |
| 988 | vreg->ocp_count++; |
| 989 | |
| 990 | if (vreg->ocp_count == 1) { |
| 991 | /* Immediately clear the over current condition. */ |
| 992 | spmi_regulator_vs_clear_ocp(vreg); |
| 993 | } else if (vreg->ocp_count <= vreg->ocp_max_retries) { |
| 994 | /* Schedule the over current clear task to run later. */ |
| 995 | schedule_delayed_work(&vreg->ocp_work, |
| 996 | msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1); |
| 997 | } else { |
| 998 | dev_err(vreg->dev, |
| 999 | "OCP triggered %d times; no further retries\n", |
| 1000 | vreg->ocp_count); |
| 1001 | } |
| 1002 | |
| 1003 | return IRQ_HANDLED; |
| 1004 | } |
| 1005 | |
| 1006 | static struct regulator_ops spmi_smps_ops = { |
| 1007 | .enable = spmi_regulator_common_enable, |
| 1008 | .disable = spmi_regulator_common_disable, |
| 1009 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1010 | .set_voltage = spmi_regulator_common_set_voltage, |
| 1011 | .get_voltage = spmi_regulator_common_get_voltage, |
| 1012 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1013 | .set_mode = spmi_regulator_common_set_mode, |
| 1014 | .get_mode = spmi_regulator_common_get_mode, |
| 1015 | .set_load = spmi_regulator_common_set_load, |
| 1016 | .set_pull_down = spmi_regulator_common_set_pull_down, |
| 1017 | }; |
| 1018 | |
| 1019 | static struct regulator_ops spmi_ldo_ops = { |
| 1020 | .enable = spmi_regulator_common_enable, |
| 1021 | .disable = spmi_regulator_common_disable, |
| 1022 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1023 | .set_voltage = spmi_regulator_common_set_voltage, |
| 1024 | .get_voltage = spmi_regulator_common_get_voltage, |
| 1025 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1026 | .set_mode = spmi_regulator_common_set_mode, |
| 1027 | .get_mode = spmi_regulator_common_get_mode, |
| 1028 | .set_load = spmi_regulator_common_set_load, |
| 1029 | .set_bypass = spmi_regulator_common_set_bypass, |
| 1030 | .get_bypass = spmi_regulator_common_get_bypass, |
| 1031 | .set_pull_down = spmi_regulator_common_set_pull_down, |
| 1032 | .set_soft_start = spmi_regulator_common_set_soft_start, |
| 1033 | }; |
| 1034 | |
| 1035 | static struct regulator_ops spmi_ln_ldo_ops = { |
| 1036 | .enable = spmi_regulator_common_enable, |
| 1037 | .disable = spmi_regulator_common_disable, |
| 1038 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1039 | .set_voltage = spmi_regulator_common_set_voltage, |
| 1040 | .get_voltage = spmi_regulator_common_get_voltage, |
| 1041 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1042 | .set_bypass = spmi_regulator_common_set_bypass, |
| 1043 | .get_bypass = spmi_regulator_common_get_bypass, |
| 1044 | }; |
| 1045 | |
| 1046 | static struct regulator_ops spmi_vs_ops = { |
| 1047 | .enable = spmi_regulator_vs_enable, |
| 1048 | .disable = spmi_regulator_common_disable, |
| 1049 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1050 | .set_pull_down = spmi_regulator_common_set_pull_down, |
| 1051 | .set_soft_start = spmi_regulator_common_set_soft_start, |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 1052 | .set_over_current_protection = spmi_regulator_vs_ocp, |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1053 | }; |
| 1054 | |
| 1055 | static struct regulator_ops spmi_boost_ops = { |
| 1056 | .enable = spmi_regulator_common_enable, |
| 1057 | .disable = spmi_regulator_common_disable, |
| 1058 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1059 | .set_voltage = spmi_regulator_single_range_set_voltage, |
| 1060 | .get_voltage = spmi_regulator_single_range_get_voltage, |
| 1061 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1062 | .set_input_current_limit = spmi_regulator_set_ilim, |
| 1063 | }; |
| 1064 | |
| 1065 | static struct regulator_ops spmi_ftsmps_ops = { |
| 1066 | .enable = spmi_regulator_common_enable, |
| 1067 | .disable = spmi_regulator_common_disable, |
| 1068 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1069 | .set_voltage = spmi_regulator_common_set_voltage, |
| 1070 | .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, |
| 1071 | .get_voltage = spmi_regulator_common_get_voltage, |
| 1072 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1073 | .set_mode = spmi_regulator_common_set_mode, |
| 1074 | .get_mode = spmi_regulator_common_get_mode, |
| 1075 | .set_load = spmi_regulator_common_set_load, |
| 1076 | .set_pull_down = spmi_regulator_common_set_pull_down, |
| 1077 | }; |
| 1078 | |
| 1079 | static struct regulator_ops spmi_ult_lo_smps_ops = { |
| 1080 | .enable = spmi_regulator_common_enable, |
| 1081 | .disable = spmi_regulator_common_disable, |
| 1082 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1083 | .set_voltage = spmi_regulator_ult_lo_smps_set_voltage, |
| 1084 | .get_voltage = spmi_regulator_ult_lo_smps_get_voltage, |
| 1085 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1086 | .set_mode = spmi_regulator_common_set_mode, |
| 1087 | .get_mode = spmi_regulator_common_get_mode, |
| 1088 | .set_load = spmi_regulator_common_set_load, |
| 1089 | .set_pull_down = spmi_regulator_common_set_pull_down, |
| 1090 | }; |
| 1091 | |
| 1092 | static struct regulator_ops spmi_ult_ho_smps_ops = { |
| 1093 | .enable = spmi_regulator_common_enable, |
| 1094 | .disable = spmi_regulator_common_disable, |
| 1095 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1096 | .set_voltage = spmi_regulator_single_range_set_voltage, |
| 1097 | .get_voltage = spmi_regulator_single_range_get_voltage, |
| 1098 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1099 | .set_mode = spmi_regulator_common_set_mode, |
| 1100 | .get_mode = spmi_regulator_common_get_mode, |
| 1101 | .set_load = spmi_regulator_common_set_load, |
| 1102 | .set_pull_down = spmi_regulator_common_set_pull_down, |
| 1103 | }; |
| 1104 | |
| 1105 | static struct regulator_ops spmi_ult_ldo_ops = { |
| 1106 | .enable = spmi_regulator_common_enable, |
| 1107 | .disable = spmi_regulator_common_disable, |
| 1108 | .is_enabled = spmi_regulator_common_is_enabled, |
| 1109 | .set_voltage = spmi_regulator_single_range_set_voltage, |
| 1110 | .get_voltage = spmi_regulator_single_range_get_voltage, |
| 1111 | .list_voltage = spmi_regulator_common_list_voltage, |
| 1112 | .set_mode = spmi_regulator_common_set_mode, |
| 1113 | .get_mode = spmi_regulator_common_get_mode, |
| 1114 | .set_load = spmi_regulator_common_set_load, |
| 1115 | .set_bypass = spmi_regulator_common_set_bypass, |
| 1116 | .get_bypass = spmi_regulator_common_get_bypass, |
| 1117 | .set_pull_down = spmi_regulator_common_set_pull_down, |
| 1118 | .set_soft_start = spmi_regulator_common_set_soft_start, |
| 1119 | }; |
| 1120 | |
| 1121 | /* Maximum possible digital major revision value */ |
| 1122 | #define INF 0xFF |
| 1123 | |
| 1124 | static const struct spmi_regulator_mapping supported_regulators[] = { |
| 1125 | /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ |
| 1126 | SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), |
| 1127 | SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), |
| 1128 | SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), |
| 1129 | SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), |
| 1130 | SPMI_VREG(LDO, N600, 1, INF, LDO, ldo, nldo3, 10000), |
| 1131 | SPMI_VREG(LDO, N1200, 1, INF, LDO, ldo, nldo3, 10000), |
| 1132 | SPMI_VREG(LDO, N600_ST, 0, 0, LDO, ldo, nldo2, 10000), |
| 1133 | SPMI_VREG(LDO, N1200_ST, 0, 0, LDO, ldo, nldo2, 10000), |
| 1134 | SPMI_VREG(LDO, N600_ST, 1, INF, LDO, ldo, nldo3, 10000), |
| 1135 | SPMI_VREG(LDO, N1200_ST, 1, INF, LDO, ldo, nldo3, 10000), |
| 1136 | SPMI_VREG(LDO, P50, 0, INF, LDO, ldo, pldo, 5000), |
| 1137 | SPMI_VREG(LDO, P150, 0, INF, LDO, ldo, pldo, 10000), |
| 1138 | SPMI_VREG(LDO, P300, 0, INF, LDO, ldo, pldo, 10000), |
| 1139 | SPMI_VREG(LDO, P600, 0, INF, LDO, ldo, pldo, 10000), |
| 1140 | SPMI_VREG(LDO, P1200, 0, INF, LDO, ldo, pldo, 10000), |
| 1141 | SPMI_VREG(LDO, LN, 0, INF, LN_LDO, ln_ldo, ln_ldo, 0), |
| 1142 | SPMI_VREG(LDO, LV_P50, 0, INF, LDO, ldo, pldo, 5000), |
| 1143 | SPMI_VREG(LDO, LV_P150, 0, INF, LDO, ldo, pldo, 10000), |
| 1144 | SPMI_VREG(LDO, LV_P300, 0, INF, LDO, ldo, pldo, 10000), |
| 1145 | SPMI_VREG(LDO, LV_P600, 0, INF, LDO, ldo, pldo, 10000), |
| 1146 | SPMI_VREG(LDO, LV_P1200, 0, INF, LDO, ldo, pldo, 10000), |
| 1147 | SPMI_VREG_VS(LV100, 0, INF), |
| 1148 | SPMI_VREG_VS(LV300, 0, INF), |
| 1149 | SPMI_VREG_VS(MV300, 0, INF), |
| 1150 | SPMI_VREG_VS(MV500, 0, INF), |
| 1151 | SPMI_VREG_VS(HDMI, 0, INF), |
| 1152 | SPMI_VREG_VS(OTG, 0, INF), |
| 1153 | SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0), |
| 1154 | SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000), |
| 1155 | SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000), |
| 1156 | SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0), |
| 1157 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps, |
| 1158 | ult_lo_smps, 100000), |
| 1159 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps, |
| 1160 | ult_lo_smps, 100000), |
| 1161 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps, |
| 1162 | ult_lo_smps, 100000), |
| 1163 | SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps, |
| 1164 | ult_ho_smps, 100000), |
| 1165 | SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), |
| 1166 | SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), |
| 1167 | SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), |
| 1168 | SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), |
| 1169 | SPMI_VREG(ULT_LDO, LV_P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), |
| 1170 | SPMI_VREG(ULT_LDO, LV_P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), |
| 1171 | SPMI_VREG(ULT_LDO, LV_P450, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), |
| 1172 | SPMI_VREG(ULT_LDO, P600, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), |
| 1173 | SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), |
| 1174 | SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000), |
| 1175 | }; |
| 1176 | |
| 1177 | static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points) |
| 1178 | { |
| 1179 | unsigned int n; |
| 1180 | struct spmi_voltage_range *range = points->range; |
| 1181 | |
| 1182 | for (; range < points->range + points->count; range++) { |
| 1183 | n = 0; |
| 1184 | if (range->set_point_max_uV) { |
| 1185 | n = range->set_point_max_uV - range->set_point_min_uV; |
Axel Lin | 419d06a | 2015-06-18 08:50:39 +0800 | [diff] [blame] | 1186 | n = (n / range->step_uV) + 1; |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1187 | } |
| 1188 | range->n_voltages = n; |
| 1189 | points->n_voltages += n; |
| 1190 | } |
| 1191 | } |
| 1192 | |
| 1193 | static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type) |
| 1194 | { |
| 1195 | const struct spmi_regulator_mapping *mapping; |
| 1196 | int ret, i; |
| 1197 | u32 dig_major_rev; |
| 1198 | u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1]; |
| 1199 | u8 type, subtype; |
| 1200 | |
| 1201 | ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version, |
| 1202 | ARRAY_SIZE(version)); |
| 1203 | if (ret) { |
| 1204 | dev_err(vreg->dev, "could not read version registers\n"); |
| 1205 | return ret; |
| 1206 | } |
| 1207 | dig_major_rev = version[SPMI_COMMON_REG_DIG_MAJOR_REV |
| 1208 | - SPMI_COMMON_REG_DIG_MAJOR_REV]; |
| 1209 | if (!force_type) { |
| 1210 | type = version[SPMI_COMMON_REG_TYPE - |
| 1211 | SPMI_COMMON_REG_DIG_MAJOR_REV]; |
| 1212 | subtype = version[SPMI_COMMON_REG_SUBTYPE - |
| 1213 | SPMI_COMMON_REG_DIG_MAJOR_REV]; |
| 1214 | } else { |
| 1215 | type = force_type >> 8; |
| 1216 | subtype = force_type; |
| 1217 | } |
| 1218 | |
| 1219 | for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) { |
| 1220 | mapping = &supported_regulators[i]; |
| 1221 | if (mapping->type == type && mapping->subtype == subtype |
| 1222 | && mapping->revision_min <= dig_major_rev |
| 1223 | && mapping->revision_max >= dig_major_rev) |
| 1224 | goto found; |
| 1225 | } |
| 1226 | |
| 1227 | dev_err(vreg->dev, |
| 1228 | "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n", |
| 1229 | vreg->desc.name, type, subtype, dig_major_rev); |
| 1230 | |
| 1231 | return -ENODEV; |
| 1232 | |
| 1233 | found: |
| 1234 | vreg->logical_type = mapping->logical_type; |
| 1235 | vreg->set_points = mapping->set_points; |
| 1236 | vreg->hpm_min_load = mapping->hpm_min_load; |
| 1237 | vreg->desc.ops = mapping->ops; |
| 1238 | |
| 1239 | if (mapping->set_points) { |
| 1240 | if (!mapping->set_points->n_voltages) |
| 1241 | spmi_calculate_num_voltages(mapping->set_points); |
| 1242 | vreg->desc.n_voltages = mapping->set_points->n_voltages; |
| 1243 | } |
| 1244 | |
| 1245 | return 0; |
| 1246 | } |
| 1247 | |
| 1248 | static int spmi_regulator_ftsmps_init_slew_rate(struct spmi_regulator *vreg) |
| 1249 | { |
| 1250 | int ret; |
| 1251 | u8 reg = 0; |
| 1252 | int step, delay, slew_rate; |
| 1253 | const struct spmi_voltage_range *range; |
| 1254 | |
| 1255 | ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); |
| 1256 | if (ret) { |
| 1257 | dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); |
| 1258 | return ret; |
| 1259 | } |
| 1260 | |
| 1261 | range = spmi_regulator_find_range(vreg); |
| 1262 | if (!range) |
| 1263 | return -EINVAL; |
| 1264 | |
| 1265 | step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK; |
| 1266 | step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT; |
| 1267 | |
| 1268 | delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK; |
| 1269 | delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT; |
| 1270 | |
| 1271 | /* slew_rate has units of uV/us */ |
| 1272 | slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step); |
| 1273 | slew_rate /= 1000 * (SPMI_FTSMPS_STEP_DELAY << delay); |
| 1274 | slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM; |
| 1275 | slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN; |
| 1276 | |
| 1277 | /* Ensure that the slew rate is greater than 0 */ |
| 1278 | vreg->slew_rate = max(slew_rate, 1); |
| 1279 | |
| 1280 | return ret; |
| 1281 | } |
| 1282 | |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 1283 | static int spmi_regulator_init_registers(struct spmi_regulator *vreg, |
| 1284 | const struct spmi_regulator_init_data *data) |
| 1285 | { |
| 1286 | int ret; |
| 1287 | enum spmi_regulator_logical_type type; |
| 1288 | u8 ctrl_reg[8], reg, mask; |
| 1289 | |
| 1290 | type = vreg->logical_type; |
| 1291 | |
| 1292 | ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); |
| 1293 | if (ret) |
| 1294 | return ret; |
| 1295 | |
| 1296 | /* Set up enable pin control. */ |
| 1297 | if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS |
| 1298 | || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO |
| 1299 | || type == SPMI_REGULATOR_LOGICAL_TYPE_VS) |
| 1300 | && !(data->pin_ctrl_enable |
| 1301 | & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) { |
| 1302 | ctrl_reg[SPMI_COMMON_IDX_ENABLE] &= |
| 1303 | ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; |
| 1304 | ctrl_reg[SPMI_COMMON_IDX_ENABLE] |= |
| 1305 | data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; |
| 1306 | } |
| 1307 | |
| 1308 | /* Set up mode pin control. */ |
| 1309 | if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS |
| 1310 | || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO) |
| 1311 | && !(data->pin_ctrl_hpm |
| 1312 | & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { |
| 1313 | ctrl_reg[SPMI_COMMON_IDX_MODE] &= |
| 1314 | ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK; |
| 1315 | ctrl_reg[SPMI_COMMON_IDX_MODE] |= |
| 1316 | data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK; |
| 1317 | } |
| 1318 | |
| 1319 | if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS |
| 1320 | && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { |
| 1321 | ctrl_reg[SPMI_COMMON_IDX_MODE] &= |
| 1322 | ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; |
| 1323 | ctrl_reg[SPMI_COMMON_IDX_MODE] |= |
| 1324 | data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; |
| 1325 | } |
| 1326 | |
| 1327 | if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS |
| 1328 | || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS |
| 1329 | || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO) |
| 1330 | && !(data->pin_ctrl_hpm |
| 1331 | & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { |
| 1332 | ctrl_reg[SPMI_COMMON_IDX_MODE] &= |
| 1333 | ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; |
| 1334 | ctrl_reg[SPMI_COMMON_IDX_MODE] |= |
| 1335 | data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; |
| 1336 | } |
| 1337 | |
| 1338 | /* Write back any control register values that were modified. */ |
| 1339 | ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); |
| 1340 | if (ret) |
| 1341 | return ret; |
| 1342 | |
| 1343 | /* Set soft start strength and over current protection for VS. */ |
| 1344 | if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) { |
| 1345 | if (data->vs_soft_start_strength |
| 1346 | != SPMI_VS_SOFT_START_STR_HW_DEFAULT) { |
| 1347 | reg = data->vs_soft_start_strength |
| 1348 | & SPMI_VS_SOFT_START_SEL_MASK; |
| 1349 | mask = SPMI_VS_SOFT_START_SEL_MASK; |
| 1350 | return spmi_vreg_update_bits(vreg, |
| 1351 | SPMI_VS_REG_SOFT_START, |
| 1352 | reg, mask); |
| 1353 | } |
| 1354 | } |
| 1355 | |
| 1356 | return 0; |
| 1357 | } |
| 1358 | |
| 1359 | static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg, |
| 1360 | struct device_node *node, struct spmi_regulator_init_data *data) |
| 1361 | { |
| 1362 | /* |
| 1363 | * Initialize configuration parameters to use hardware default in case |
| 1364 | * no value is specified via device tree. |
| 1365 | */ |
| 1366 | data->pin_ctrl_enable = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT; |
| 1367 | data->pin_ctrl_hpm = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT; |
| 1368 | data->vs_soft_start_strength = SPMI_VS_SOFT_START_STR_HW_DEFAULT; |
| 1369 | |
| 1370 | /* These bindings are optional, so it is okay if they aren't found. */ |
| 1371 | of_property_read_u32(node, "qcom,ocp-max-retries", |
| 1372 | &vreg->ocp_max_retries); |
| 1373 | of_property_read_u32(node, "qcom,ocp-retry-delay", |
| 1374 | &vreg->ocp_retry_delay_ms); |
| 1375 | of_property_read_u32(node, "qcom,pin-ctrl-enable", |
| 1376 | &data->pin_ctrl_enable); |
| 1377 | of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm); |
| 1378 | of_property_read_u32(node, "qcom,vs-soft-start-strength", |
| 1379 | &data->vs_soft_start_strength); |
| 1380 | } |
| 1381 | |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1382 | static unsigned int spmi_regulator_of_map_mode(unsigned int mode) |
| 1383 | { |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 1384 | if (mode == 1) |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1385 | return REGULATOR_MODE_NORMAL; |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 1386 | if (mode == 2) |
| 1387 | return REGULATOR_MODE_FAST; |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1388 | |
| 1389 | return REGULATOR_MODE_IDLE; |
| 1390 | } |
| 1391 | |
| 1392 | static int spmi_regulator_of_parse(struct device_node *node, |
| 1393 | const struct regulator_desc *desc, |
| 1394 | struct regulator_config *config) |
| 1395 | { |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 1396 | struct spmi_regulator_init_data data = { }; |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1397 | struct spmi_regulator *vreg = config->driver_data; |
| 1398 | struct device *dev = config->dev; |
| 1399 | int ret; |
| 1400 | |
Stephen Boyd | e2adfac | 2015-07-17 14:41:55 -0700 | [diff] [blame] | 1401 | spmi_regulator_get_dt_config(vreg, node, &data); |
| 1402 | |
| 1403 | if (!vreg->ocp_max_retries) |
| 1404 | vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES; |
| 1405 | if (!vreg->ocp_retry_delay_ms) |
| 1406 | vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS; |
| 1407 | |
| 1408 | ret = spmi_regulator_init_registers(vreg, &data); |
| 1409 | if (ret) { |
| 1410 | dev_err(dev, "common initialization failed, ret=%d\n", ret); |
| 1411 | return ret; |
| 1412 | } |
Stephen Boyd | e92a404 | 2015-06-12 15:47:10 -0700 | [diff] [blame] | 1413 | |
| 1414 | if (vreg->logical_type == SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS) { |
| 1415 | ret = spmi_regulator_ftsmps_init_slew_rate(vreg); |
| 1416 | if (ret) |
| 1417 | return ret; |
| 1418 | } |
| 1419 | |
| 1420 | if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS) |
| 1421 | vreg->ocp_irq = 0; |
| 1422 | |
| 1423 | if (vreg->ocp_irq) { |
| 1424 | ret = devm_request_irq(dev, vreg->ocp_irq, |
| 1425 | spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp", |
| 1426 | vreg); |
| 1427 | if (ret < 0) { |
| 1428 | dev_err(dev, "failed to request irq %d, ret=%d\n", |
| 1429 | vreg->ocp_irq, ret); |
| 1430 | return ret; |
| 1431 | } |
| 1432 | |
| 1433 | INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work); |
| 1434 | } |
| 1435 | |
| 1436 | return 0; |
| 1437 | } |
| 1438 | |
| 1439 | static const struct spmi_regulator_data pm8941_regulators[] = { |
| 1440 | { "s1", 0x1400, "vdd_s1", }, |
| 1441 | { "s2", 0x1700, "vdd_s2", }, |
| 1442 | { "s3", 0x1a00, "vdd_s3", }, |
| 1443 | { "l1", 0x4000, "vdd_l1_l3", }, |
| 1444 | { "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, |
| 1445 | { "l3", 0x4200, "vdd_l1_l3", }, |
| 1446 | { "l4", 0x4300, "vdd_l4_l11", }, |
| 1447 | { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, |
| 1448 | { "l6", 0x4500, "vdd_l6_l12_l14_l15", }, |
| 1449 | { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, |
| 1450 | { "l8", 0x4700, "vdd_l8_l16_l18_19", }, |
| 1451 | { "l9", 0x4800, "vdd_l9_l10_l17_l22", }, |
| 1452 | { "l10", 0x4900, "vdd_l9_l10_l17_l22", }, |
| 1453 | { "l11", 0x4a00, "vdd_l4_l11", }, |
| 1454 | { "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, |
| 1455 | { "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, |
| 1456 | { "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, |
| 1457 | { "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, |
| 1458 | { "l16", 0x4f00, "vdd_l8_l16_l18_19", }, |
| 1459 | { "l17", 0x5000, "vdd_l9_l10_l17_l22", }, |
| 1460 | { "l18", 0x5100, "vdd_l8_l16_l18_19", }, |
| 1461 | { "l19", 0x5200, "vdd_l8_l16_l18_19", }, |
| 1462 | { "l20", 0x5300, "vdd_l13_l20_l23_l24", }, |
| 1463 | { "l21", 0x5400, "vdd_l21", }, |
| 1464 | { "l22", 0x5500, "vdd_l9_l10_l17_l22", }, |
| 1465 | { "l23", 0x5600, "vdd_l13_l20_l23_l24", }, |
| 1466 | { "l24", 0x5700, "vdd_l13_l20_l23_l24", }, |
| 1467 | { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, |
| 1468 | { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, |
| 1469 | { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, |
| 1470 | { "mvs1", 0x8300, "vin_5vs", }, |
| 1471 | { "mvs2", 0x8400, "vin_5vs", }, |
| 1472 | { } |
| 1473 | }; |
| 1474 | |
| 1475 | static const struct spmi_regulator_data pm8841_regulators[] = { |
| 1476 | { "s1", 0x1400, "vdd_s1", }, |
| 1477 | { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 }, |
| 1478 | { "s3", 0x1a00, "vdd_s3", }, |
| 1479 | { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 }, |
| 1480 | { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 }, |
| 1481 | { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 }, |
| 1482 | { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 }, |
| 1483 | { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 }, |
| 1484 | { } |
| 1485 | }; |
| 1486 | |
| 1487 | static const struct spmi_regulator_data pm8916_regulators[] = { |
| 1488 | { "s1", 0x1400, "vdd_s1", }, |
| 1489 | { "s2", 0x1700, "vdd_s2", }, |
| 1490 | { "s3", 0x1a00, "vdd_s3", }, |
| 1491 | { "s4", 0x1d00, "vdd_s4", }, |
| 1492 | { "l1", 0x4000, "vdd_l1_l3", }, |
| 1493 | { "l2", 0x4100, "vdd_l2", }, |
| 1494 | { "l3", 0x4200, "vdd_l1_l3", }, |
| 1495 | { "l4", 0x4300, "vdd_l4_l5_l6", }, |
| 1496 | { "l5", 0x4400, "vdd_l4_l5_l6", }, |
| 1497 | { "l6", 0x4500, "vdd_l4_l5_l6", }, |
| 1498 | { "l7", 0x4600, "vdd_l7", }, |
| 1499 | { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", }, |
| 1500 | { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", }, |
| 1501 | { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", }, |
| 1502 | { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", }, |
| 1503 | { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", }, |
| 1504 | { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", }, |
| 1505 | { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", }, |
| 1506 | { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", }, |
| 1507 | { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", }, |
| 1508 | { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", }, |
| 1509 | { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", }, |
| 1510 | { } |
| 1511 | }; |
| 1512 | |
| 1513 | static const struct of_device_id qcom_spmi_regulator_match[] = { |
| 1514 | { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, |
| 1515 | { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators }, |
| 1516 | { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, |
| 1517 | { } |
| 1518 | }; |
| 1519 | MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); |
| 1520 | |
| 1521 | static int qcom_spmi_regulator_probe(struct platform_device *pdev) |
| 1522 | { |
| 1523 | const struct spmi_regulator_data *reg; |
| 1524 | const struct of_device_id *match; |
| 1525 | struct regulator_config config = { }; |
| 1526 | struct regulator_dev *rdev; |
| 1527 | struct spmi_regulator *vreg; |
| 1528 | struct regmap *regmap; |
| 1529 | const char *name; |
| 1530 | struct device *dev = &pdev->dev; |
| 1531 | int ret; |
| 1532 | struct list_head *vreg_list; |
| 1533 | |
| 1534 | vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL); |
| 1535 | if (!vreg_list) |
| 1536 | return -ENOMEM; |
| 1537 | INIT_LIST_HEAD(vreg_list); |
| 1538 | platform_set_drvdata(pdev, vreg_list); |
| 1539 | |
| 1540 | regmap = dev_get_regmap(dev->parent, NULL); |
| 1541 | if (!regmap) |
| 1542 | return -ENODEV; |
| 1543 | |
| 1544 | match = of_match_device(qcom_spmi_regulator_match, &pdev->dev); |
| 1545 | if (!match) |
| 1546 | return -ENODEV; |
| 1547 | |
| 1548 | for (reg = match->data; reg->name; reg++) { |
| 1549 | vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); |
| 1550 | if (!vreg) |
| 1551 | return -ENOMEM; |
| 1552 | |
| 1553 | vreg->dev = dev; |
| 1554 | vreg->base = reg->base; |
| 1555 | vreg->regmap = regmap; |
| 1556 | |
| 1557 | if (reg->ocp) { |
| 1558 | vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp); |
| 1559 | if (vreg->ocp_irq < 0) { |
| 1560 | ret = vreg->ocp_irq; |
| 1561 | goto err; |
| 1562 | } |
| 1563 | } |
| 1564 | |
| 1565 | vreg->desc.id = -1; |
| 1566 | vreg->desc.owner = THIS_MODULE; |
| 1567 | vreg->desc.type = REGULATOR_VOLTAGE; |
| 1568 | vreg->desc.name = name = reg->name; |
| 1569 | vreg->desc.supply_name = reg->supply; |
| 1570 | vreg->desc.of_match = reg->name; |
| 1571 | vreg->desc.of_parse_cb = spmi_regulator_of_parse; |
| 1572 | vreg->desc.of_map_mode = spmi_regulator_of_map_mode; |
| 1573 | |
| 1574 | ret = spmi_regulator_match(vreg, reg->force_type); |
| 1575 | if (ret) |
| 1576 | goto err; |
| 1577 | |
| 1578 | config.dev = dev; |
| 1579 | config.driver_data = vreg; |
| 1580 | rdev = devm_regulator_register(dev, &vreg->desc, &config); |
| 1581 | if (IS_ERR(rdev)) { |
| 1582 | dev_err(dev, "failed to register %s\n", name); |
| 1583 | ret = PTR_ERR(rdev); |
| 1584 | goto err; |
| 1585 | } |
| 1586 | |
| 1587 | INIT_LIST_HEAD(&vreg->node); |
| 1588 | list_add(&vreg->node, vreg_list); |
| 1589 | } |
| 1590 | |
| 1591 | return 0; |
| 1592 | |
| 1593 | err: |
| 1594 | list_for_each_entry(vreg, vreg_list, node) |
| 1595 | if (vreg->ocp_irq) |
| 1596 | cancel_delayed_work_sync(&vreg->ocp_work); |
| 1597 | return ret; |
| 1598 | } |
| 1599 | |
| 1600 | static int qcom_spmi_regulator_remove(struct platform_device *pdev) |
| 1601 | { |
| 1602 | struct spmi_regulator *vreg; |
| 1603 | struct list_head *vreg_list = platform_get_drvdata(pdev); |
| 1604 | |
| 1605 | list_for_each_entry(vreg, vreg_list, node) |
| 1606 | if (vreg->ocp_irq) |
| 1607 | cancel_delayed_work_sync(&vreg->ocp_work); |
| 1608 | |
| 1609 | return 0; |
| 1610 | } |
| 1611 | |
| 1612 | static struct platform_driver qcom_spmi_regulator_driver = { |
| 1613 | .driver = { |
| 1614 | .name = "qcom-spmi-regulator", |
| 1615 | .of_match_table = qcom_spmi_regulator_match, |
| 1616 | }, |
| 1617 | .probe = qcom_spmi_regulator_probe, |
| 1618 | .remove = qcom_spmi_regulator_remove, |
| 1619 | }; |
| 1620 | module_platform_driver(qcom_spmi_regulator_driver); |
| 1621 | |
| 1622 | MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver"); |
| 1623 | MODULE_LICENSE("GPL v2"); |
| 1624 | MODULE_ALIAS("platform:qcom-spmi-regulator"); |