Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-at91/at91cap9_devices.c |
| 3 | * |
| 4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> |
| 5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> |
| 6 | * Copyright (C) 2007 Atmel Corporation. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | */ |
| 14 | #include <asm/mach/arch.h> |
| 15 | #include <asm/mach/map.h> |
| 16 | |
| 17 | #include <linux/dma-mapping.h> |
| 18 | #include <linux/platform_device.h> |
Andrew Victor | 11aadac | 2008-04-15 21:16:38 +0100 | [diff] [blame] | 19 | #include <linux/i2c-gpio.h> |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 20 | |
| 21 | #include <video/atmel_lcdc.h> |
| 22 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 23 | #include <mach/board.h> |
| 24 | #include <mach/gpio.h> |
| 25 | #include <mach/at91cap9.h> |
| 26 | #include <mach/at91cap9_matrix.h> |
| 27 | #include <mach/at91sam9_smc.h> |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 28 | |
| 29 | #include "generic.h" |
| 30 | |
| 31 | |
| 32 | /* -------------------------------------------------------------------- |
| 33 | * USB Host |
| 34 | * -------------------------------------------------------------------- */ |
| 35 | |
| 36 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
| 37 | static u64 ohci_dmamask = DMA_BIT_MASK(32); |
| 38 | static struct at91_usbh_data usbh_data; |
| 39 | |
| 40 | static struct resource usbh_resources[] = { |
| 41 | [0] = { |
| 42 | .start = AT91CAP9_UHP_BASE, |
| 43 | .end = AT91CAP9_UHP_BASE + SZ_1M - 1, |
| 44 | .flags = IORESOURCE_MEM, |
| 45 | }, |
| 46 | [1] = { |
| 47 | .start = AT91CAP9_ID_UHP, |
| 48 | .end = AT91CAP9_ID_UHP, |
| 49 | .flags = IORESOURCE_IRQ, |
| 50 | }, |
| 51 | }; |
| 52 | |
| 53 | static struct platform_device at91_usbh_device = { |
| 54 | .name = "at91_ohci", |
| 55 | .id = -1, |
| 56 | .dev = { |
| 57 | .dma_mask = &ohci_dmamask, |
| 58 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 59 | .platform_data = &usbh_data, |
| 60 | }, |
| 61 | .resource = usbh_resources, |
| 62 | .num_resources = ARRAY_SIZE(usbh_resources), |
| 63 | }; |
| 64 | |
| 65 | void __init at91_add_device_usbh(struct at91_usbh_data *data) |
| 66 | { |
| 67 | int i; |
| 68 | |
| 69 | if (!data) |
| 70 | return; |
| 71 | |
| 72 | /* Enable VBus control for UHP ports */ |
| 73 | for (i = 0; i < data->ports; i++) { |
| 74 | if (data->vbus_pin[i]) |
| 75 | at91_set_gpio_output(data->vbus_pin[i], 0); |
| 76 | } |
| 77 | |
| 78 | usbh_data = *data; |
| 79 | platform_device_register(&at91_usbh_device); |
| 80 | } |
| 81 | #else |
| 82 | void __init at91_add_device_usbh(struct at91_usbh_data *data) {} |
| 83 | #endif |
| 84 | |
| 85 | |
| 86 | /* -------------------------------------------------------------------- |
Stelian Pop | 7c8cf66 | 2008-04-05 21:15:25 +0100 | [diff] [blame] | 87 | * USB HS Device (Gadget) |
| 88 | * -------------------------------------------------------------------- */ |
| 89 | |
| 90 | #if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) |
| 91 | |
| 92 | static struct resource usba_udc_resources[] = { |
| 93 | [0] = { |
| 94 | .start = AT91CAP9_UDPHS_FIFO, |
| 95 | .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1, |
| 96 | .flags = IORESOURCE_MEM, |
| 97 | }, |
| 98 | [1] = { |
| 99 | .start = AT91CAP9_BASE_UDPHS, |
| 100 | .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1, |
| 101 | .flags = IORESOURCE_MEM, |
| 102 | }, |
| 103 | [2] = { |
| 104 | .start = AT91CAP9_ID_UDPHS, |
| 105 | .end = AT91CAP9_ID_UDPHS, |
| 106 | .flags = IORESOURCE_IRQ, |
| 107 | }, |
| 108 | }; |
| 109 | |
| 110 | #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ |
| 111 | [idx] = { \ |
| 112 | .name = nam, \ |
| 113 | .index = idx, \ |
| 114 | .fifo_size = maxpkt, \ |
| 115 | .nr_banks = maxbk, \ |
| 116 | .can_dma = dma, \ |
| 117 | .can_isoc = isoc, \ |
| 118 | } |
| 119 | |
| 120 | static struct usba_ep_data usba_udc_ep[] = { |
| 121 | EP("ep0", 0, 64, 1, 0, 0), |
| 122 | EP("ep1", 1, 1024, 3, 1, 1), |
| 123 | EP("ep2", 2, 1024, 3, 1, 1), |
| 124 | EP("ep3", 3, 1024, 2, 1, 1), |
| 125 | EP("ep4", 4, 1024, 2, 1, 1), |
| 126 | EP("ep5", 5, 1024, 2, 1, 0), |
| 127 | EP("ep6", 6, 1024, 2, 1, 0), |
| 128 | EP("ep7", 7, 1024, 2, 0, 0), |
| 129 | }; |
| 130 | |
| 131 | #undef EP |
| 132 | |
| 133 | /* |
| 134 | * pdata doesn't have room for any endpoints, so we need to |
| 135 | * append room for the ones we need right after it. |
| 136 | */ |
| 137 | static struct { |
| 138 | struct usba_platform_data pdata; |
| 139 | struct usba_ep_data ep[8]; |
| 140 | } usba_udc_data; |
| 141 | |
| 142 | static struct platform_device at91_usba_udc_device = { |
| 143 | .name = "atmel_usba_udc", |
| 144 | .id = -1, |
| 145 | .dev = { |
| 146 | .platform_data = &usba_udc_data.pdata, |
| 147 | }, |
| 148 | .resource = usba_udc_resources, |
| 149 | .num_resources = ARRAY_SIZE(usba_udc_resources), |
| 150 | }; |
| 151 | |
| 152 | void __init at91_add_device_usba(struct usba_platform_data *data) |
| 153 | { |
| 154 | at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | |
| 155 | AT91_MATRIX_UDPHS_BYPASS_LOCK); |
| 156 | |
| 157 | /* |
| 158 | * Invalid pins are 0 on AT91, but the usba driver is shared |
| 159 | * with AVR32, which use negative values instead. Once/if |
| 160 | * gpio_is_valid() is ported to AT91, revisit this code. |
| 161 | */ |
| 162 | usba_udc_data.pdata.vbus_pin = -EINVAL; |
| 163 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
| 164 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));; |
| 165 | |
| 166 | if (data && data->vbus_pin > 0) { |
| 167 | at91_set_gpio_input(data->vbus_pin, 0); |
| 168 | at91_set_deglitch(data->vbus_pin, 1); |
| 169 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
| 170 | } |
| 171 | |
| 172 | /* Pullup pin is handled internally by USB device peripheral */ |
| 173 | |
| 174 | /* Clocks */ |
| 175 | at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk"); |
| 176 | at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk"); |
| 177 | |
| 178 | platform_device_register(&at91_usba_udc_device); |
| 179 | } |
| 180 | #else |
| 181 | void __init at91_add_device_usba(struct usba_platform_data *data) {} |
| 182 | #endif |
| 183 | |
| 184 | |
| 185 | /* -------------------------------------------------------------------- |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 186 | * Ethernet |
| 187 | * -------------------------------------------------------------------- */ |
| 188 | |
| 189 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
| 190 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
| 191 | static struct at91_eth_data eth_data; |
| 192 | |
| 193 | static struct resource eth_resources[] = { |
| 194 | [0] = { |
| 195 | .start = AT91CAP9_BASE_EMAC, |
| 196 | .end = AT91CAP9_BASE_EMAC + SZ_16K - 1, |
| 197 | .flags = IORESOURCE_MEM, |
| 198 | }, |
| 199 | [1] = { |
| 200 | .start = AT91CAP9_ID_EMAC, |
| 201 | .end = AT91CAP9_ID_EMAC, |
| 202 | .flags = IORESOURCE_IRQ, |
| 203 | }, |
| 204 | }; |
| 205 | |
| 206 | static struct platform_device at91cap9_eth_device = { |
| 207 | .name = "macb", |
| 208 | .id = -1, |
| 209 | .dev = { |
| 210 | .dma_mask = ð_dmamask, |
| 211 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 212 | .platform_data = ð_data, |
| 213 | }, |
| 214 | .resource = eth_resources, |
| 215 | .num_resources = ARRAY_SIZE(eth_resources), |
| 216 | }; |
| 217 | |
| 218 | void __init at91_add_device_eth(struct at91_eth_data *data) |
| 219 | { |
| 220 | if (!data) |
| 221 | return; |
| 222 | |
| 223 | if (data->phy_irq_pin) { |
| 224 | at91_set_gpio_input(data->phy_irq_pin, 0); |
| 225 | at91_set_deglitch(data->phy_irq_pin, 1); |
| 226 | } |
| 227 | |
| 228 | /* Pins used for MII and RMII */ |
| 229 | at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ |
| 230 | at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ |
| 231 | at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ |
| 232 | at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ |
| 233 | at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ |
| 234 | at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ |
| 235 | at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ |
| 236 | at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ |
| 237 | at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ |
| 238 | at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ |
| 239 | |
| 240 | if (!data->is_rmii) { |
| 241 | at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ |
| 242 | at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ |
| 243 | at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ |
| 244 | at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ |
| 245 | at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ |
| 246 | at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ |
| 247 | at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ |
| 248 | at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ |
| 249 | } |
| 250 | |
| 251 | eth_data = *data; |
| 252 | platform_device_register(&at91cap9_eth_device); |
| 253 | } |
| 254 | #else |
| 255 | void __init at91_add_device_eth(struct at91_eth_data *data) {} |
| 256 | #endif |
| 257 | |
| 258 | |
| 259 | /* -------------------------------------------------------------------- |
| 260 | * MMC / SD |
| 261 | * -------------------------------------------------------------------- */ |
| 262 | |
| 263 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) |
| 264 | static u64 mmc_dmamask = DMA_BIT_MASK(32); |
| 265 | static struct at91_mmc_data mmc0_data, mmc1_data; |
| 266 | |
| 267 | static struct resource mmc0_resources[] = { |
| 268 | [0] = { |
| 269 | .start = AT91CAP9_BASE_MCI0, |
| 270 | .end = AT91CAP9_BASE_MCI0 + SZ_16K - 1, |
| 271 | .flags = IORESOURCE_MEM, |
| 272 | }, |
| 273 | [1] = { |
| 274 | .start = AT91CAP9_ID_MCI0, |
| 275 | .end = AT91CAP9_ID_MCI0, |
| 276 | .flags = IORESOURCE_IRQ, |
| 277 | }, |
| 278 | }; |
| 279 | |
| 280 | static struct platform_device at91cap9_mmc0_device = { |
| 281 | .name = "at91_mci", |
| 282 | .id = 0, |
| 283 | .dev = { |
| 284 | .dma_mask = &mmc_dmamask, |
| 285 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 286 | .platform_data = &mmc0_data, |
| 287 | }, |
| 288 | .resource = mmc0_resources, |
| 289 | .num_resources = ARRAY_SIZE(mmc0_resources), |
| 290 | }; |
| 291 | |
| 292 | static struct resource mmc1_resources[] = { |
| 293 | [0] = { |
| 294 | .start = AT91CAP9_BASE_MCI1, |
| 295 | .end = AT91CAP9_BASE_MCI1 + SZ_16K - 1, |
| 296 | .flags = IORESOURCE_MEM, |
| 297 | }, |
| 298 | [1] = { |
| 299 | .start = AT91CAP9_ID_MCI1, |
| 300 | .end = AT91CAP9_ID_MCI1, |
| 301 | .flags = IORESOURCE_IRQ, |
| 302 | }, |
| 303 | }; |
| 304 | |
| 305 | static struct platform_device at91cap9_mmc1_device = { |
| 306 | .name = "at91_mci", |
| 307 | .id = 1, |
| 308 | .dev = { |
| 309 | .dma_mask = &mmc_dmamask, |
| 310 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 311 | .platform_data = &mmc1_data, |
| 312 | }, |
| 313 | .resource = mmc1_resources, |
| 314 | .num_resources = ARRAY_SIZE(mmc1_resources), |
| 315 | }; |
| 316 | |
| 317 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) |
| 318 | { |
| 319 | if (!data) |
| 320 | return; |
| 321 | |
| 322 | /* input/irq */ |
| 323 | if (data->det_pin) { |
| 324 | at91_set_gpio_input(data->det_pin, 1); |
| 325 | at91_set_deglitch(data->det_pin, 1); |
| 326 | } |
| 327 | if (data->wp_pin) |
| 328 | at91_set_gpio_input(data->wp_pin, 1); |
| 329 | if (data->vcc_pin) |
| 330 | at91_set_gpio_output(data->vcc_pin, 0); |
| 331 | |
| 332 | if (mmc_id == 0) { /* MCI0 */ |
| 333 | /* CLK */ |
| 334 | at91_set_A_periph(AT91_PIN_PA2, 0); |
| 335 | |
| 336 | /* CMD */ |
| 337 | at91_set_A_periph(AT91_PIN_PA1, 1); |
| 338 | |
| 339 | /* DAT0, maybe DAT1..DAT3 */ |
| 340 | at91_set_A_periph(AT91_PIN_PA0, 1); |
| 341 | if (data->wire4) { |
| 342 | at91_set_A_periph(AT91_PIN_PA3, 1); |
| 343 | at91_set_A_periph(AT91_PIN_PA4, 1); |
| 344 | at91_set_A_periph(AT91_PIN_PA5, 1); |
| 345 | } |
| 346 | |
| 347 | mmc0_data = *data; |
Nicolas Ferre | fb8b131 | 2008-04-22 13:54:52 +0100 | [diff] [blame] | 348 | at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk"); |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 349 | platform_device_register(&at91cap9_mmc0_device); |
| 350 | } else { /* MCI1 */ |
| 351 | /* CLK */ |
| 352 | at91_set_A_periph(AT91_PIN_PA16, 0); |
| 353 | |
| 354 | /* CMD */ |
| 355 | at91_set_A_periph(AT91_PIN_PA17, 1); |
| 356 | |
| 357 | /* DAT0, maybe DAT1..DAT3 */ |
| 358 | at91_set_A_periph(AT91_PIN_PA18, 1); |
| 359 | if (data->wire4) { |
| 360 | at91_set_A_periph(AT91_PIN_PA19, 1); |
| 361 | at91_set_A_periph(AT91_PIN_PA20, 1); |
| 362 | at91_set_A_periph(AT91_PIN_PA21, 1); |
| 363 | } |
| 364 | |
| 365 | mmc1_data = *data; |
| 366 | at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk"); |
| 367 | platform_device_register(&at91cap9_mmc1_device); |
| 368 | } |
| 369 | } |
| 370 | #else |
| 371 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} |
| 372 | #endif |
| 373 | |
| 374 | |
| 375 | /* -------------------------------------------------------------------- |
| 376 | * NAND / SmartMedia |
| 377 | * -------------------------------------------------------------------- */ |
| 378 | |
Pieter du Preez | f6ed6f7 | 2008-08-01 10:06:40 +0100 | [diff] [blame] | 379 | #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE) |
HÃ¥vard Skinnemoen | 3c3796c | 2008-06-06 18:04:53 +0200 | [diff] [blame] | 380 | static struct atmel_nand_data nand_data; |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 381 | |
| 382 | #define NAND_BASE AT91_CHIPSELECT_3 |
| 383 | |
| 384 | static struct resource nand_resources[] = { |
Andrew Victor | d7a2415 | 2008-04-02 21:44:44 +0100 | [diff] [blame] | 385 | [0] = { |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 386 | .start = NAND_BASE, |
| 387 | .end = NAND_BASE + SZ_256M - 1, |
| 388 | .flags = IORESOURCE_MEM, |
Andrew Victor | d7a2415 | 2008-04-02 21:44:44 +0100 | [diff] [blame] | 389 | }, |
| 390 | [1] = { |
| 391 | .start = AT91_BASE_SYS + AT91_ECC, |
| 392 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, |
| 393 | .flags = IORESOURCE_MEM, |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 394 | } |
| 395 | }; |
| 396 | |
| 397 | static struct platform_device at91cap9_nand_device = { |
HÃ¥vard Skinnemoen | 3c3796c | 2008-06-06 18:04:53 +0200 | [diff] [blame] | 398 | .name = "atmel_nand", |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 399 | .id = -1, |
| 400 | .dev = { |
| 401 | .platform_data = &nand_data, |
| 402 | }, |
| 403 | .resource = nand_resources, |
| 404 | .num_resources = ARRAY_SIZE(nand_resources), |
| 405 | }; |
| 406 | |
HÃ¥vard Skinnemoen | 3c3796c | 2008-06-06 18:04:53 +0200 | [diff] [blame] | 407 | void __init at91_add_device_nand(struct atmel_nand_data *data) |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 408 | { |
Andrew Victor | 461d3b4 | 2008-10-06 20:01:00 +0100 | [diff] [blame^] | 409 | unsigned long csa; |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 410 | |
| 411 | if (!data) |
| 412 | return; |
| 413 | |
| 414 | csa = at91_sys_read(AT91_MATRIX_EBICSA); |
Andrew Victor | 461d3b4 | 2008-10-06 20:01:00 +0100 | [diff] [blame^] | 415 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 416 | |
| 417 | /* enable pin */ |
| 418 | if (data->enable_pin) |
| 419 | at91_set_gpio_output(data->enable_pin, 1); |
| 420 | |
| 421 | /* ready/busy pin */ |
| 422 | if (data->rdy_pin) |
| 423 | at91_set_gpio_input(data->rdy_pin, 1); |
| 424 | |
| 425 | /* card detect pin */ |
| 426 | if (data->det_pin) |
| 427 | at91_set_gpio_input(data->det_pin, 1); |
| 428 | |
| 429 | nand_data = *data; |
| 430 | platform_device_register(&at91cap9_nand_device); |
| 431 | } |
| 432 | #else |
HÃ¥vard Skinnemoen | 3c3796c | 2008-06-06 18:04:53 +0200 | [diff] [blame] | 433 | void __init at91_add_device_nand(struct atmel_nand_data *data) {} |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 434 | #endif |
| 435 | |
Andrew Victor | 11aadac | 2008-04-15 21:16:38 +0100 | [diff] [blame] | 436 | |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 437 | /* -------------------------------------------------------------------- |
| 438 | * TWI (i2c) |
| 439 | * -------------------------------------------------------------------- */ |
| 440 | |
| 441 | /* |
| 442 | * Prefer the GPIO code since the TWI controller isn't robust |
| 443 | * (gets overruns and underruns under load) and can only issue |
| 444 | * repeated STARTs in one scenario (the driver doesn't yet handle them). |
| 445 | */ |
| 446 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) |
| 447 | |
| 448 | static struct i2c_gpio_platform_data pdata = { |
| 449 | .sda_pin = AT91_PIN_PB4, |
| 450 | .sda_is_open_drain = 1, |
| 451 | .scl_pin = AT91_PIN_PB5, |
| 452 | .scl_is_open_drain = 1, |
| 453 | .udelay = 2, /* ~100 kHz */ |
| 454 | }; |
| 455 | |
| 456 | static struct platform_device at91cap9_twi_device = { |
| 457 | .name = "i2c-gpio", |
| 458 | .id = -1, |
| 459 | .dev.platform_data = &pdata, |
| 460 | }; |
| 461 | |
| 462 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) |
| 463 | { |
| 464 | at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */ |
| 465 | at91_set_multi_drive(AT91_PIN_PB4, 1); |
| 466 | |
| 467 | at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */ |
| 468 | at91_set_multi_drive(AT91_PIN_PB5, 1); |
| 469 | |
| 470 | i2c_register_board_info(0, devices, nr_devices); |
| 471 | platform_device_register(&at91cap9_twi_device); |
| 472 | } |
| 473 | |
| 474 | #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) |
| 475 | |
| 476 | static struct resource twi_resources[] = { |
| 477 | [0] = { |
| 478 | .start = AT91CAP9_BASE_TWI, |
| 479 | .end = AT91CAP9_BASE_TWI + SZ_16K - 1, |
| 480 | .flags = IORESOURCE_MEM, |
| 481 | }, |
| 482 | [1] = { |
| 483 | .start = AT91CAP9_ID_TWI, |
| 484 | .end = AT91CAP9_ID_TWI, |
| 485 | .flags = IORESOURCE_IRQ, |
| 486 | }, |
| 487 | }; |
| 488 | |
| 489 | static struct platform_device at91cap9_twi_device = { |
| 490 | .name = "at91_i2c", |
| 491 | .id = -1, |
| 492 | .resource = twi_resources, |
| 493 | .num_resources = ARRAY_SIZE(twi_resources), |
| 494 | }; |
| 495 | |
| 496 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) |
| 497 | { |
| 498 | /* pins used for TWI interface */ |
| 499 | at91_set_B_periph(AT91_PIN_PB4, 0); /* TWD */ |
| 500 | at91_set_multi_drive(AT91_PIN_PB4, 1); |
| 501 | |
| 502 | at91_set_B_periph(AT91_PIN_PB5, 0); /* TWCK */ |
| 503 | at91_set_multi_drive(AT91_PIN_PB5, 1); |
| 504 | |
| 505 | i2c_register_board_info(0, devices, nr_devices); |
| 506 | platform_device_register(&at91cap9_twi_device); |
| 507 | } |
| 508 | #else |
| 509 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} |
| 510 | #endif |
| 511 | |
| 512 | /* -------------------------------------------------------------------- |
| 513 | * SPI |
| 514 | * -------------------------------------------------------------------- */ |
| 515 | |
| 516 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
| 517 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
| 518 | |
| 519 | static struct resource spi0_resources[] = { |
| 520 | [0] = { |
| 521 | .start = AT91CAP9_BASE_SPI0, |
| 522 | .end = AT91CAP9_BASE_SPI0 + SZ_16K - 1, |
| 523 | .flags = IORESOURCE_MEM, |
| 524 | }, |
| 525 | [1] = { |
| 526 | .start = AT91CAP9_ID_SPI0, |
| 527 | .end = AT91CAP9_ID_SPI0, |
| 528 | .flags = IORESOURCE_IRQ, |
| 529 | }, |
| 530 | }; |
| 531 | |
| 532 | static struct platform_device at91cap9_spi0_device = { |
| 533 | .name = "atmel_spi", |
| 534 | .id = 0, |
| 535 | .dev = { |
| 536 | .dma_mask = &spi_dmamask, |
| 537 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 538 | }, |
| 539 | .resource = spi0_resources, |
| 540 | .num_resources = ARRAY_SIZE(spi0_resources), |
| 541 | }; |
| 542 | |
| 543 | static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 }; |
| 544 | |
| 545 | static struct resource spi1_resources[] = { |
| 546 | [0] = { |
| 547 | .start = AT91CAP9_BASE_SPI1, |
| 548 | .end = AT91CAP9_BASE_SPI1 + SZ_16K - 1, |
| 549 | .flags = IORESOURCE_MEM, |
| 550 | }, |
| 551 | [1] = { |
| 552 | .start = AT91CAP9_ID_SPI1, |
| 553 | .end = AT91CAP9_ID_SPI1, |
| 554 | .flags = IORESOURCE_IRQ, |
| 555 | }, |
| 556 | }; |
| 557 | |
| 558 | static struct platform_device at91cap9_spi1_device = { |
| 559 | .name = "atmel_spi", |
| 560 | .id = 1, |
| 561 | .dev = { |
| 562 | .dma_mask = &spi_dmamask, |
| 563 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 564 | }, |
| 565 | .resource = spi1_resources, |
| 566 | .num_resources = ARRAY_SIZE(spi1_resources), |
| 567 | }; |
| 568 | |
| 569 | static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 }; |
| 570 | |
| 571 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) |
| 572 | { |
| 573 | int i; |
| 574 | unsigned long cs_pin; |
| 575 | short enable_spi0 = 0; |
| 576 | short enable_spi1 = 0; |
| 577 | |
| 578 | /* Choose SPI chip-selects */ |
| 579 | for (i = 0; i < nr_devices; i++) { |
| 580 | if (devices[i].controller_data) |
| 581 | cs_pin = (unsigned long) devices[i].controller_data; |
| 582 | else if (devices[i].bus_num == 0) |
| 583 | cs_pin = spi0_standard_cs[devices[i].chip_select]; |
| 584 | else |
| 585 | cs_pin = spi1_standard_cs[devices[i].chip_select]; |
| 586 | |
| 587 | if (devices[i].bus_num == 0) |
| 588 | enable_spi0 = 1; |
| 589 | else |
| 590 | enable_spi1 = 1; |
| 591 | |
| 592 | /* enable chip-select pin */ |
| 593 | at91_set_gpio_output(cs_pin, 1); |
| 594 | |
| 595 | /* pass chip-select pin to driver */ |
| 596 | devices[i].controller_data = (void *) cs_pin; |
| 597 | } |
| 598 | |
| 599 | spi_register_board_info(devices, nr_devices); |
| 600 | |
| 601 | /* Configure SPI bus(es) */ |
| 602 | if (enable_spi0) { |
| 603 | at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ |
| 604 | at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
| 605 | at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
| 606 | |
| 607 | at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk"); |
| 608 | platform_device_register(&at91cap9_spi0_device); |
| 609 | } |
| 610 | if (enable_spi1) { |
| 611 | at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ |
| 612 | at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ |
| 613 | at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ |
| 614 | |
| 615 | at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk"); |
| 616 | platform_device_register(&at91cap9_spi1_device); |
| 617 | } |
| 618 | } |
| 619 | #else |
| 620 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} |
| 621 | #endif |
| 622 | |
| 623 | |
| 624 | /* -------------------------------------------------------------------- |
Andrew Victor | e5f40bf | 2008-04-02 21:58:00 +0100 | [diff] [blame] | 625 | * Timer/Counter block |
| 626 | * -------------------------------------------------------------------- */ |
| 627 | |
| 628 | #ifdef CONFIG_ATMEL_TCLIB |
| 629 | |
| 630 | static struct resource tcb_resources[] = { |
| 631 | [0] = { |
| 632 | .start = AT91CAP9_BASE_TCB0, |
| 633 | .end = AT91CAP9_BASE_TCB0 + SZ_16K - 1, |
| 634 | .flags = IORESOURCE_MEM, |
| 635 | }, |
| 636 | [1] = { |
| 637 | .start = AT91CAP9_ID_TCB, |
| 638 | .end = AT91CAP9_ID_TCB, |
| 639 | .flags = IORESOURCE_IRQ, |
| 640 | }, |
| 641 | }; |
| 642 | |
| 643 | static struct platform_device at91cap9_tcb_device = { |
| 644 | .name = "atmel_tcb", |
| 645 | .id = 0, |
| 646 | .resource = tcb_resources, |
| 647 | .num_resources = ARRAY_SIZE(tcb_resources), |
| 648 | }; |
| 649 | |
| 650 | static void __init at91_add_device_tc(void) |
| 651 | { |
| 652 | /* this chip has one clock and irq for all three TC channels */ |
| 653 | at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk"); |
| 654 | platform_device_register(&at91cap9_tcb_device); |
| 655 | } |
| 656 | #else |
| 657 | static void __init at91_add_device_tc(void) { } |
| 658 | #endif |
| 659 | |
| 660 | |
| 661 | /* -------------------------------------------------------------------- |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 662 | * RTT |
| 663 | * -------------------------------------------------------------------- */ |
| 664 | |
Andrew Victor | 4fd9212 | 2008-04-02 21:55:19 +0100 | [diff] [blame] | 665 | static struct resource rtt_resources[] = { |
| 666 | { |
| 667 | .start = AT91_BASE_SYS + AT91_RTT, |
| 668 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, |
| 669 | .flags = IORESOURCE_MEM, |
| 670 | } |
| 671 | }; |
| 672 | |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 673 | static struct platform_device at91cap9_rtt_device = { |
| 674 | .name = "at91_rtt", |
Andrew Victor | 4fd9212 | 2008-04-02 21:55:19 +0100 | [diff] [blame] | 675 | .id = 0, |
| 676 | .resource = rtt_resources, |
| 677 | .num_resources = ARRAY_SIZE(rtt_resources), |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 678 | }; |
| 679 | |
| 680 | static void __init at91_add_device_rtt(void) |
| 681 | { |
| 682 | platform_device_register(&at91cap9_rtt_device); |
| 683 | } |
| 684 | |
| 685 | |
| 686 | /* -------------------------------------------------------------------- |
| 687 | * Watchdog |
| 688 | * -------------------------------------------------------------------- */ |
| 689 | |
| 690 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) |
| 691 | static struct platform_device at91cap9_wdt_device = { |
| 692 | .name = "at91_wdt", |
| 693 | .id = -1, |
| 694 | .num_resources = 0, |
| 695 | }; |
| 696 | |
| 697 | static void __init at91_add_device_watchdog(void) |
| 698 | { |
| 699 | platform_device_register(&at91cap9_wdt_device); |
| 700 | } |
| 701 | #else |
| 702 | static void __init at91_add_device_watchdog(void) {} |
| 703 | #endif |
| 704 | |
| 705 | |
| 706 | /* -------------------------------------------------------------------- |
Andrew Victor | bb1ad68 | 2008-09-18 19:42:37 +0100 | [diff] [blame] | 707 | * PWM |
| 708 | * --------------------------------------------------------------------*/ |
| 709 | |
| 710 | #if defined(CONFIG_ATMEL_PWM) |
| 711 | static u32 pwm_mask; |
| 712 | |
| 713 | static struct resource pwm_resources[] = { |
| 714 | [0] = { |
| 715 | .start = AT91CAP9_BASE_PWMC, |
| 716 | .end = AT91CAP9_BASE_PWMC + SZ_16K - 1, |
| 717 | .flags = IORESOURCE_MEM, |
| 718 | }, |
| 719 | [1] = { |
| 720 | .start = AT91CAP9_ID_PWMC, |
| 721 | .end = AT91CAP9_ID_PWMC, |
| 722 | .flags = IORESOURCE_IRQ, |
| 723 | }, |
| 724 | }; |
| 725 | |
| 726 | static struct platform_device at91cap9_pwm0_device = { |
| 727 | .name = "atmel_pwm", |
| 728 | .id = -1, |
| 729 | .dev = { |
| 730 | .platform_data = &pwm_mask, |
| 731 | }, |
| 732 | .resource = pwm_resources, |
| 733 | .num_resources = ARRAY_SIZE(pwm_resources), |
| 734 | }; |
| 735 | |
| 736 | void __init at91_add_device_pwm(u32 mask) |
| 737 | { |
| 738 | if (mask & (1 << AT91_PWM0)) |
| 739 | at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */ |
| 740 | |
| 741 | if (mask & (1 << AT91_PWM1)) |
| 742 | at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */ |
| 743 | |
| 744 | if (mask & (1 << AT91_PWM2)) |
| 745 | at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */ |
| 746 | |
| 747 | if (mask & (1 << AT91_PWM3)) |
| 748 | at91_set_B_periph(AT91_PIN_PA11, 1); /* enable PWM3 */ |
| 749 | |
| 750 | pwm_mask = mask; |
| 751 | |
| 752 | platform_device_register(&at91cap9_pwm0_device); |
| 753 | } |
| 754 | #else |
| 755 | void __init at91_add_device_pwm(u32 mask) {} |
| 756 | #endif |
| 757 | |
| 758 | |
| 759 | |
| 760 | /* -------------------------------------------------------------------- |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 761 | * AC97 |
| 762 | * -------------------------------------------------------------------- */ |
| 763 | |
| 764 | #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) |
| 765 | static u64 ac97_dmamask = DMA_BIT_MASK(32); |
| 766 | static struct atmel_ac97_data ac97_data; |
| 767 | |
| 768 | static struct resource ac97_resources[] = { |
| 769 | [0] = { |
| 770 | .start = AT91CAP9_BASE_AC97C, |
| 771 | .end = AT91CAP9_BASE_AC97C + SZ_16K - 1, |
| 772 | .flags = IORESOURCE_MEM, |
| 773 | }, |
| 774 | [1] = { |
| 775 | .start = AT91CAP9_ID_AC97C, |
| 776 | .end = AT91CAP9_ID_AC97C, |
| 777 | .flags = IORESOURCE_IRQ, |
| 778 | }, |
| 779 | }; |
| 780 | |
| 781 | static struct platform_device at91cap9_ac97_device = { |
| 782 | .name = "ac97c", |
| 783 | .id = 1, |
| 784 | .dev = { |
| 785 | .dma_mask = &ac97_dmamask, |
| 786 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 787 | .platform_data = &ac97_data, |
| 788 | }, |
| 789 | .resource = ac97_resources, |
| 790 | .num_resources = ARRAY_SIZE(ac97_resources), |
| 791 | }; |
| 792 | |
| 793 | void __init at91_add_device_ac97(struct atmel_ac97_data *data) |
| 794 | { |
| 795 | if (!data) |
| 796 | return; |
| 797 | |
| 798 | at91_set_A_periph(AT91_PIN_PA6, 0); /* AC97FS */ |
| 799 | at91_set_A_periph(AT91_PIN_PA7, 0); /* AC97CK */ |
| 800 | at91_set_A_periph(AT91_PIN_PA8, 0); /* AC97TX */ |
| 801 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ |
| 802 | |
| 803 | /* reset */ |
| 804 | if (data->reset_pin) |
| 805 | at91_set_gpio_output(data->reset_pin, 0); |
| 806 | |
| 807 | ac97_data = *data; |
| 808 | platform_device_register(&at91cap9_ac97_device); |
| 809 | } |
| 810 | #else |
| 811 | void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} |
| 812 | #endif |
| 813 | |
| 814 | |
| 815 | /* -------------------------------------------------------------------- |
| 816 | * LCD Controller |
| 817 | * -------------------------------------------------------------------- */ |
| 818 | |
| 819 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
| 820 | static u64 lcdc_dmamask = DMA_BIT_MASK(32); |
| 821 | static struct atmel_lcdfb_info lcdc_data; |
| 822 | |
| 823 | static struct resource lcdc_resources[] = { |
| 824 | [0] = { |
| 825 | .start = AT91CAP9_LCDC_BASE, |
| 826 | .end = AT91CAP9_LCDC_BASE + SZ_4K - 1, |
| 827 | .flags = IORESOURCE_MEM, |
| 828 | }, |
| 829 | [1] = { |
| 830 | .start = AT91CAP9_ID_LCDC, |
| 831 | .end = AT91CAP9_ID_LCDC, |
| 832 | .flags = IORESOURCE_IRQ, |
| 833 | }, |
| 834 | }; |
| 835 | |
| 836 | static struct platform_device at91_lcdc_device = { |
| 837 | .name = "atmel_lcdfb", |
| 838 | .id = 0, |
| 839 | .dev = { |
| 840 | .dma_mask = &lcdc_dmamask, |
| 841 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 842 | .platform_data = &lcdc_data, |
| 843 | }, |
| 844 | .resource = lcdc_resources, |
| 845 | .num_resources = ARRAY_SIZE(lcdc_resources), |
| 846 | }; |
| 847 | |
| 848 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) |
| 849 | { |
| 850 | if (!data) |
| 851 | return; |
| 852 | |
| 853 | at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ |
| 854 | at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ |
| 855 | at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ |
| 856 | at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ |
| 857 | at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ |
| 858 | at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ |
| 859 | at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ |
| 860 | at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ |
| 861 | at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ |
| 862 | at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ |
| 863 | at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ |
| 864 | at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ |
| 865 | at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ |
| 866 | at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */ |
| 867 | at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ |
| 868 | at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ |
| 869 | at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ |
| 870 | at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ |
| 871 | at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ |
| 872 | at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */ |
| 873 | at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ |
| 874 | at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ |
| 875 | |
| 876 | lcdc_data = *data; |
| 877 | platform_device_register(&at91_lcdc_device); |
| 878 | } |
| 879 | #else |
| 880 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} |
| 881 | #endif |
| 882 | |
| 883 | |
| 884 | /* -------------------------------------------------------------------- |
| 885 | * SSC -- Synchronous Serial Controller |
| 886 | * -------------------------------------------------------------------- */ |
| 887 | |
| 888 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) |
| 889 | static u64 ssc0_dmamask = DMA_BIT_MASK(32); |
| 890 | |
| 891 | static struct resource ssc0_resources[] = { |
| 892 | [0] = { |
| 893 | .start = AT91CAP9_BASE_SSC0, |
| 894 | .end = AT91CAP9_BASE_SSC0 + SZ_16K - 1, |
| 895 | .flags = IORESOURCE_MEM, |
| 896 | }, |
| 897 | [1] = { |
| 898 | .start = AT91CAP9_ID_SSC0, |
| 899 | .end = AT91CAP9_ID_SSC0, |
| 900 | .flags = IORESOURCE_IRQ, |
| 901 | }, |
| 902 | }; |
| 903 | |
| 904 | static struct platform_device at91cap9_ssc0_device = { |
| 905 | .name = "ssc", |
| 906 | .id = 0, |
| 907 | .dev = { |
| 908 | .dma_mask = &ssc0_dmamask, |
| 909 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 910 | }, |
| 911 | .resource = ssc0_resources, |
| 912 | .num_resources = ARRAY_SIZE(ssc0_resources), |
| 913 | }; |
| 914 | |
| 915 | static inline void configure_ssc0_pins(unsigned pins) |
| 916 | { |
| 917 | if (pins & ATMEL_SSC_TF) |
| 918 | at91_set_A_periph(AT91_PIN_PB0, 1); |
| 919 | if (pins & ATMEL_SSC_TK) |
| 920 | at91_set_A_periph(AT91_PIN_PB1, 1); |
| 921 | if (pins & ATMEL_SSC_TD) |
| 922 | at91_set_A_periph(AT91_PIN_PB2, 1); |
| 923 | if (pins & ATMEL_SSC_RD) |
| 924 | at91_set_A_periph(AT91_PIN_PB3, 1); |
| 925 | if (pins & ATMEL_SSC_RK) |
| 926 | at91_set_A_periph(AT91_PIN_PB4, 1); |
| 927 | if (pins & ATMEL_SSC_RF) |
| 928 | at91_set_A_periph(AT91_PIN_PB5, 1); |
| 929 | } |
| 930 | |
| 931 | static u64 ssc1_dmamask = DMA_BIT_MASK(32); |
| 932 | |
| 933 | static struct resource ssc1_resources[] = { |
| 934 | [0] = { |
| 935 | .start = AT91CAP9_BASE_SSC1, |
| 936 | .end = AT91CAP9_BASE_SSC1 + SZ_16K - 1, |
| 937 | .flags = IORESOURCE_MEM, |
| 938 | }, |
| 939 | [1] = { |
| 940 | .start = AT91CAP9_ID_SSC1, |
| 941 | .end = AT91CAP9_ID_SSC1, |
| 942 | .flags = IORESOURCE_IRQ, |
| 943 | }, |
| 944 | }; |
| 945 | |
| 946 | static struct platform_device at91cap9_ssc1_device = { |
| 947 | .name = "ssc", |
| 948 | .id = 1, |
| 949 | .dev = { |
| 950 | .dma_mask = &ssc1_dmamask, |
| 951 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 952 | }, |
| 953 | .resource = ssc1_resources, |
| 954 | .num_resources = ARRAY_SIZE(ssc1_resources), |
| 955 | }; |
| 956 | |
| 957 | static inline void configure_ssc1_pins(unsigned pins) |
| 958 | { |
| 959 | if (pins & ATMEL_SSC_TF) |
| 960 | at91_set_A_periph(AT91_PIN_PB6, 1); |
| 961 | if (pins & ATMEL_SSC_TK) |
| 962 | at91_set_A_periph(AT91_PIN_PB7, 1); |
| 963 | if (pins & ATMEL_SSC_TD) |
| 964 | at91_set_A_periph(AT91_PIN_PB8, 1); |
| 965 | if (pins & ATMEL_SSC_RD) |
| 966 | at91_set_A_periph(AT91_PIN_PB9, 1); |
| 967 | if (pins & ATMEL_SSC_RK) |
| 968 | at91_set_A_periph(AT91_PIN_PB10, 1); |
| 969 | if (pins & ATMEL_SSC_RF) |
| 970 | at91_set_A_periph(AT91_PIN_PB11, 1); |
| 971 | } |
| 972 | |
| 973 | /* |
| 974 | * SSC controllers are accessed through library code, instead of any |
| 975 | * kind of all-singing/all-dancing driver. For example one could be |
| 976 | * used by a particular I2S audio codec's driver, while another one |
| 977 | * on the same system might be used by a custom data capture driver. |
| 978 | */ |
| 979 | void __init at91_add_device_ssc(unsigned id, unsigned pins) |
| 980 | { |
| 981 | struct platform_device *pdev; |
| 982 | |
| 983 | /* |
| 984 | * NOTE: caller is responsible for passing information matching |
| 985 | * "pins" to whatever will be using each particular controller. |
| 986 | */ |
| 987 | switch (id) { |
| 988 | case AT91CAP9_ID_SSC0: |
| 989 | pdev = &at91cap9_ssc0_device; |
| 990 | configure_ssc0_pins(pins); |
| 991 | at91_clock_associate("ssc0_clk", &pdev->dev, "ssc"); |
| 992 | break; |
| 993 | case AT91CAP9_ID_SSC1: |
| 994 | pdev = &at91cap9_ssc1_device; |
| 995 | configure_ssc1_pins(pins); |
| 996 | at91_clock_associate("ssc1_clk", &pdev->dev, "ssc"); |
| 997 | break; |
| 998 | default: |
| 999 | return; |
| 1000 | } |
| 1001 | |
| 1002 | platform_device_register(pdev); |
| 1003 | } |
| 1004 | |
| 1005 | #else |
| 1006 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} |
| 1007 | #endif |
| 1008 | |
| 1009 | |
| 1010 | /* -------------------------------------------------------------------- |
| 1011 | * UART |
| 1012 | * -------------------------------------------------------------------- */ |
| 1013 | |
| 1014 | #if defined(CONFIG_SERIAL_ATMEL) |
| 1015 | static struct resource dbgu_resources[] = { |
| 1016 | [0] = { |
| 1017 | .start = AT91_VA_BASE_SYS + AT91_DBGU, |
| 1018 | .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, |
| 1019 | .flags = IORESOURCE_MEM, |
| 1020 | }, |
| 1021 | [1] = { |
| 1022 | .start = AT91_ID_SYS, |
| 1023 | .end = AT91_ID_SYS, |
| 1024 | .flags = IORESOURCE_IRQ, |
| 1025 | }, |
| 1026 | }; |
| 1027 | |
| 1028 | static struct atmel_uart_data dbgu_data = { |
| 1029 | .use_dma_tx = 0, |
| 1030 | .use_dma_rx = 0, /* DBGU not capable of receive DMA */ |
| 1031 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), |
| 1032 | }; |
| 1033 | |
| 1034 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); |
| 1035 | |
| 1036 | static struct platform_device at91cap9_dbgu_device = { |
| 1037 | .name = "atmel_usart", |
| 1038 | .id = 0, |
| 1039 | .dev = { |
| 1040 | .dma_mask = &dbgu_dmamask, |
| 1041 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 1042 | .platform_data = &dbgu_data, |
| 1043 | }, |
| 1044 | .resource = dbgu_resources, |
| 1045 | .num_resources = ARRAY_SIZE(dbgu_resources), |
| 1046 | }; |
| 1047 | |
| 1048 | static inline void configure_dbgu_pins(void) |
| 1049 | { |
| 1050 | at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ |
| 1051 | at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ |
| 1052 | } |
| 1053 | |
| 1054 | static struct resource uart0_resources[] = { |
| 1055 | [0] = { |
| 1056 | .start = AT91CAP9_BASE_US0, |
| 1057 | .end = AT91CAP9_BASE_US0 + SZ_16K - 1, |
| 1058 | .flags = IORESOURCE_MEM, |
| 1059 | }, |
| 1060 | [1] = { |
| 1061 | .start = AT91CAP9_ID_US0, |
| 1062 | .end = AT91CAP9_ID_US0, |
| 1063 | .flags = IORESOURCE_IRQ, |
| 1064 | }, |
| 1065 | }; |
| 1066 | |
| 1067 | static struct atmel_uart_data uart0_data = { |
| 1068 | .use_dma_tx = 1, |
| 1069 | .use_dma_rx = 1, |
| 1070 | }; |
| 1071 | |
| 1072 | static u64 uart0_dmamask = DMA_BIT_MASK(32); |
| 1073 | |
| 1074 | static struct platform_device at91cap9_uart0_device = { |
| 1075 | .name = "atmel_usart", |
| 1076 | .id = 1, |
| 1077 | .dev = { |
| 1078 | .dma_mask = &uart0_dmamask, |
| 1079 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 1080 | .platform_data = &uart0_data, |
| 1081 | }, |
| 1082 | .resource = uart0_resources, |
| 1083 | .num_resources = ARRAY_SIZE(uart0_resources), |
| 1084 | }; |
| 1085 | |
| 1086 | static inline void configure_usart0_pins(unsigned pins) |
| 1087 | { |
| 1088 | at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ |
| 1089 | at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ |
| 1090 | |
| 1091 | if (pins & ATMEL_UART_RTS) |
| 1092 | at91_set_A_periph(AT91_PIN_PA24, 0); /* RTS0 */ |
| 1093 | if (pins & ATMEL_UART_CTS) |
| 1094 | at91_set_A_periph(AT91_PIN_PA25, 0); /* CTS0 */ |
| 1095 | } |
| 1096 | |
| 1097 | static struct resource uart1_resources[] = { |
| 1098 | [0] = { |
| 1099 | .start = AT91CAP9_BASE_US1, |
| 1100 | .end = AT91CAP9_BASE_US1 + SZ_16K - 1, |
| 1101 | .flags = IORESOURCE_MEM, |
| 1102 | }, |
| 1103 | [1] = { |
| 1104 | .start = AT91CAP9_ID_US1, |
| 1105 | .end = AT91CAP9_ID_US1, |
| 1106 | .flags = IORESOURCE_IRQ, |
| 1107 | }, |
| 1108 | }; |
| 1109 | |
| 1110 | static struct atmel_uart_data uart1_data = { |
| 1111 | .use_dma_tx = 1, |
| 1112 | .use_dma_rx = 1, |
| 1113 | }; |
| 1114 | |
| 1115 | static u64 uart1_dmamask = DMA_BIT_MASK(32); |
| 1116 | |
| 1117 | static struct platform_device at91cap9_uart1_device = { |
| 1118 | .name = "atmel_usart", |
| 1119 | .id = 2, |
| 1120 | .dev = { |
| 1121 | .dma_mask = &uart1_dmamask, |
| 1122 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 1123 | .platform_data = &uart1_data, |
| 1124 | }, |
| 1125 | .resource = uart1_resources, |
| 1126 | .num_resources = ARRAY_SIZE(uart1_resources), |
| 1127 | }; |
| 1128 | |
| 1129 | static inline void configure_usart1_pins(unsigned pins) |
| 1130 | { |
| 1131 | at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ |
| 1132 | at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ |
| 1133 | |
| 1134 | if (pins & ATMEL_UART_RTS) |
| 1135 | at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ |
| 1136 | if (pins & ATMEL_UART_CTS) |
| 1137 | at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ |
| 1138 | } |
| 1139 | |
| 1140 | static struct resource uart2_resources[] = { |
| 1141 | [0] = { |
| 1142 | .start = AT91CAP9_BASE_US2, |
| 1143 | .end = AT91CAP9_BASE_US2 + SZ_16K - 1, |
| 1144 | .flags = IORESOURCE_MEM, |
| 1145 | }, |
| 1146 | [1] = { |
| 1147 | .start = AT91CAP9_ID_US2, |
| 1148 | .end = AT91CAP9_ID_US2, |
| 1149 | .flags = IORESOURCE_IRQ, |
| 1150 | }, |
| 1151 | }; |
| 1152 | |
| 1153 | static struct atmel_uart_data uart2_data = { |
| 1154 | .use_dma_tx = 1, |
| 1155 | .use_dma_rx = 1, |
| 1156 | }; |
| 1157 | |
| 1158 | static u64 uart2_dmamask = DMA_BIT_MASK(32); |
| 1159 | |
| 1160 | static struct platform_device at91cap9_uart2_device = { |
| 1161 | .name = "atmel_usart", |
| 1162 | .id = 3, |
| 1163 | .dev = { |
| 1164 | .dma_mask = &uart2_dmamask, |
| 1165 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 1166 | .platform_data = &uart2_data, |
| 1167 | }, |
| 1168 | .resource = uart2_resources, |
| 1169 | .num_resources = ARRAY_SIZE(uart2_resources), |
| 1170 | }; |
| 1171 | |
| 1172 | static inline void configure_usart2_pins(unsigned pins) |
| 1173 | { |
| 1174 | at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ |
| 1175 | at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ |
| 1176 | |
| 1177 | if (pins & ATMEL_UART_RTS) |
| 1178 | at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ |
| 1179 | if (pins & ATMEL_UART_CTS) |
| 1180 | at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ |
| 1181 | } |
| 1182 | |
Andrew Victor | 11aadac | 2008-04-15 21:16:38 +0100 | [diff] [blame] | 1183 | static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 1184 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
| 1185 | |
| 1186 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
| 1187 | { |
| 1188 | struct platform_device *pdev; |
| 1189 | |
| 1190 | switch (id) { |
| 1191 | case 0: /* DBGU */ |
| 1192 | pdev = &at91cap9_dbgu_device; |
| 1193 | configure_dbgu_pins(); |
| 1194 | at91_clock_associate("mck", &pdev->dev, "usart"); |
| 1195 | break; |
| 1196 | case AT91CAP9_ID_US0: |
| 1197 | pdev = &at91cap9_uart0_device; |
| 1198 | configure_usart0_pins(pins); |
| 1199 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); |
| 1200 | break; |
| 1201 | case AT91CAP9_ID_US1: |
| 1202 | pdev = &at91cap9_uart1_device; |
| 1203 | configure_usart1_pins(pins); |
| 1204 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); |
| 1205 | break; |
| 1206 | case AT91CAP9_ID_US2: |
| 1207 | pdev = &at91cap9_uart2_device; |
| 1208 | configure_usart2_pins(pins); |
| 1209 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); |
| 1210 | break; |
| 1211 | default: |
| 1212 | return; |
| 1213 | } |
| 1214 | pdev->id = portnr; /* update to mapped ID */ |
| 1215 | |
| 1216 | if (portnr < ATMEL_MAX_UART) |
| 1217 | at91_uarts[portnr] = pdev; |
| 1218 | } |
| 1219 | |
| 1220 | void __init at91_set_serial_console(unsigned portnr) |
| 1221 | { |
| 1222 | if (portnr < ATMEL_MAX_UART) |
| 1223 | atmel_default_console_device = at91_uarts[portnr]; |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 1224 | } |
| 1225 | |
| 1226 | void __init at91_add_device_serial(void) |
| 1227 | { |
| 1228 | int i; |
| 1229 | |
| 1230 | for (i = 0; i < ATMEL_MAX_UART; i++) { |
| 1231 | if (at91_uarts[i]) |
| 1232 | platform_device_register(at91_uarts[i]); |
| 1233 | } |
Andrew Victor | 11aadac | 2008-04-15 21:16:38 +0100 | [diff] [blame] | 1234 | |
| 1235 | if (!atmel_default_console_device) |
| 1236 | printk(KERN_INFO "AT91: No default serial console defined.\n"); |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 1237 | } |
| 1238 | #else |
| 1239 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} |
| 1240 | void __init at91_set_serial_console(unsigned portnr) {} |
| 1241 | void __init at91_add_device_serial(void) {} |
| 1242 | #endif |
| 1243 | |
| 1244 | |
| 1245 | /* -------------------------------------------------------------------- */ |
| 1246 | /* |
| 1247 | * These devices are always present and don't need any board-specific |
| 1248 | * setup. |
| 1249 | */ |
| 1250 | static int __init at91_add_standard_devices(void) |
| 1251 | { |
| 1252 | at91_add_device_rtt(); |
| 1253 | at91_add_device_watchdog(); |
Andrew Victor | e5f40bf | 2008-04-02 21:58:00 +0100 | [diff] [blame] | 1254 | at91_add_device_tc(); |
Andrew Victor | 2b3b351 | 2008-01-24 15:10:39 +0100 | [diff] [blame] | 1255 | return 0; |
| 1256 | } |
| 1257 | |
| 1258 | arch_initcall(at91_add_standard_devices); |