Inaky Perez-Gonzalez | b6e0698 | 2008-09-17 16:34:14 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3]) |
| 3 | * Radio Control command/event transport to the UWB stack |
| 4 | * |
| 5 | * Copyright (C) 2005-2006 Intel Corporation |
| 6 | * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License version |
| 10 | * 2 as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
| 20 | * 02110-1301, USA. |
| 21 | * |
| 22 | * |
| 23 | * Initialize and hook up the Radio Control interface. |
| 24 | * |
| 25 | * For each device probed, creates an 'struct whcrc' which contains |
| 26 | * just the representation of the UWB Radio Controller, and the logic |
| 27 | * for reading notifications and passing them to the UWB Core. |
| 28 | * |
| 29 | * So we initialize all of those, register the UWB Radio Controller |
| 30 | * and setup the notification/event handle to pipe the notifications |
| 31 | * to the UWB management Daemon. |
| 32 | * |
| 33 | * Once uwb_rc_add() is called, the UWB stack takes control, resets |
| 34 | * the radio and readies the device to take commands the UWB |
| 35 | * API/user-space. |
| 36 | * |
| 37 | * Note this driver is just a transport driver; the commands are |
| 38 | * formed at the UWB stack and given to this driver who will deliver |
| 39 | * them to the hw and transfer the replies/notifications back to the |
| 40 | * UWB stack through the UWB daemon (UWBD). |
| 41 | */ |
| 42 | #include <linux/version.h> |
| 43 | #include <linux/init.h> |
| 44 | #include <linux/module.h> |
| 45 | #include <linux/pci.h> |
| 46 | #include <linux/dma-mapping.h> |
| 47 | #include <linux/interrupt.h> |
| 48 | #include <linux/workqueue.h> |
| 49 | #include <linux/uwb.h> |
| 50 | #include <linux/uwb/whci.h> |
| 51 | #include <linux/uwb/umc.h> |
| 52 | #include "uwb-internal.h" |
| 53 | |
| 54 | #define D_LOCAL 0 |
| 55 | #include <linux/uwb/debug.h> |
| 56 | |
| 57 | /** |
| 58 | * Descriptor for an instance of the UWB Radio Control Driver that |
| 59 | * attaches to the URC interface of the WHCI PCI card. |
| 60 | * |
| 61 | * Unless there is a lock specific to the 'data members', all access |
| 62 | * is protected by uwb_rc->mutex. |
| 63 | */ |
| 64 | struct whcrc { |
| 65 | struct umc_dev *umc_dev; |
| 66 | struct uwb_rc *uwb_rc; /* UWB host controller */ |
| 67 | |
| 68 | unsigned long area; |
| 69 | void __iomem *rc_base; |
| 70 | size_t rc_len; |
| 71 | spinlock_t irq_lock; |
| 72 | |
| 73 | void *evt_buf, *cmd_buf; |
| 74 | dma_addr_t evt_dma_buf, cmd_dma_buf; |
| 75 | wait_queue_head_t cmd_wq; |
| 76 | struct work_struct event_work; |
| 77 | }; |
| 78 | |
| 79 | /** |
| 80 | * Execute an UWB RC command on WHCI/RC |
| 81 | * |
| 82 | * @rc: Instance of a Radio Controller that is a whcrc |
| 83 | * @cmd: Buffer containing the RCCB and payload to execute |
| 84 | * @cmd_size: Size of the command buffer. |
| 85 | * |
| 86 | * We copy the command into whcrc->cmd_buf (as it is pretty and |
| 87 | * aligned`and physically contiguous) and then press the right keys in |
| 88 | * the controller's URCCMD register to get it to read it. We might |
| 89 | * have to wait for the cmd_sem to be open to us. |
| 90 | * |
| 91 | * NOTE: rc's mutex has to be locked |
| 92 | */ |
| 93 | static int whcrc_cmd(struct uwb_rc *uwb_rc, |
| 94 | const struct uwb_rccb *cmd, size_t cmd_size) |
| 95 | { |
| 96 | int result = 0; |
| 97 | struct whcrc *whcrc = uwb_rc->priv; |
| 98 | struct device *dev = &whcrc->umc_dev->dev; |
| 99 | u32 urccmd; |
| 100 | |
| 101 | d_fnstart(3, dev, "(%p, %p, %zu)\n", uwb_rc, cmd, cmd_size); |
| 102 | might_sleep(); |
| 103 | |
| 104 | if (cmd_size >= 4096) { |
| 105 | result = -E2BIG; |
| 106 | goto error; |
| 107 | } |
| 108 | |
| 109 | /* |
| 110 | * If the URC is halted, then the hardware has reset itself. |
| 111 | * Attempt to recover by restarting the device and then return |
| 112 | * an error as it's likely that the current command isn't |
| 113 | * valid for a newly started RC. |
| 114 | */ |
| 115 | if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) { |
| 116 | dev_err(dev, "requesting reset of halted radio controller\n"); |
| 117 | uwb_rc_reset_all(uwb_rc); |
| 118 | result = -EIO; |
| 119 | goto error; |
| 120 | } |
| 121 | |
| 122 | result = wait_event_timeout(whcrc->cmd_wq, |
| 123 | !(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2); |
| 124 | if (result == 0) { |
| 125 | dev_err(dev, "device is not ready to execute commands\n"); |
| 126 | result = -ETIMEDOUT; |
| 127 | goto error; |
| 128 | } |
| 129 | |
| 130 | memmove(whcrc->cmd_buf, cmd, cmd_size); |
| 131 | le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR); |
| 132 | |
| 133 | spin_lock(&whcrc->irq_lock); |
| 134 | urccmd = le_readl(whcrc->rc_base + URCCMD); |
| 135 | urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK); |
| 136 | le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size, |
| 137 | whcrc->rc_base + URCCMD); |
| 138 | spin_unlock(&whcrc->irq_lock); |
| 139 | |
| 140 | error: |
| 141 | d_fnend(3, dev, "(%p, %p, %zu) = %d\n", |
| 142 | uwb_rc, cmd, cmd_size, result); |
| 143 | return result; |
| 144 | } |
| 145 | |
| 146 | static int whcrc_reset(struct uwb_rc *rc) |
| 147 | { |
| 148 | struct whcrc *whcrc = rc->priv; |
| 149 | |
| 150 | return umc_controller_reset(whcrc->umc_dev); |
| 151 | } |
| 152 | |
| 153 | /** |
| 154 | * Reset event reception mechanism and tell hw we are ready to get more |
| 155 | * |
| 156 | * We have read all the events in the event buffer, so we are ready to |
| 157 | * reset it to the beginning. |
| 158 | * |
| 159 | * This is only called during initialization or after an event buffer |
| 160 | * has been retired. This means we can be sure that event processing |
| 161 | * is disabled and it's safe to update the URCEVTADDR register. |
| 162 | * |
| 163 | * There's no need to wait for the event processing to start as the |
| 164 | * URC will not clear URCCMD_ACTIVE until (internal) event buffer |
| 165 | * space is available. |
| 166 | */ |
| 167 | static |
| 168 | void whcrc_enable_events(struct whcrc *whcrc) |
| 169 | { |
| 170 | struct device *dev = &whcrc->umc_dev->dev; |
| 171 | u32 urccmd; |
| 172 | |
| 173 | d_fnstart(4, dev, "(whcrc %p)\n", whcrc); |
| 174 | |
| 175 | le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR); |
| 176 | |
| 177 | spin_lock(&whcrc->irq_lock); |
| 178 | urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE; |
| 179 | le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD); |
| 180 | spin_unlock(&whcrc->irq_lock); |
| 181 | |
| 182 | d_fnend(4, dev, "(whcrc %p) = void\n", whcrc); |
| 183 | } |
| 184 | |
| 185 | static void whcrc_event_work(struct work_struct *work) |
| 186 | { |
| 187 | struct whcrc *whcrc = container_of(work, struct whcrc, event_work); |
| 188 | struct device *dev = &whcrc->umc_dev->dev; |
| 189 | size_t size; |
| 190 | u64 urcevtaddr; |
| 191 | |
| 192 | urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR); |
| 193 | size = urcevtaddr & URCEVTADDR_OFFSET_MASK; |
| 194 | |
| 195 | d_printf(3, dev, "received %zu octet event\n", size); |
| 196 | d_dump(4, dev, whcrc->evt_buf, size > 32 ? 32 : size); |
| 197 | |
| 198 | uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size); |
| 199 | whcrc_enable_events(whcrc); |
| 200 | } |
| 201 | |
| 202 | /** |
| 203 | * Catch interrupts? |
| 204 | * |
| 205 | * We ack inmediately (and expect the hw to do the right thing and |
| 206 | * raise another IRQ if things have changed :) |
| 207 | */ |
| 208 | static |
| 209 | irqreturn_t whcrc_irq_cb(int irq, void *_whcrc) |
| 210 | { |
| 211 | struct whcrc *whcrc = _whcrc; |
| 212 | struct device *dev = &whcrc->umc_dev->dev; |
| 213 | u32 urcsts; |
| 214 | |
Inaky Perez-Gonzalez | b6e0698 | 2008-09-17 16:34:14 +0100 | [diff] [blame] | 215 | urcsts = le_readl(whcrc->rc_base + URCSTS); |
| 216 | if (!(urcsts & URCSTS_INT_MASK)) |
| 217 | return IRQ_NONE; |
| 218 | le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS); |
| 219 | |
| 220 | d_printf(4, dev, "acked 0x%08x, urcsts 0x%08x\n", |
| 221 | le_readl(whcrc->rc_base + URCSTS), urcsts); |
| 222 | |
Inaky Perez-Gonzalez | b6e0698 | 2008-09-17 16:34:14 +0100 | [diff] [blame] | 223 | if (urcsts & URCSTS_HSE) { |
| 224 | dev_err(dev, "host system error -- hardware halted\n"); |
| 225 | /* FIXME: do something sensible here */ |
| 226 | goto out; |
| 227 | } |
| 228 | if (urcsts & URCSTS_ER) { |
| 229 | d_printf(3, dev, "ER: event ready\n"); |
| 230 | schedule_work(&whcrc->event_work); |
| 231 | } |
| 232 | if (urcsts & URCSTS_RCI) { |
| 233 | d_printf(3, dev, "RCI: ready to execute another command\n"); |
| 234 | wake_up_all(&whcrc->cmd_wq); |
| 235 | } |
| 236 | out: |
| 237 | return IRQ_HANDLED; |
| 238 | } |
| 239 | |
| 240 | |
| 241 | /** |
| 242 | * Initialize a UMC RC interface: map regions, get (shared) IRQ |
| 243 | */ |
| 244 | static |
| 245 | int whcrc_setup_rc_umc(struct whcrc *whcrc) |
| 246 | { |
| 247 | int result = 0; |
| 248 | struct device *dev = &whcrc->umc_dev->dev; |
| 249 | struct umc_dev *umc_dev = whcrc->umc_dev; |
| 250 | |
| 251 | whcrc->area = umc_dev->resource.start; |
| 252 | whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1; |
| 253 | result = -EBUSY; |
| 254 | if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) |
| 255 | == NULL) { |
| 256 | dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n", |
| 257 | whcrc->rc_len, whcrc->area, result); |
| 258 | goto error_request_region; |
| 259 | } |
| 260 | |
| 261 | whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len); |
| 262 | if (whcrc->rc_base == NULL) { |
| 263 | dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n", |
| 264 | whcrc->rc_len, whcrc->area, result); |
| 265 | goto error_ioremap_nocache; |
| 266 | } |
| 267 | |
| 268 | result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED, |
| 269 | KBUILD_MODNAME, whcrc); |
| 270 | if (result < 0) { |
| 271 | dev_err(dev, "can't allocate IRQ %d: %d\n", |
| 272 | umc_dev->irq, result); |
| 273 | goto error_request_irq; |
| 274 | } |
| 275 | |
| 276 | result = -ENOMEM; |
| 277 | whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE, |
| 278 | &whcrc->cmd_dma_buf, GFP_KERNEL); |
| 279 | if (whcrc->cmd_buf == NULL) { |
| 280 | dev_err(dev, "Can't allocate cmd transfer buffer\n"); |
| 281 | goto error_cmd_buffer; |
| 282 | } |
| 283 | |
| 284 | whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE, |
| 285 | &whcrc->evt_dma_buf, GFP_KERNEL); |
| 286 | if (whcrc->evt_buf == NULL) { |
| 287 | dev_err(dev, "Can't allocate evt transfer buffer\n"); |
| 288 | goto error_evt_buffer; |
| 289 | } |
| 290 | d_printf(3, dev, "UWB RC Interface: %zu bytes at 0x%p, irq %u\n", |
| 291 | whcrc->rc_len, whcrc->rc_base, umc_dev->irq); |
| 292 | return 0; |
| 293 | |
| 294 | error_evt_buffer: |
| 295 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf, |
| 296 | whcrc->cmd_dma_buf); |
| 297 | error_cmd_buffer: |
| 298 | free_irq(umc_dev->irq, whcrc); |
| 299 | error_request_irq: |
| 300 | iounmap(whcrc->rc_base); |
| 301 | error_ioremap_nocache: |
| 302 | release_mem_region(whcrc->area, whcrc->rc_len); |
| 303 | error_request_region: |
| 304 | return result; |
| 305 | } |
| 306 | |
| 307 | |
| 308 | /** |
| 309 | * Release RC's UMC resources |
| 310 | */ |
| 311 | static |
| 312 | void whcrc_release_rc_umc(struct whcrc *whcrc) |
| 313 | { |
| 314 | struct umc_dev *umc_dev = whcrc->umc_dev; |
| 315 | |
| 316 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf, |
| 317 | whcrc->evt_dma_buf); |
| 318 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf, |
| 319 | whcrc->cmd_dma_buf); |
| 320 | free_irq(umc_dev->irq, whcrc); |
| 321 | iounmap(whcrc->rc_base); |
| 322 | release_mem_region(whcrc->area, whcrc->rc_len); |
| 323 | } |
| 324 | |
| 325 | |
| 326 | /** |
| 327 | * whcrc_start_rc - start a WHCI radio controller |
| 328 | * @whcrc: the radio controller to start |
| 329 | * |
| 330 | * Reset the UMC device, start the radio controller, enable events and |
| 331 | * finally enable interrupts. |
| 332 | */ |
| 333 | static int whcrc_start_rc(struct uwb_rc *rc) |
| 334 | { |
| 335 | struct whcrc *whcrc = rc->priv; |
| 336 | int result = 0; |
| 337 | struct device *dev = &whcrc->umc_dev->dev; |
| 338 | unsigned long start, duration; |
| 339 | |
| 340 | /* Reset the thing */ |
| 341 | le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD); |
| 342 | if (d_test(3)) |
| 343 | start = jiffies; |
| 344 | if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0, |
| 345 | 5000, "device to reset at init") < 0) { |
| 346 | result = -EBUSY; |
| 347 | goto error; |
| 348 | } else if (d_test(3)) { |
| 349 | duration = jiffies - start; |
| 350 | if (duration > msecs_to_jiffies(40)) |
| 351 | dev_err(dev, "Device took %ums to " |
| 352 | "reset. MAX expected: 40ms\n", |
| 353 | jiffies_to_msecs(duration)); |
| 354 | } |
| 355 | |
| 356 | /* Set the event buffer, start the controller (enable IRQs later) */ |
| 357 | le_writel(0, whcrc->rc_base + URCINTR); |
| 358 | le_writel(URCCMD_RS, whcrc->rc_base + URCCMD); |
| 359 | result = -ETIMEDOUT; |
| 360 | if (d_test(3)) |
| 361 | start = jiffies; |
| 362 | if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0, |
| 363 | 5000, "device to start") < 0) |
| 364 | goto error; |
| 365 | if (d_test(3)) { |
| 366 | duration = jiffies - start; |
| 367 | if (duration > msecs_to_jiffies(40)) |
| 368 | dev_err(dev, "Device took %ums to start. " |
| 369 | "MAX expected: 40ms\n", |
| 370 | jiffies_to_msecs(duration)); |
| 371 | } |
| 372 | whcrc_enable_events(whcrc); |
| 373 | result = 0; |
| 374 | le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR); |
| 375 | error: |
| 376 | return result; |
| 377 | } |
| 378 | |
| 379 | |
| 380 | /** |
| 381 | * whcrc_stop_rc - stop a WHCI radio controller |
| 382 | * @whcrc: the radio controller to stop |
| 383 | * |
| 384 | * Disable interrupts and cancel any pending event processing work |
| 385 | * before clearing the Run/Stop bit. |
| 386 | */ |
| 387 | static |
| 388 | void whcrc_stop_rc(struct uwb_rc *rc) |
| 389 | { |
| 390 | struct whcrc *whcrc = rc->priv; |
| 391 | struct umc_dev *umc_dev = whcrc->umc_dev; |
| 392 | |
| 393 | le_writel(0, whcrc->rc_base + URCINTR); |
| 394 | cancel_work_sync(&whcrc->event_work); |
| 395 | |
| 396 | le_writel(0, whcrc->rc_base + URCCMD); |
| 397 | whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS, |
| 398 | URCSTS_HALTED, 0, 40, "URCSTS.HALTED"); |
| 399 | } |
| 400 | |
| 401 | static void whcrc_init(struct whcrc *whcrc) |
| 402 | { |
| 403 | spin_lock_init(&whcrc->irq_lock); |
| 404 | init_waitqueue_head(&whcrc->cmd_wq); |
| 405 | INIT_WORK(&whcrc->event_work, whcrc_event_work); |
| 406 | } |
| 407 | |
| 408 | /** |
| 409 | * Initialize the radio controller. |
| 410 | * |
| 411 | * NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the |
| 412 | * IRQ handler we use that to determine if the hw is ready to |
| 413 | * handle events. Looks like a race condition, but it really is |
| 414 | * not. |
| 415 | */ |
| 416 | static |
| 417 | int whcrc_probe(struct umc_dev *umc_dev) |
| 418 | { |
| 419 | int result; |
| 420 | struct uwb_rc *uwb_rc; |
| 421 | struct whcrc *whcrc; |
| 422 | struct device *dev = &umc_dev->dev; |
| 423 | |
| 424 | d_fnstart(3, dev, "(umc_dev %p)\n", umc_dev); |
| 425 | result = -ENOMEM; |
| 426 | uwb_rc = uwb_rc_alloc(); |
| 427 | if (uwb_rc == NULL) { |
| 428 | dev_err(dev, "unable to allocate RC instance\n"); |
| 429 | goto error_rc_alloc; |
| 430 | } |
| 431 | whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL); |
| 432 | if (whcrc == NULL) { |
| 433 | dev_err(dev, "unable to allocate WHC-RC instance\n"); |
| 434 | goto error_alloc; |
| 435 | } |
| 436 | whcrc_init(whcrc); |
| 437 | whcrc->umc_dev = umc_dev; |
| 438 | |
| 439 | result = whcrc_setup_rc_umc(whcrc); |
| 440 | if (result < 0) { |
| 441 | dev_err(dev, "Can't setup RC UMC interface: %d\n", result); |
| 442 | goto error_setup_rc_umc; |
| 443 | } |
| 444 | whcrc->uwb_rc = uwb_rc; |
| 445 | |
| 446 | uwb_rc->owner = THIS_MODULE; |
| 447 | uwb_rc->cmd = whcrc_cmd; |
| 448 | uwb_rc->reset = whcrc_reset; |
| 449 | uwb_rc->start = whcrc_start_rc; |
| 450 | uwb_rc->stop = whcrc_stop_rc; |
| 451 | |
| 452 | result = uwb_rc_add(uwb_rc, dev, whcrc); |
| 453 | if (result < 0) |
| 454 | goto error_rc_add; |
| 455 | umc_set_drvdata(umc_dev, whcrc); |
| 456 | d_fnend(3, dev, "(umc_dev %p) = 0\n", umc_dev); |
| 457 | return 0; |
| 458 | |
| 459 | error_rc_add: |
| 460 | whcrc_release_rc_umc(whcrc); |
| 461 | error_setup_rc_umc: |
| 462 | kfree(whcrc); |
| 463 | error_alloc: |
| 464 | uwb_rc_put(uwb_rc); |
| 465 | error_rc_alloc: |
| 466 | d_fnend(3, dev, "(umc_dev %p) = %d\n", umc_dev, result); |
| 467 | return result; |
| 468 | } |
| 469 | |
| 470 | /** |
| 471 | * Clean up the radio control resources |
| 472 | * |
| 473 | * When we up the command semaphore, everybody possibly held trying to |
| 474 | * execute a command should be granted entry and then they'll see the |
| 475 | * host is quiescing and up it (so it will chain to the next waiter). |
| 476 | * This should not happen (in any case), as we can only remove when |
| 477 | * there are no handles open... |
| 478 | */ |
| 479 | static void whcrc_remove(struct umc_dev *umc_dev) |
| 480 | { |
| 481 | struct whcrc *whcrc = umc_get_drvdata(umc_dev); |
| 482 | struct uwb_rc *uwb_rc = whcrc->uwb_rc; |
| 483 | |
| 484 | umc_set_drvdata(umc_dev, NULL); |
| 485 | uwb_rc_rm(uwb_rc); |
| 486 | whcrc_release_rc_umc(whcrc); |
| 487 | kfree(whcrc); |
| 488 | uwb_rc_put(uwb_rc); |
| 489 | d_printf(1, &umc_dev->dev, "freed whcrc %p\n", whcrc); |
| 490 | } |
| 491 | |
| 492 | /* PCI device ID's that we handle [so it gets loaded] */ |
| 493 | static struct pci_device_id whcrc_id_table[] = { |
| 494 | { PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) }, |
| 495 | { /* empty last entry */ } |
| 496 | }; |
| 497 | MODULE_DEVICE_TABLE(pci, whcrc_id_table); |
| 498 | |
| 499 | static struct umc_driver whcrc_driver = { |
| 500 | .name = "whc-rc", |
| 501 | .cap_id = UMC_CAP_ID_WHCI_RC, |
| 502 | .probe = whcrc_probe, |
| 503 | .remove = whcrc_remove, |
| 504 | }; |
| 505 | |
| 506 | static int __init whcrc_driver_init(void) |
| 507 | { |
| 508 | return umc_driver_register(&whcrc_driver); |
| 509 | } |
| 510 | module_init(whcrc_driver_init); |
| 511 | |
| 512 | static void __exit whcrc_driver_exit(void) |
| 513 | { |
| 514 | umc_driver_unregister(&whcrc_driver); |
| 515 | } |
| 516 | module_exit(whcrc_driver_exit); |
| 517 | |
| 518 | MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>"); |
| 519 | MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver"); |
| 520 | MODULE_LICENSE("GPL"); |