| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame^] | 1 | menu "Processor features" |
| 2 | |
| 3 | choice |
| 4 | prompt "Endianess selection" |
| 5 | default CPU_LITTLE_ENDIAN |
| 6 | help |
| 7 | Some SuperH machines can be configured for either little or big |
| 8 | endian byte order. These modes require different kernels. |
| 9 | |
| 10 | config CPU_LITTLE_ENDIAN |
| 11 | bool "Little Endian" |
| 12 | |
| 13 | config CPU_BIG_ENDIAN |
| 14 | bool "Big Endian" |
| 15 | |
| 16 | endchoice |
| 17 | |
| 18 | config SH_FPU |
| 19 | bool "FPU support" |
| 20 | depends on CPU_HAS_FPU |
| 21 | default y |
| 22 | help |
| 23 | Selecting this option will enable support for SH processors that |
| 24 | have FPU units (ie, SH77xx). |
| 25 | |
| 26 | This option must be set in order to enable the FPU. |
| 27 | |
| 28 | config SH_FPU_EMU |
| 29 | bool "FPU emulation support" |
| 30 | depends on !SH_FPU && EXPERIMENTAL |
| 31 | default n |
| 32 | help |
| 33 | Selecting this option will enable support for software FPU emulation. |
| 34 | Most SH-3 users will want to say Y here, whereas most SH-4 users will |
| 35 | want to say N. |
| 36 | |
| 37 | config SH_DSP |
| 38 | bool "DSP support" |
| 39 | depends on CPU_HAS_DSP |
| 40 | default y |
| 41 | help |
| 42 | Selecting this option will enable support for SH processors that |
| 43 | have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). |
| 44 | |
| 45 | This option must be set in order to enable the DSP. |
| 46 | |
| 47 | config SH_ADC |
| 48 | bool "ADC support" |
| 49 | depends on CPU_SH3 |
| 50 | default y |
| 51 | help |
| 52 | Selecting this option will allow the Linux kernel to use SH3 on-chip |
| 53 | ADC module. |
| 54 | |
| 55 | If unsure, say N. |
| 56 | |
| 57 | config SH_STORE_QUEUES |
| 58 | bool "Support for Store Queues" |
| 59 | depends on CPU_SH4 |
| 60 | help |
| 61 | Selecting this option will enable an in-kernel API for manipulating |
| 62 | the store queues integrated in the SH-4 processors. |
| 63 | |
| 64 | config SPECULATIVE_EXECUTION |
| 65 | bool "Speculative subroutine return" |
| 66 | depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL |
| 67 | help |
| 68 | This enables support for a speculative instruction fetch for |
| 69 | subroutine return. There are various pitfalls associated with |
| 70 | this, as outlined in the SH7780 hardware manual. |
| 71 | |
| 72 | If unsure, say N. |
| 73 | |
| 74 | config CPU_HAS_INTEVT |
| 75 | bool |
| 76 | |
| 77 | config CPU_HAS_MASKREG_IRQ |
| 78 | bool |
| 79 | |
| 80 | config CPU_HAS_IPR_IRQ |
| 81 | bool |
| 82 | |
| 83 | config CPU_HAS_SR_RB |
| 84 | bool |
| 85 | help |
| 86 | This will enable the use of SR.RB register bank usage. Processors |
| 87 | that are lacking this bit must have another method in place for |
| 88 | accomplishing what is taken care of by the banked registers. |
| 89 | |
| 90 | See <file:Documentation/sh/register-banks.txt> for further |
| 91 | information on SR.RB and register banking in the kernel in general. |
| 92 | |
| 93 | config CPU_HAS_PTEA |
| 94 | bool |
| 95 | |
| 96 | config CPU_HAS_DSP |
| 97 | bool |
| 98 | |
| 99 | config CPU_HAS_FPU |
| 100 | bool |
| 101 | |
| 102 | endmenu |