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Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +08001/*
2 * at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +080010#include "at91sam9g35.dtsi"
Boris Brezillon432a4a82014-07-31 09:37:06 +020011#include "at91sam9x5dm.dtsi"
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +080012#include "at91sam9x5ek.dtsi"
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080013
14/ {
15 model = "Atmel AT91SAM9G35-EK";
16 compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
Nicolas Ferre509ea1b2013-03-22 14:47:54 +010017
18 ahb {
19 apb {
20 macb0: ethernet@f802c000 {
21 phy-mode = "rmii";
22 status = "okay";
23 };
Boris Brezillon432a4a82014-07-31 09:37:06 +020024
25 hlcdc: hlcdc@f8038000 {
26 status = "okay";
27 };
Nicolas Ferre509ea1b2013-03-22 14:47:54 +010028 };
29 };
Boris Brezillon432a4a82014-07-31 09:37:06 +020030
31 backlight: backlight {
32 status = "okay";
33 };
34
35 bl_reg: backlight_regulator {
36 status = "okay";
37 };
38
39 panel: panel {
40 status = "okay";
41 };
42
43 panel_reg: panel_regulator {
44 status = "okay";
45 };
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080046};