Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's Exynos3250 SoC device tree source |
| 3 | * |
| 4 | * Copyright (c) 2014 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * Samsung's Exynos3250 SoC device nodes are listed in this file. Exynos3250 |
| 8 | * based board files can include this file and provide values for board specfic |
| 9 | * bindings. |
| 10 | * |
| 11 | * Note: This file does not include device nodes for all the controllers in |
| 12 | * Exynos3250 SoC. As device tree coverage for Exynos3250 increases, additional |
| 13 | * nodes can be added to this file. |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License version 2 as |
| 17 | * published by the Free Software Foundation. |
| 18 | */ |
| 19 | |
| 20 | #include "skeleton.dtsi" |
Lukasz Majewski | 9843a22 | 2015-01-30 08:26:03 +0900 | [diff] [blame] | 21 | #include "exynos4-cpu-thermal.dtsi" |
Javier Martinez Canillas | 1462b13 | 2016-02-16 12:25:48 -0300 | [diff] [blame] | 22 | #include "exynos-syscon-restart.dtsi" |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 23 | #include <dt-bindings/clock/exynos3250.h> |
| 24 | |
| 25 | / { |
| 26 | compatible = "samsung,exynos3250"; |
| 27 | interrupt-parent = <&gic>; |
| 28 | |
| 29 | aliases { |
| 30 | pinctrl0 = &pinctrl_0; |
| 31 | pinctrl1 = &pinctrl_1; |
| 32 | mshc0 = &mshc_0; |
| 33 | mshc1 = &mshc_1; |
Chanwoo Choi | 92173e6 | 2016-03-31 11:48:03 +0900 | [diff] [blame] | 34 | mshc2 = &mshc_2; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 35 | spi0 = &spi_0; |
| 36 | spi1 = &spi_1; |
| 37 | i2c0 = &i2c_0; |
| 38 | i2c1 = &i2c_1; |
| 39 | i2c2 = &i2c_2; |
| 40 | i2c3 = &i2c_3; |
| 41 | i2c4 = &i2c_4; |
| 42 | i2c5 = &i2c_5; |
| 43 | i2c6 = &i2c_6; |
| 44 | i2c7 = &i2c_7; |
Tomasz Figa | 1e64f48 | 2014-06-26 13:24:35 +0200 | [diff] [blame] | 45 | serial0 = &serial_0; |
| 46 | serial1 = &serial_1; |
Pankaj Dubey | ecaba51 | 2016-03-31 11:48:01 +0900 | [diff] [blame] | 47 | serial2 = &serial_2; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 48 | }; |
| 49 | |
| 50 | cpus { |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <0>; |
| 53 | |
| 54 | cpu0: cpu@0 { |
| 55 | device_type = "cpu"; |
| 56 | compatible = "arm,cortex-a7"; |
| 57 | reg = <0>; |
| 58 | clock-frequency = <1000000000>; |
Chanwoo Choi | 48816af | 2015-07-24 12:55:21 +0900 | [diff] [blame] | 59 | clocks = <&cmu CLK_ARM_CLK>; |
| 60 | clock-names = "cpu"; |
Chanwoo Choi | 5600f8c | 2015-07-30 23:02:22 +0900 | [diff] [blame] | 61 | #cooling-cells = <2>; |
Chanwoo Choi | 48816af | 2015-07-24 12:55:21 +0900 | [diff] [blame] | 62 | |
| 63 | operating-points = < |
| 64 | 1000000 1150000 |
| 65 | 900000 1112500 |
| 66 | 800000 1075000 |
| 67 | 700000 1037500 |
| 68 | 600000 1000000 |
| 69 | 500000 962500 |
| 70 | 400000 925000 |
| 71 | 300000 887500 |
| 72 | 200000 850000 |
| 73 | 100000 850000 |
| 74 | >; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 75 | }; |
| 76 | |
| 77 | cpu1: cpu@1 { |
| 78 | device_type = "cpu"; |
| 79 | compatible = "arm,cortex-a7"; |
| 80 | reg = <1>; |
| 81 | clock-frequency = <1000000000>; |
| 82 | }; |
| 83 | }; |
| 84 | |
| 85 | soc: soc { |
| 86 | compatible = "simple-bus"; |
| 87 | #address-cells = <1>; |
| 88 | #size-cells = <1>; |
| 89 | ranges; |
| 90 | |
| 91 | fixed-rate-clocks { |
| 92 | #address-cells = <1>; |
| 93 | #size-cells = <0>; |
| 94 | |
| 95 | xusbxti: clock@0 { |
| 96 | compatible = "fixed-clock"; |
| 97 | #address-cells = <1>; |
| 98 | #size-cells = <0>; |
| 99 | reg = <0>; |
| 100 | clock-frequency = <0>; |
| 101 | #clock-cells = <0>; |
| 102 | clock-output-names = "xusbxti"; |
| 103 | }; |
| 104 | |
| 105 | xxti: clock@1 { |
| 106 | compatible = "fixed-clock"; |
| 107 | reg = <1>; |
| 108 | clock-frequency = <0>; |
| 109 | #clock-cells = <0>; |
| 110 | clock-output-names = "xxti"; |
| 111 | }; |
| 112 | |
| 113 | xtcxo: clock@2 { |
| 114 | compatible = "fixed-clock"; |
| 115 | reg = <2>; |
| 116 | clock-frequency = <0>; |
| 117 | #clock-cells = <0>; |
| 118 | clock-output-names = "xtcxo"; |
| 119 | }; |
| 120 | }; |
| 121 | |
| 122 | sysram@02020000 { |
| 123 | compatible = "mmio-sram"; |
| 124 | reg = <0x02020000 0x40000>; |
| 125 | #address-cells = <1>; |
| 126 | #size-cells = <1>; |
| 127 | ranges = <0 0x02020000 0x40000>; |
| 128 | |
| 129 | smp-sysram@0 { |
| 130 | compatible = "samsung,exynos4210-sysram"; |
| 131 | reg = <0x0 0x1000>; |
| 132 | }; |
| 133 | |
| 134 | smp-sysram@3f000 { |
| 135 | compatible = "samsung,exynos4210-sysram-ns"; |
| 136 | reg = <0x3f000 0x1000>; |
| 137 | }; |
| 138 | }; |
| 139 | |
| 140 | chipid@10000000 { |
| 141 | compatible = "samsung,exynos4210-chipid"; |
| 142 | reg = <0x10000000 0x100>; |
| 143 | }; |
| 144 | |
| 145 | sys_reg: syscon@10010000 { |
| 146 | compatible = "samsung,exynos3-sysreg", "syscon"; |
| 147 | reg = <0x10010000 0x400>; |
| 148 | }; |
| 149 | |
Chanwoo Choi | 2502392 | 2014-05-31 02:17:22 +0900 | [diff] [blame] | 150 | pmu_system_controller: system-controller@10020000 { |
| 151 | compatible = "samsung,exynos3250-pmu", "syscon"; |
| 152 | reg = <0x10020000 0x4000>; |
Marc Zyngier | 8b283c0 | 2015-03-11 15:44:52 +0000 | [diff] [blame] | 153 | interrupt-controller; |
| 154 | #interrupt-cells = <3>; |
| 155 | interrupt-parent = <&gic>; |
Chanwoo Choi | 2502392 | 2014-05-31 02:17:22 +0900 | [diff] [blame] | 156 | }; |
| 157 | |
Krzysztof Kozlowski | bb72cad | 2016-04-06 11:00:41 +0900 | [diff] [blame] | 158 | mipi_phy: video-phy { |
Inki Dae | 9fab9d6 | 2014-08-13 20:46:12 +0900 | [diff] [blame] | 159 | compatible = "samsung,s5pv210-mipi-video-phy"; |
Inki Dae | 9fab9d6 | 2014-08-13 20:46:12 +0900 | [diff] [blame] | 160 | #phy-cells = <1>; |
Beata Michalska | 1342ff4 | 2015-06-15 10:12:46 +0200 | [diff] [blame] | 161 | syscon = <&pmu_system_controller>; |
Inki Dae | 9fab9d6 | 2014-08-13 20:46:12 +0900 | [diff] [blame] | 162 | }; |
| 163 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 164 | pd_cam: cam-power-domain@10023C00 { |
| 165 | compatible = "samsung,exynos4210-pd"; |
| 166 | reg = <0x10023C00 0x20>; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 167 | #power-domain-cells = <0>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 168 | }; |
| 169 | |
| 170 | pd_mfc: mfc-power-domain@10023C40 { |
| 171 | compatible = "samsung,exynos4210-pd"; |
| 172 | reg = <0x10023C40 0x20>; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 173 | #power-domain-cells = <0>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 174 | }; |
| 175 | |
| 176 | pd_g3d: g3d-power-domain@10023C60 { |
| 177 | compatible = "samsung,exynos4210-pd"; |
| 178 | reg = <0x10023C60 0x20>; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 179 | #power-domain-cells = <0>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 180 | }; |
| 181 | |
| 182 | pd_lcd0: lcd0-power-domain@10023C80 { |
| 183 | compatible = "samsung,exynos4210-pd"; |
| 184 | reg = <0x10023C80 0x20>; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 185 | #power-domain-cells = <0>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 186 | }; |
| 187 | |
| 188 | pd_isp: isp-power-domain@10023CA0 { |
| 189 | compatible = "samsung,exynos4210-pd"; |
| 190 | reg = <0x10023CA0 0x20>; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 191 | #power-domain-cells = <0>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 192 | }; |
| 193 | |
| 194 | cmu: clock-controller@10030000 { |
| 195 | compatible = "samsung,exynos3250-cmu"; |
| 196 | reg = <0x10030000 0x20000>; |
| 197 | #clock-cells = <1>; |
Beata Michalska | 52005de | 2015-03-18 00:21:46 +0900 | [diff] [blame] | 198 | assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>, |
| 199 | <&cmu CLK_MOUT_ACLK_266_SUB>; |
| 200 | assigned-clock-parents = <&cmu CLK_FIN_PLL>, |
| 201 | <&cmu CLK_FIN_PLL>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 202 | }; |
| 203 | |
Krzysztof Kozlowski | d0e73ea | 2014-09-02 15:21:16 +0200 | [diff] [blame] | 204 | cmu_dmc: clock-controller@105C0000 { |
| 205 | compatible = "samsung,exynos3250-cmu-dmc"; |
| 206 | reg = <0x105C0000 0x2000>; |
| 207 | #clock-cells = <1>; |
| 208 | }; |
| 209 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 210 | rtc: rtc@10070000 { |
Krzysztof Kozlowski | 062f49c | 2015-05-02 14:33:55 +0900 | [diff] [blame] | 211 | compatible = "samsung,s3c6410-rtc"; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 212 | reg = <0x10070000 0x100>; |
| 213 | interrupts = <0 73 0>, <0 74 0>; |
Marc Zyngier | 8b283c0 | 2015-03-11 15:44:52 +0000 | [diff] [blame] | 214 | interrupt-parent = <&pmu_system_controller>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 215 | status = "disabled"; |
| 216 | }; |
| 217 | |
Chanwoo Choi | 9dfb334 | 2014-07-30 07:57:24 +0900 | [diff] [blame] | 218 | tmu: tmu@100C0000 { |
| 219 | compatible = "samsung,exynos3250-tmu"; |
| 220 | reg = <0x100C0000 0x100>; |
| 221 | interrupts = <0 216 0>; |
| 222 | clocks = <&cmu CLK_TMU_APBIF>; |
| 223 | clock-names = "tmu_apbif"; |
Lukasz Majewski | 9843a22 | 2015-01-30 08:26:03 +0900 | [diff] [blame] | 224 | #include "exynos4412-tmu-sensor-conf.dtsi" |
Chanwoo Choi | 9dfb334 | 2014-07-30 07:57:24 +0900 | [diff] [blame] | 225 | status = "disabled"; |
| 226 | }; |
| 227 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 228 | gic: interrupt-controller@10481000 { |
| 229 | compatible = "arm,cortex-a15-gic"; |
| 230 | #interrupt-cells = <3>; |
| 231 | interrupt-controller; |
| 232 | reg = <0x10481000 0x1000>, |
| 233 | <0x10482000 0x1000>, |
| 234 | <0x10484000 0x2000>, |
| 235 | <0x10486000 0x2000>; |
| 236 | interrupts = <1 9 0xf04>; |
| 237 | }; |
| 238 | |
| 239 | mct@10050000 { |
| 240 | compatible = "samsung,exynos4210-mct"; |
| 241 | reg = <0x10050000 0x800>; |
| 242 | interrupts = <0 218 0>, <0 219 0>, <0 220 0>, <0 221 0>, |
| 243 | <0 223 0>, <0 226 0>, <0 227 0>, <0 228 0>; |
| 244 | clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>; |
| 245 | clock-names = "fin_pll", "mct"; |
| 246 | }; |
| 247 | |
| 248 | pinctrl_1: pinctrl@11000000 { |
| 249 | compatible = "samsung,exynos3250-pinctrl"; |
| 250 | reg = <0x11000000 0x1000>; |
| 251 | interrupts = <0 225 0>; |
| 252 | |
| 253 | wakeup-interrupt-controller { |
| 254 | compatible = "samsung,exynos4210-wakeup-eint"; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 255 | interrupts = <0 48 0>; |
| 256 | }; |
| 257 | }; |
| 258 | |
| 259 | pinctrl_0: pinctrl@11400000 { |
| 260 | compatible = "samsung,exynos3250-pinctrl"; |
| 261 | reg = <0x11400000 0x1000>; |
| 262 | interrupts = <0 240 0>; |
| 263 | }; |
| 264 | |
Jacek Anaszewski | c9c1adf | 2015-05-09 02:26:45 +0900 | [diff] [blame] | 265 | jpeg: codec@11830000 { |
| 266 | compatible = "samsung,exynos3250-jpeg"; |
| 267 | reg = <0x11830000 0x1000>; |
| 268 | interrupts = <0 171 0>; |
| 269 | clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>; |
| 270 | clock-names = "jpeg", "sclk"; |
| 271 | power-domains = <&pd_cam>; |
| 272 | assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>; |
| 273 | assigned-clock-rates = <0>, <150000000>; |
| 274 | assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>; |
Marek Szyprowski | f5976ce | 2015-06-04 08:09:41 +0900 | [diff] [blame] | 275 | iommus = <&sysmmu_jpeg>; |
Jacek Anaszewski | c9c1adf | 2015-05-09 02:26:45 +0900 | [diff] [blame] | 276 | status = "disabled"; |
| 277 | }; |
| 278 | |
Marek Szyprowski | f5976ce | 2015-06-04 08:09:41 +0900 | [diff] [blame] | 279 | sysmmu_jpeg: sysmmu@11A60000 { |
| 280 | compatible = "samsung,exynos-sysmmu"; |
| 281 | reg = <0x11a60000 0x1000>; |
| 282 | interrupts = <0 156 0>, <0 161 0>; |
| 283 | clock-names = "sysmmu", "master"; |
| 284 | clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>; |
| 285 | power-domains = <&pd_cam>; |
| 286 | #iommu-cells = <0>; |
| 287 | }; |
| 288 | |
Inki Dae | 03b86c79 | 2014-08-13 20:37:53 +0900 | [diff] [blame] | 289 | fimd: fimd@11c00000 { |
| 290 | compatible = "samsung,exynos3250-fimd"; |
| 291 | reg = <0x11c00000 0x30000>; |
| 292 | interrupt-names = "fifo", "vsync", "lcd_sys"; |
| 293 | interrupts = <0 84 0>, <0 85 0>, <0 86 0>; |
| 294 | clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>; |
| 295 | clock-names = "sclk_fimd", "fimd"; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 296 | power-domains = <&pd_lcd0>; |
Marek Szyprowski | f5976ce | 2015-06-04 08:09:41 +0900 | [diff] [blame] | 297 | iommus = <&sysmmu_fimd0>; |
Inki Dae | 03b86c79 | 2014-08-13 20:37:53 +0900 | [diff] [blame] | 298 | samsung,sysreg = <&sys_reg>; |
| 299 | status = "disabled"; |
| 300 | }; |
| 301 | |
Inki Dae | 025d8e1 | 2014-08-13 20:53:47 +0900 | [diff] [blame] | 302 | dsi_0: dsi@11C80000 { |
| 303 | compatible = "samsung,exynos3250-mipi-dsi"; |
| 304 | reg = <0x11C80000 0x10000>; |
| 305 | interrupts = <0 83 0>; |
| 306 | samsung,phy-type = <0>; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 307 | power-domains = <&pd_lcd0>; |
Inki Dae | 025d8e1 | 2014-08-13 20:53:47 +0900 | [diff] [blame] | 308 | phys = <&mipi_phy 1>; |
| 309 | phy-names = "dsim"; |
| 310 | clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>; |
| 311 | clock-names = "bus_clk", "pll_clk"; |
| 312 | #address-cells = <1>; |
| 313 | #size-cells = <0>; |
| 314 | status = "disabled"; |
| 315 | }; |
| 316 | |
Marek Szyprowski | f5976ce | 2015-06-04 08:09:41 +0900 | [diff] [blame] | 317 | sysmmu_fimd0: sysmmu@11E20000 { |
| 318 | compatible = "samsung,exynos-sysmmu"; |
| 319 | reg = <0x11e20000 0x1000>; |
| 320 | interrupts = <0 80 0>, <0 81 0>; |
| 321 | clock-names = "sysmmu", "master"; |
| 322 | clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>; |
| 323 | power-domains = <&pd_lcd0>; |
| 324 | #iommu-cells = <0>; |
| 325 | }; |
| 326 | |
Jaewon Kim | e0c6e92 | 2015-01-12 17:54:54 +0900 | [diff] [blame] | 327 | hsotg: hsotg@12480000 { |
| 328 | compatible = "snps,dwc2"; |
| 329 | reg = <0x12480000 0x20000>; |
| 330 | interrupts = <0 141 0>; |
| 331 | clocks = <&cmu CLK_USBOTG>; |
| 332 | clock-names = "otg"; |
| 333 | phys = <&exynos_usbphy 0>; |
| 334 | phy-names = "usb2-phy"; |
| 335 | status = "disabled"; |
| 336 | }; |
| 337 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 338 | mshc_0: mshc@12510000 { |
Jaehoon Chung | b29dd5f | 2015-10-24 03:42:02 +0900 | [diff] [blame] | 339 | compatible = "samsung,exynos5420-dw-mshc"; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 340 | reg = <0x12510000 0x1000>; |
| 341 | interrupts = <0 142 0>; |
| 342 | clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>; |
| 343 | clock-names = "biu", "ciu"; |
| 344 | fifo-depth = <0x80>; |
| 345 | #address-cells = <1>; |
| 346 | #size-cells = <0>; |
| 347 | status = "disabled"; |
| 348 | }; |
| 349 | |
| 350 | mshc_1: mshc@12520000 { |
Jaehoon Chung | b29dd5f | 2015-10-24 03:42:02 +0900 | [diff] [blame] | 351 | compatible = "samsung,exynos5420-dw-mshc"; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 352 | reg = <0x12520000 0x1000>; |
| 353 | interrupts = <0 143 0>; |
| 354 | clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>; |
| 355 | clock-names = "biu", "ciu"; |
| 356 | fifo-depth = <0x80>; |
| 357 | #address-cells = <1>; |
| 358 | #size-cells = <0>; |
| 359 | status = "disabled"; |
| 360 | }; |
| 361 | |
Chanwoo Choi | 92173e6 | 2016-03-31 11:48:03 +0900 | [diff] [blame] | 362 | mshc_2: mshc@12530000 { |
| 363 | compatible = "samsung,exynos5250-dw-mshc"; |
| 364 | reg = <0x12530000 0x1000>; |
| 365 | interrupts = <0 144 0>; |
| 366 | clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>; |
| 367 | clock-names = "biu", "ciu"; |
| 368 | fifo-depth = <0x80>; |
| 369 | #address-cells = <1>; |
| 370 | #size-cells = <0>; |
| 371 | status = "disabled"; |
| 372 | }; |
| 373 | |
Jaewon Kim | 11ab02b | 2015-01-12 17:54:54 +0900 | [diff] [blame] | 374 | exynos_usbphy: exynos-usbphy@125B0000 { |
| 375 | compatible = "samsung,exynos3250-usb2-phy"; |
| 376 | reg = <0x125B0000 0x100>; |
| 377 | samsung,pmureg-phandle = <&pmu_system_controller>; |
| 378 | clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>; |
| 379 | clock-names = "phy", "ref"; |
| 380 | #phy-cells = <1>; |
| 381 | status = "disabled"; |
| 382 | }; |
| 383 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 384 | amba { |
Masahiro Yamada | 2ef7d5f | 2016-03-09 13:26:45 +0900 | [diff] [blame] | 385 | compatible = "simple-bus"; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 386 | #address-cells = <1>; |
| 387 | #size-cells = <1>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 388 | ranges; |
| 389 | |
| 390 | pdma0: pdma@12680000 { |
| 391 | compatible = "arm,pl330", "arm,primecell"; |
| 392 | reg = <0x12680000 0x1000>; |
| 393 | interrupts = <0 138 0>; |
| 394 | clocks = <&cmu CLK_PDMA0>; |
| 395 | clock-names = "apb_pclk"; |
| 396 | #dma-cells = <1>; |
| 397 | #dma-channels = <8>; |
| 398 | #dma-requests = <32>; |
| 399 | }; |
| 400 | |
| 401 | pdma1: pdma@12690000 { |
| 402 | compatible = "arm,pl330", "arm,primecell"; |
| 403 | reg = <0x12690000 0x1000>; |
| 404 | interrupts = <0 139 0>; |
| 405 | clocks = <&cmu CLK_PDMA1>; |
| 406 | clock-names = "apb_pclk"; |
| 407 | #dma-cells = <1>; |
| 408 | #dma-channels = <8>; |
| 409 | #dma-requests = <32>; |
| 410 | }; |
| 411 | }; |
| 412 | |
| 413 | adc: adc@126C0000 { |
Chanwoo Choi | e6ca2d8 | 2014-07-22 03:04:00 +0100 | [diff] [blame] | 414 | compatible = "samsung,exynos3250-adc", |
| 415 | "samsung,exynos-adc-v2"; |
Naveen Krishna Chatradhi | db9bf4d6 | 2014-09-16 09:58:00 +0100 | [diff] [blame] | 416 | reg = <0x126C0000 0x100>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 417 | interrupts = <0 137 0>; |
Chanwoo Choi | e6ca2d8 | 2014-07-22 03:04:00 +0100 | [diff] [blame] | 418 | clock-names = "adc", "sclk"; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 419 | clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>; |
| 420 | #io-channel-cells = <1>; |
| 421 | io-channel-ranges; |
Naveen Krishna Chatradhi | db9bf4d6 | 2014-09-16 09:58:00 +0100 | [diff] [blame] | 422 | samsung,syscon-phandle = <&pmu_system_controller>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 423 | status = "disabled"; |
| 424 | }; |
| 425 | |
Jacek Anaszewski | 752d3a2 | 2014-09-24 01:33:23 +0900 | [diff] [blame] | 426 | mfc: codec@13400000 { |
| 427 | compatible = "samsung,mfc-v7"; |
| 428 | reg = <0x13400000 0x10000>; |
| 429 | interrupts = <0 102 0>; |
| 430 | clock-names = "mfc", "sclk_mfc"; |
| 431 | clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>; |
Marek Szyprowski | 0da6587 | 2015-01-24 13:16:15 +0900 | [diff] [blame] | 432 | power-domains = <&pd_mfc>; |
Marek Szyprowski | f5976ce | 2015-06-04 08:09:41 +0900 | [diff] [blame] | 433 | iommus = <&sysmmu_mfc>; |
Jacek Anaszewski | 752d3a2 | 2014-09-24 01:33:23 +0900 | [diff] [blame] | 434 | }; |
| 435 | |
Marek Szyprowski | f5976ce | 2015-06-04 08:09:41 +0900 | [diff] [blame] | 436 | sysmmu_mfc: sysmmu@13620000 { |
| 437 | compatible = "samsung,exynos-sysmmu"; |
| 438 | reg = <0x13620000 0x1000>; |
| 439 | interrupts = <0 96 0>, <0 98 0>; |
| 440 | clock-names = "sysmmu", "master"; |
| 441 | clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>; |
| 442 | power-domains = <&pd_mfc>; |
| 443 | #iommu-cells = <0>; |
| 444 | }; |
| 445 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 446 | serial_0: serial@13800000 { |
| 447 | compatible = "samsung,exynos4210-uart"; |
| 448 | reg = <0x13800000 0x100>; |
| 449 | interrupts = <0 109 0>; |
| 450 | clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>; |
| 451 | clock-names = "uart", "clk_uart_baud0"; |
Chanwoo Choi | a9408a6 | 2014-07-30 07:57:32 +0900 | [diff] [blame] | 452 | pinctrl-names = "default"; |
| 453 | pinctrl-0 = <&uart0_data &uart0_fctl>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 454 | status = "disabled"; |
| 455 | }; |
| 456 | |
| 457 | serial_1: serial@13810000 { |
| 458 | compatible = "samsung,exynos4210-uart"; |
| 459 | reg = <0x13810000 0x100>; |
| 460 | interrupts = <0 110 0>; |
| 461 | clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>; |
| 462 | clock-names = "uart", "clk_uart_baud0"; |
Chanwoo Choi | a9408a6 | 2014-07-30 07:57:32 +0900 | [diff] [blame] | 463 | pinctrl-names = "default"; |
| 464 | pinctrl-0 = <&uart1_data>; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 465 | status = "disabled"; |
| 466 | }; |
| 467 | |
Pankaj Dubey | ecaba51 | 2016-03-31 11:48:01 +0900 | [diff] [blame] | 468 | serial_2: serial@13820000 { |
| 469 | compatible = "samsung,exynos4210-uart"; |
| 470 | reg = <0x13820000 0x100>; |
| 471 | interrupts = <0 111 0>; |
| 472 | clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>; |
| 473 | clock-names = "uart", "clk_uart_baud0"; |
| 474 | pinctrl-names = "default"; |
| 475 | pinctrl-0 = <&uart2_data>; |
| 476 | status = "disabled"; |
| 477 | }; |
| 478 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 479 | i2c_0: i2c@13860000 { |
| 480 | #address-cells = <1>; |
| 481 | #size-cells = <0>; |
| 482 | compatible = "samsung,s3c2440-i2c"; |
| 483 | reg = <0x13860000 0x100>; |
| 484 | interrupts = <0 113 0>; |
| 485 | clocks = <&cmu CLK_I2C0>; |
| 486 | clock-names = "i2c"; |
| 487 | pinctrl-names = "default"; |
| 488 | pinctrl-0 = <&i2c0_bus>; |
| 489 | status = "disabled"; |
| 490 | }; |
| 491 | |
| 492 | i2c_1: i2c@13870000 { |
| 493 | #address-cells = <1>; |
| 494 | #size-cells = <0>; |
| 495 | compatible = "samsung,s3c2440-i2c"; |
| 496 | reg = <0x13870000 0x100>; |
| 497 | interrupts = <0 114 0>; |
| 498 | clocks = <&cmu CLK_I2C1>; |
| 499 | clock-names = "i2c"; |
| 500 | pinctrl-names = "default"; |
| 501 | pinctrl-0 = <&i2c1_bus>; |
| 502 | status = "disabled"; |
| 503 | }; |
| 504 | |
| 505 | i2c_2: i2c@13880000 { |
| 506 | #address-cells = <1>; |
| 507 | #size-cells = <0>; |
| 508 | compatible = "samsung,s3c2440-i2c"; |
| 509 | reg = <0x13880000 0x100>; |
| 510 | interrupts = <0 115 0>; |
| 511 | clocks = <&cmu CLK_I2C2>; |
| 512 | clock-names = "i2c"; |
| 513 | pinctrl-names = "default"; |
| 514 | pinctrl-0 = <&i2c2_bus>; |
| 515 | status = "disabled"; |
| 516 | }; |
| 517 | |
| 518 | i2c_3: i2c@13890000 { |
| 519 | #address-cells = <1>; |
| 520 | #size-cells = <0>; |
| 521 | compatible = "samsung,s3c2440-i2c"; |
| 522 | reg = <0x13890000 0x100>; |
| 523 | interrupts = <0 116 0>; |
| 524 | clocks = <&cmu CLK_I2C3>; |
| 525 | clock-names = "i2c"; |
| 526 | pinctrl-names = "default"; |
| 527 | pinctrl-0 = <&i2c3_bus>; |
| 528 | status = "disabled"; |
| 529 | }; |
| 530 | |
| 531 | i2c_4: i2c@138A0000 { |
| 532 | #address-cells = <1>; |
| 533 | #size-cells = <0>; |
| 534 | compatible = "samsung,s3c2440-i2c"; |
| 535 | reg = <0x138A0000 0x100>; |
| 536 | interrupts = <0 117 0>; |
| 537 | clocks = <&cmu CLK_I2C4>; |
| 538 | clock-names = "i2c"; |
| 539 | pinctrl-names = "default"; |
| 540 | pinctrl-0 = <&i2c4_bus>; |
| 541 | status = "disabled"; |
| 542 | }; |
| 543 | |
| 544 | i2c_5: i2c@138B0000 { |
| 545 | #address-cells = <1>; |
| 546 | #size-cells = <0>; |
| 547 | compatible = "samsung,s3c2440-i2c"; |
| 548 | reg = <0x138B0000 0x100>; |
| 549 | interrupts = <0 118 0>; |
| 550 | clocks = <&cmu CLK_I2C5>; |
| 551 | clock-names = "i2c"; |
| 552 | pinctrl-names = "default"; |
| 553 | pinctrl-0 = <&i2c5_bus>; |
| 554 | status = "disabled"; |
| 555 | }; |
| 556 | |
| 557 | i2c_6: i2c@138C0000 { |
| 558 | #address-cells = <1>; |
| 559 | #size-cells = <0>; |
| 560 | compatible = "samsung,s3c2440-i2c"; |
| 561 | reg = <0x138C0000 0x100>; |
| 562 | interrupts = <0 119 0>; |
| 563 | clocks = <&cmu CLK_I2C6>; |
| 564 | clock-names = "i2c"; |
| 565 | pinctrl-names = "default"; |
| 566 | pinctrl-0 = <&i2c6_bus>; |
| 567 | status = "disabled"; |
| 568 | }; |
| 569 | |
| 570 | i2c_7: i2c@138D0000 { |
| 571 | #address-cells = <1>; |
| 572 | #size-cells = <0>; |
| 573 | compatible = "samsung,s3c2440-i2c"; |
| 574 | reg = <0x138D0000 0x100>; |
| 575 | interrupts = <0 120 0>; |
| 576 | clocks = <&cmu CLK_I2C7>; |
| 577 | clock-names = "i2c"; |
| 578 | pinctrl-names = "default"; |
| 579 | pinctrl-0 = <&i2c7_bus>; |
| 580 | status = "disabled"; |
| 581 | }; |
| 582 | |
| 583 | spi_0: spi@13920000 { |
| 584 | compatible = "samsung,exynos4210-spi"; |
| 585 | reg = <0x13920000 0x100>; |
| 586 | interrupts = <0 121 0>; |
| 587 | dmas = <&pdma0 7>, <&pdma0 6>; |
| 588 | dma-names = "tx", "rx"; |
| 589 | #address-cells = <1>; |
| 590 | #size-cells = <0>; |
| 591 | clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>; |
| 592 | clock-names = "spi", "spi_busclk0"; |
| 593 | samsung,spi-src-clk = <0>; |
| 594 | pinctrl-names = "default"; |
| 595 | pinctrl-0 = <&spi0_bus>; |
| 596 | status = "disabled"; |
| 597 | }; |
| 598 | |
| 599 | spi_1: spi@13930000 { |
| 600 | compatible = "samsung,exynos4210-spi"; |
| 601 | reg = <0x13930000 0x100>; |
| 602 | interrupts = <0 122 0>; |
| 603 | dmas = <&pdma1 7>, <&pdma1 6>; |
| 604 | dma-names = "tx", "rx"; |
| 605 | #address-cells = <1>; |
| 606 | #size-cells = <0>; |
| 607 | clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>; |
| 608 | clock-names = "spi", "spi_busclk0"; |
| 609 | samsung,spi-src-clk = <0>; |
| 610 | pinctrl-names = "default"; |
| 611 | pinctrl-0 = <&spi1_bus>; |
| 612 | status = "disabled"; |
| 613 | }; |
| 614 | |
Tomasz Figa | ccaba45 | 2014-07-19 04:10:44 +0900 | [diff] [blame] | 615 | i2s2: i2s@13970000 { |
| 616 | compatible = "samsung,s3c6410-i2s"; |
| 617 | reg = <0x13970000 0x100>; |
| 618 | interrupts = <0 126 0>; |
| 619 | clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>; |
| 620 | clock-names = "iis", "i2s_opclk0"; |
| 621 | dmas = <&pdma0 14>, <&pdma0 13>; |
| 622 | dma-names = "tx", "rx"; |
| 623 | pinctrl-0 = <&i2s2_bus>; |
| 624 | pinctrl-names = "default"; |
| 625 | status = "disabled"; |
| 626 | }; |
| 627 | |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 628 | pwm: pwm@139D0000 { |
| 629 | compatible = "samsung,exynos4210-pwm"; |
| 630 | reg = <0x139D0000 0x1000>; |
| 631 | interrupts = <0 104 0>, <0 105 0>, <0 106 0>, |
| 632 | <0 107 0>, <0 108 0>; |
| 633 | #pwm-cells = <3>; |
| 634 | status = "disabled"; |
| 635 | }; |
| 636 | |
| 637 | pmu { |
| 638 | compatible = "arm,cortex-a7-pmu"; |
| 639 | interrupts = <0 18 0>, <0 19 0>; |
| 640 | }; |
Chanwoo Choi | e450236 | 2015-02-04 08:10:58 +0900 | [diff] [blame] | 641 | |
| 642 | ppmu_dmc0: ppmu_dmc0@106a0000 { |
| 643 | compatible = "samsung,exynos-ppmu"; |
| 644 | reg = <0x106a0000 0x2000>; |
| 645 | status = "disabled"; |
| 646 | }; |
| 647 | |
| 648 | ppmu_dmc1: ppmu_dmc1@106b0000 { |
| 649 | compatible = "samsung,exynos-ppmu"; |
| 650 | reg = <0x106b0000 0x2000>; |
| 651 | status = "disabled"; |
| 652 | }; |
| 653 | |
| 654 | ppmu_cpu: ppmu_cpu@106c0000 { |
| 655 | compatible = "samsung,exynos-ppmu"; |
| 656 | reg = <0x106c0000 0x2000>; |
| 657 | status = "disabled"; |
| 658 | }; |
| 659 | |
| 660 | ppmu_rightbus: ppmu_rightbus@112a0000 { |
| 661 | compatible = "samsung,exynos-ppmu"; |
| 662 | reg = <0x112a0000 0x2000>; |
| 663 | clocks = <&cmu CLK_PPMURIGHT>; |
| 664 | clock-names = "ppmu"; |
| 665 | status = "disabled"; |
| 666 | }; |
| 667 | |
| 668 | ppmu_leftbus: ppmu_leftbus0@116a0000 { |
| 669 | compatible = "samsung,exynos-ppmu"; |
| 670 | reg = <0x116a0000 0x2000>; |
| 671 | clocks = <&cmu CLK_PPMULEFT>; |
| 672 | clock-names = "ppmu"; |
| 673 | status = "disabled"; |
| 674 | }; |
| 675 | |
| 676 | ppmu_camif: ppmu_camif@11ac0000 { |
| 677 | compatible = "samsung,exynos-ppmu"; |
| 678 | reg = <0x11ac0000 0x2000>; |
| 679 | clocks = <&cmu CLK_PPMUCAMIF>; |
| 680 | clock-names = "ppmu"; |
| 681 | status = "disabled"; |
| 682 | }; |
| 683 | |
| 684 | ppmu_lcd0: ppmu_lcd0@11e40000 { |
| 685 | compatible = "samsung,exynos-ppmu"; |
| 686 | reg = <0x11e40000 0x2000>; |
| 687 | clocks = <&cmu CLK_PPMULCD0>; |
| 688 | clock-names = "ppmu"; |
| 689 | status = "disabled"; |
| 690 | }; |
| 691 | |
| 692 | ppmu_fsys: ppmu_fsys@12630000 { |
| 693 | compatible = "samsung,exynos-ppmu"; |
| 694 | reg = <0x12630000 0x2000>; |
| 695 | clocks = <&cmu CLK_PPMUFILE>; |
| 696 | clock-names = "ppmu"; |
| 697 | status = "disabled"; |
| 698 | }; |
| 699 | |
| 700 | ppmu_g3d: ppmu_g3d@13220000 { |
| 701 | compatible = "samsung,exynos-ppmu"; |
| 702 | reg = <0x13220000 0x2000>; |
| 703 | clocks = <&cmu CLK_PPMUG3D>; |
| 704 | clock-names = "ppmu"; |
| 705 | status = "disabled"; |
| 706 | }; |
| 707 | |
| 708 | ppmu_mfc: ppmu_mfc@13660000 { |
| 709 | compatible = "samsung,exynos-ppmu"; |
| 710 | reg = <0x13660000 0x2000>; |
| 711 | clocks = <&cmu CLK_PPMUMFC_L>; |
| 712 | clock-names = "ppmu"; |
| 713 | status = "disabled"; |
| 714 | }; |
Chanwoo Choi | 6b088a6 | 2016-04-11 12:57:49 +0900 | [diff] [blame] | 715 | |
| 716 | bus_dmc: bus_dmc { |
| 717 | compatible = "samsung,exynos-bus"; |
| 718 | clocks = <&cmu_dmc CLK_DIV_DMC>; |
| 719 | clock-names = "bus"; |
| 720 | operating-points-v2 = <&bus_dmc_opp_table>; |
| 721 | status = "disabled"; |
| 722 | }; |
| 723 | |
| 724 | bus_dmc_opp_table: opp_table1 { |
| 725 | compatible = "operating-points-v2"; |
| 726 | opp-shared; |
| 727 | |
| 728 | opp@50000000 { |
| 729 | opp-hz = /bits/ 64 <50000000>; |
| 730 | opp-microvolt = <800000>; |
| 731 | }; |
| 732 | opp@100000000 { |
| 733 | opp-hz = /bits/ 64 <100000000>; |
| 734 | opp-microvolt = <800000>; |
| 735 | }; |
| 736 | opp@134000000 { |
| 737 | opp-hz = /bits/ 64 <134000000>; |
| 738 | opp-microvolt = <800000>; |
| 739 | }; |
| 740 | opp@200000000 { |
| 741 | opp-hz = /bits/ 64 <200000000>; |
| 742 | opp-microvolt = <825000>; |
| 743 | }; |
| 744 | opp@400000000 { |
| 745 | opp-hz = /bits/ 64 <400000000>; |
| 746 | opp-microvolt = <875000>; |
| 747 | }; |
| 748 | }; |
Chanwoo Choi | 304d10a | 2016-04-11 12:57:51 +0900 | [diff] [blame] | 749 | |
| 750 | bus_leftbus: bus_leftbus { |
| 751 | compatible = "samsung,exynos-bus"; |
| 752 | clocks = <&cmu CLK_DIV_GDL>; |
| 753 | clock-names = "bus"; |
| 754 | operating-points-v2 = <&bus_leftbus_opp_table>; |
| 755 | status = "disabled"; |
| 756 | }; |
| 757 | |
| 758 | bus_rightbus: bus_rightbus { |
| 759 | compatible = "samsung,exynos-bus"; |
| 760 | clocks = <&cmu CLK_DIV_GDR>; |
| 761 | clock-names = "bus"; |
| 762 | operating-points-v2 = <&bus_leftbus_opp_table>; |
| 763 | status = "disabled"; |
| 764 | }; |
| 765 | |
| 766 | bus_lcd0: bus_lcd0 { |
| 767 | compatible = "samsung,exynos-bus"; |
| 768 | clocks = <&cmu CLK_DIV_ACLK_160>; |
| 769 | clock-names = "bus"; |
| 770 | operating-points-v2 = <&bus_leftbus_opp_table>; |
| 771 | status = "disabled"; |
| 772 | }; |
| 773 | |
| 774 | bus_fsys: bus_fsys { |
| 775 | compatible = "samsung,exynos-bus"; |
| 776 | clocks = <&cmu CLK_DIV_ACLK_200>; |
| 777 | clock-names = "bus"; |
| 778 | operating-points-v2 = <&bus_leftbus_opp_table>; |
| 779 | status = "disabled"; |
| 780 | }; |
| 781 | |
| 782 | bus_mcuisp: bus_mcuisp { |
| 783 | compatible = "samsung,exynos-bus"; |
| 784 | clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>; |
| 785 | clock-names = "bus"; |
| 786 | operating-points-v2 = <&bus_mcuisp_opp_table>; |
| 787 | status = "disabled"; |
| 788 | }; |
| 789 | |
| 790 | bus_isp: bus_isp { |
| 791 | compatible = "samsung,exynos-bus"; |
| 792 | clocks = <&cmu CLK_DIV_ACLK_266>; |
| 793 | clock-names = "bus"; |
| 794 | operating-points-v2 = <&bus_isp_opp_table>; |
| 795 | status = "disabled"; |
| 796 | }; |
| 797 | |
| 798 | bus_peril: bus_peril { |
| 799 | compatible = "samsung,exynos-bus"; |
| 800 | clocks = <&cmu CLK_DIV_ACLK_100>; |
| 801 | clock-names = "bus"; |
| 802 | operating-points-v2 = <&bus_peril_opp_table>; |
| 803 | status = "disabled"; |
| 804 | }; |
| 805 | |
| 806 | bus_mfc: bus_mfc { |
| 807 | compatible = "samsung,exynos-bus"; |
| 808 | clocks = <&cmu CLK_SCLK_MFC>; |
| 809 | clock-names = "bus"; |
| 810 | operating-points-v2 = <&bus_leftbus_opp_table>; |
| 811 | status = "disabled"; |
| 812 | }; |
| 813 | |
| 814 | bus_leftbus_opp_table: opp_table2 { |
| 815 | compatible = "operating-points-v2"; |
| 816 | opp-shared; |
| 817 | |
| 818 | opp@50000000 { |
| 819 | opp-hz = /bits/ 64 <50000000>; |
| 820 | opp-microvolt = <900000>; |
| 821 | }; |
| 822 | opp@80000000 { |
| 823 | opp-hz = /bits/ 64 <80000000>; |
| 824 | opp-microvolt = <900000>; |
| 825 | }; |
| 826 | opp@100000000 { |
| 827 | opp-hz = /bits/ 64 <100000000>; |
| 828 | opp-microvolt = <1000000>; |
| 829 | }; |
| 830 | opp@134000000 { |
| 831 | opp-hz = /bits/ 64 <134000000>; |
| 832 | opp-microvolt = <1000000>; |
| 833 | }; |
| 834 | opp@200000000 { |
| 835 | opp-hz = /bits/ 64 <200000000>; |
| 836 | opp-microvolt = <1000000>; |
| 837 | }; |
| 838 | }; |
| 839 | |
| 840 | bus_mcuisp_opp_table: opp_table3 { |
| 841 | compatible = "operating-points-v2"; |
| 842 | opp-shared; |
| 843 | |
| 844 | opp@50000000 { |
| 845 | opp-hz = /bits/ 64 <50000000>; |
| 846 | }; |
| 847 | opp@80000000 { |
| 848 | opp-hz = /bits/ 64 <80000000>; |
| 849 | }; |
| 850 | opp@100000000 { |
| 851 | opp-hz = /bits/ 64 <100000000>; |
| 852 | }; |
| 853 | opp@200000000 { |
| 854 | opp-hz = /bits/ 64 <200000000>; |
| 855 | }; |
| 856 | opp@400000000 { |
| 857 | opp-hz = /bits/ 64 <400000000>; |
| 858 | }; |
| 859 | }; |
| 860 | |
| 861 | bus_isp_opp_table: opp_table4 { |
| 862 | compatible = "operating-points-v2"; |
| 863 | opp-shared; |
| 864 | |
| 865 | opp@50000000 { |
| 866 | opp-hz = /bits/ 64 <50000000>; |
| 867 | }; |
| 868 | opp@80000000 { |
| 869 | opp-hz = /bits/ 64 <80000000>; |
| 870 | }; |
| 871 | opp@100000000 { |
| 872 | opp-hz = /bits/ 64 <100000000>; |
| 873 | }; |
| 874 | opp@200000000 { |
| 875 | opp-hz = /bits/ 64 <200000000>; |
| 876 | }; |
| 877 | opp@300000000 { |
| 878 | opp-hz = /bits/ 64 <300000000>; |
| 879 | }; |
| 880 | }; |
| 881 | |
| 882 | bus_peril_opp_table: opp_table5 { |
| 883 | compatible = "operating-points-v2"; |
| 884 | opp-shared; |
| 885 | |
| 886 | opp@50000000 { |
| 887 | opp-hz = /bits/ 64 <50000000>; |
| 888 | }; |
| 889 | opp@80000000 { |
| 890 | opp-hz = /bits/ 64 <80000000>; |
| 891 | }; |
| 892 | opp@100000000 { |
| 893 | opp-hz = /bits/ 64 <100000000>; |
| 894 | }; |
| 895 | }; |
Tomasz Figa | 5a992a9 | 2014-05-15 06:01:27 +0900 | [diff] [blame] | 896 | }; |
| 897 | }; |
| 898 | |
| 899 | #include "exynos3250-pinctrl.dtsi" |