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Sergei Shtylyov5f45cec2016-08-26 23:21:42 +03001/*
2 * Device Tree Source for the Wheat board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corporation
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13#include "r8a7792.dtsi"
Sergei Shtylyov0c157ad2016-08-31 01:24:41 +030014#include <dt-bindings/gpio/gpio.h>
Sergei Shtylyov5f45cec2016-08-26 23:21:42 +030015
16/ {
17 model = "Wheat";
18 compatible = "renesas,wheat", "renesas,r8a7792";
19
20 aliases {
21 serial0 = &scif0;
22 };
23
24 chosen {
Sergei Shtylyov1d9a17d2016-08-26 23:23:13 +030025 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
Sergei Shtylyov5f45cec2016-08-26 23:21:42 +030026 stdout-path = "serial0:115200n8";
27 };
28
29 memory@40000000 {
30 device_type = "memory";
31 reg = <0 0x40000000 0 0x40000000>;
32 };
Sergei Shtylyov1d9a17d2016-08-26 23:23:13 +030033
34 d3_3v: regulator-3v3 {
35 compatible = "regulator-fixed";
36 regulator-name = "D3.3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 regulator-boot-on;
40 regulator-always-on;
41 };
42
43 ethernet@18000000 {
44 compatible = "smsc,lan89218", "smsc,lan9115";
45 reg = <0 0x18000000 0 0x100>;
46 phy-mode = "mii";
47 interrupt-parent = <&irqc>;
48 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
49 smsc,irq-push-pull;
50 smsc,save-mac-address;
51 reg-io-width = <4>;
52 vddvario-supply = <&d3_3v>;
53 vdd33a-supply = <&d3_3v>;
54
55 pinctrl-0 = <&lan89218_pins>;
56 pinctrl-names = "default";
57 };
Sergei Shtylyov0c157ad2016-08-31 01:24:41 +030058
59 vcc_sdhi0: regulator-vcc-sdhi0 {
60 compatible = "regulator-fixed";
61
62 regulator-name = "SDHI0 Vcc";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65
66 gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
67 enable-active-high;
68 };
Sergei Shtylyov5f45cec2016-08-26 23:21:42 +030069};
70
71&extal_clk {
72 clock-frequency = <20000000>;
73};
74
75&pfc {
76 scif0_pins: scif0 {
77 groups = "scif0_data";
78 function = "scif0";
79 };
Sergei Shtylyov1d9a17d2016-08-26 23:23:13 +030080
81 lan89218_pins: lan89218 {
82 intc {
83 groups = "intc_irq0";
84 function = "intc";
85 };
86 lbsc {
87 groups = "lbsc_ex_cs0";
88 function = "lbsc";
89 };
90 };
Sergei Shtylyov4ea71e62016-08-29 23:11:26 +030091
92 can0_pins: can0 {
93 groups = "can0_data";
94 function = "can0";
95 };
96
97 can1_pins: can1 {
98 groups = "can1_data";
99 function = "can1";
100 };
Sergei Shtylyov0c157ad2016-08-31 01:24:41 +0300101
102 sdhi0_pins: sdhi0 {
103 groups = "sdhi0_data4", "sdhi0_ctrl";
104 function = "sdhi0";
105 };
Sergei Shtylyov5f45cec2016-08-26 23:21:42 +0300106};
107
108&scif0 {
109 pinctrl-0 = <&scif0_pins>;
110 pinctrl-names = "default";
111
112 status = "okay";
113};
Sergei Shtylyov4ea71e62016-08-29 23:11:26 +0300114
115&can0 {
116 pinctrl-0 = <&can0_pins>;
117 pinctrl-names = "default";
118
119 status = "okay";
120};
121
122&can1 {
123 pinctrl-0 = <&can1_pins>;
124 pinctrl-names = "default";
125
126 status = "okay";
127};
Sergei Shtylyov0c157ad2016-08-31 01:24:41 +0300128
129&sdhi0 {
130 pinctrl-0 = <&sdhi0_pins>;
131 pinctrl-names = "default";
132
133 vmmc-supply = <&vcc_sdhi0>;
134 cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
135 status = "okay";
136};