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Ulrich Hechta7427952014-09-05 12:23:49 +02001/*
2 * Device Tree Source for the Alt board
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r8a7794.dtsi"
Simon Horman2b410912016-08-09 14:19:03 +020013#include <dt-bindings/gpio/gpio.h>
Ulrich Hechta7427952014-09-05 12:23:49 +020014
15/ {
16 model = "Alt";
17 compatible = "renesas,alt", "renesas,r8a7794";
18
19 aliases {
20 serial0 = &scif2;
21 };
22
23 chosen {
Simon Horman89aeff92014-11-04 13:23:38 +090024 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
Geert Uytterhoevenb575f992015-12-08 18:54:06 +010025 stdout-path = "serial0:115200n8";
Ulrich Hechta7427952014-09-05 12:23:49 +020026 };
27
28 memory@40000000 {
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
31 };
32
Simon Hormane6ed3f52016-08-09 14:19:04 +020033 d3_3v: regulator-d3-3v {
34 compatible = "regulator-fixed";
35 regulator-name = "D3.3V";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 regulator-boot-on;
39 regulator-always-on;
40 };
41
Simon Horman2b410912016-08-09 14:19:03 +020042 vcc_sdhi0: regulator-vcc-sdhi0 {
43 compatible = "regulator-fixed";
44
45 regulator-name = "SDHI0 Vcc";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
48
49 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
50 enable-active-high;
51 };
52
53 vccq_sdhi0: regulator-vccq-sdhi0 {
54 compatible = "regulator-gpio";
55
56 regulator-name = "SDHI0 VccQ";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <3300000>;
59
60 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
61 gpios-states = <1>;
62 states = <3300000 1
63 1800000 0>;
64 };
65
66 vcc_sdhi1: regulator-vcc-sdhi1 {
67 compatible = "regulator-fixed";
68
69 regulator-name = "SDHI1 Vcc";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72
73 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
74 enable-active-high;
75 };
76
77 vccq_sdhi1: regulator-vccq-sdhi1 {
78 compatible = "regulator-gpio";
79
80 regulator-name = "SDHI1 VccQ";
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <3300000>;
83
84 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
85 gpios-states = <1>;
86 states = <3300000 1
87 1800000 0>;
88 };
89
Ulrich Hechta7427952014-09-05 12:23:49 +020090 lbsc {
91 #address-cells = <1>;
92 #size-cells = <1>;
93 };
Magnus Damm876e7fb2015-11-16 17:57:29 +090094
95 vga-encoder {
96 compatible = "adi,adv7123";
97
98 ports {
99 #address-cells = <1>;
100 #size-cells = <0>;
101
102 port@0 {
103 reg = <0>;
104 adv7123_in: endpoint {
105 remote-endpoint = <&du_out_rgb1>;
106 };
107 };
108 port@1 {
109 reg = <1>;
110 adv7123_out: endpoint {
111 remote-endpoint = <&vga_in>;
112 };
113 };
114 };
115 };
116
117 vga {
118 compatible = "vga-connector";
119
120 port {
121 vga_in: endpoint {
122 remote-endpoint = <&adv7123_out>;
123 };
124 };
125 };
126
127 x2_clk: x2-clock {
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <74250000>;
131 };
132
133 x13_clk: x13-clock {
134 compatible = "fixed-clock";
135 #clock-cells = <0>;
136 clock-frequency = <148500000>;
137 };
138};
139
140&du {
Magnus Damm13b8b8e2015-11-17 12:27:59 +0900141 pinctrl-0 = <&du_pins>;
142 pinctrl-names = "default";
Magnus Damm876e7fb2015-11-16 17:57:29 +0900143 status = "okay";
144
145 clocks = <&mstp7_clks R8A7794_CLK_DU0>,
146 <&mstp7_clks R8A7794_CLK_DU0>,
147 <&x13_clk>, <&x2_clk>;
148 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
149
150 ports {
151 port@1 {
152 endpoint {
153 remote-endpoint = <&adv7123_in>;
154 };
155 };
156 };
Ulrich Hechta7427952014-09-05 12:23:49 +0200157};
158
159&extal_clk {
160 clock-frequency = <20000000>;
161};
162
Simon Horman22b16072015-11-17 11:10:40 -0800163&pfc {
Geert Uytterhoeven8a758a92016-01-29 11:17:18 +0100164 pinctrl-0 = <&scif_clk_pins>;
165 pinctrl-names = "default";
166
Magnus Damm13b8b8e2015-11-17 12:27:59 +0900167 du_pins: du {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900168 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
169 function = "du";
Magnus Damm13b8b8e2015-11-17 12:27:59 +0900170 };
171
Geert Uytterhoevend88f5bc2016-06-10 15:01:01 +0200172 scif2_pins: scif2 {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900173 groups = "scif2_data";
174 function = "scif2";
Simon Horman22b16072015-11-17 11:10:40 -0800175 };
176
Geert Uytterhoeven8a758a92016-01-29 11:17:18 +0100177 scif_clk_pins: scif_clk {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900178 groups = "scif_clk";
179 function = "scif_clk";
Geert Uytterhoeven8a758a92016-01-29 11:17:18 +0100180 };
181
Simon Horman22b16072015-11-17 11:10:40 -0800182 ether_pins: ether {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900183 groups = "eth_link", "eth_mdio", "eth_rmii";
184 function = "eth";
Simon Horman22b16072015-11-17 11:10:40 -0800185 };
186
Simon Hormanc175e7a2015-11-24 11:16:05 +0900187 phy1_pins: phy1 {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900188 groups = "intc_irq8";
189 function = "intc";
Simon Horman22b16072015-11-17 11:10:40 -0800190 };
Ulrich Hecht7f81bf72015-11-18 13:51:06 +0100191
192 i2c1_pins: i2c1 {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900193 groups = "i2c1";
194 function = "i2c1";
Ulrich Hecht7f81bf72015-11-18 13:51:06 +0100195 };
Ulrich Hechtd5375432015-11-18 13:51:07 +0100196
197 vin0_pins: vin0 {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900198 groups = "vin0_data8", "vin0_clk";
199 function = "vin0";
Ulrich Hechtd5375432015-11-18 13:51:07 +0100200 };
Simon Horman2b410912016-08-09 14:19:03 +0200201
Simon Hormane6ed3f52016-08-09 14:19:04 +0200202 mmcif0_pins: mmcif0 {
203 groups = "mmc_data8", "mmc_ctrl";
204 function = "mmc";
205 };
206
Simon Horman2b410912016-08-09 14:19:03 +0200207 sdhi0_pins: sd0 {
208 groups = "sdhi0_data4", "sdhi0_ctrl";
209 function = "sdhi0";
210 };
211
212 sdhi1_pins: sd1 {
213 groups = "sdhi1_data4", "sdhi1_ctrl";
214 function = "sdhi1";
215 };
Simon Horman22b16072015-11-17 11:10:40 -0800216};
217
Ulrich Hechta7427952014-09-05 12:23:49 +0200218&cmt0 {
Geert Uytterhoeven38e02902014-12-09 12:25:04 +0100219 status = "okay";
Ulrich Hechta7427952014-09-05 12:23:49 +0200220};
221
Simon Horman6b78e6a2016-01-04 21:36:59 +1100222&pfc {
Geert Uytterhoevenfc10f3c2016-06-10 15:01:02 +0200223 qspi_pins: qspi {
Simon Hormanbe7359d2016-03-18 07:56:21 +0900224 groups = "qspi_ctrl", "qspi_data4";
225 function = "qspi";
Simon Horman6b78e6a2016-01-04 21:36:59 +1100226 };
227};
228
Laurent Pincharta895b7c2015-01-27 10:45:56 +0200229&ether {
Simon Hormanc175e7a2015-11-24 11:16:05 +0900230 pinctrl-0 = <&ether_pins &phy1_pins>;
231 pinctrl-names = "default";
232
Laurent Pincharta895b7c2015-01-27 10:45:56 +0200233 phy-handle = <&phy1>;
234 renesas,ether-link-active-low;
235 status = "okay";
236
237 phy1: ethernet-phy@1 {
238 reg = <1>;
239 interrupt-parent = <&irqc0>;
Laurent Pinchart1fc58012015-02-26 16:08:33 +0200240 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
Laurent Pincharta895b7c2015-01-27 10:45:56 +0200241 micrel,led-mode = <1>;
242 };
243};
244
Simon Hormane6ed3f52016-08-09 14:19:04 +0200245&mmcif0 {
246 pinctrl-0 = <&mmcif0_pins>;
247 pinctrl-names = "default";
248
249 vmmc-supply = <&d3_3v>;
250 vqmmc-supply = <&d3_3v>;
251 bus-width = <8>;
252 non-removable;
253 status = "okay";
254};
255
Simon Horman2b410912016-08-09 14:19:03 +0200256&sdhi0 {
257 pinctrl-0 = <&sdhi0_pins>;
258 pinctrl-names = "default";
259
260 vmmc-supply = <&vcc_sdhi0>;
261 vqmmc-supply = <&vccq_sdhi0>;
262 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
263 wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
264 status = "okay";
265};
266
267&sdhi1 {
268 pinctrl-0 = <&sdhi1_pins>;
269 pinctrl-names = "default";
270
271 vmmc-supply = <&vcc_sdhi1>;
272 vqmmc-supply = <&vccq_sdhi1>;
273 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
274 wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
275 status = "okay";
276};
277
Ulrich Hecht7f81bf72015-11-18 13:51:06 +0100278&i2c1 {
279 pinctrl-0 = <&i2c1_pins>;
280 pinctrl-names = "default";
281
282 status = "okay";
283 clock-frequency = <400000>;
Ulrich Hechtd5375432015-11-18 13:51:07 +0100284
285 composite-in@20 {
286 compatible = "adi,adv7180";
287 reg = <0x20>;
288 remote = <&vin0>;
289
290 port {
291 adv7180: endpoint {
292 bus-width = <8>;
293 remote-endpoint = <&vin0ep>;
294 };
295 };
296 };
297};
298
299&vin0 {
300 status = "okay";
301 pinctrl-0 = <&vin0_pins>;
302 pinctrl-names = "default";
303
304 port {
305 #address-cells = <1>;
306 #size-cells = <0>;
307
308 vin0ep: endpoint {
309 remote-endpoint = <&adv7180>;
310 bus-width = <8>;
311 };
312 };
Ulrich Hecht7f81bf72015-11-18 13:51:06 +0100313};
314
Ulrich Hechta7427952014-09-05 12:23:49 +0200315&scif2 {
Simon Horman72565872015-11-24 11:16:04 +0900316 pinctrl-0 = <&scif2_pins>;
317 pinctrl-names = "default";
318
Geert Uytterhoeven38e02902014-12-09 12:25:04 +0100319 status = "okay";
Ulrich Hechta7427952014-09-05 12:23:49 +0200320};
Simon Horman6b78e6a2016-01-04 21:36:59 +1100321
Geert Uytterhoeven8a758a92016-01-29 11:17:18 +0100322&scif_clk {
323 clock-frequency = <14745600>;
324 status = "okay";
325};
326
Simon Horman6b78e6a2016-01-04 21:36:59 +1100327&qspi {
328 pinctrl-0 = <&qspi_pins>;
329 pinctrl-names = "default";
330
331 status = "okay";
332
333 flash@0 {
334 compatible = "spansion,s25fl512s", "jedec,spi-nor";
335 reg = <0>;
336 spi-max-frequency = <30000000>;
337 spi-tx-bus-width = <4>;
338 spi-rx-bus-width = <4>;
339 spi-cpol;
340 spi-cpha;
341 m25p,fast-read;
342
343 partitions {
344 compatible = "fixed-partitions";
345 #address-cells = <1>;
346 #size-cells = <1>;
347
348 partition@0 {
349 label = "loader";
350 reg = <0x00000000 0x00040000>;
351 read-only;
352 };
353 partition@40000 {
354 label = "system";
355 reg = <0x00040000 0x00040000>;
356 read-only;
357 };
358 partition@80000 {
359 label = "user";
360 reg = <0x00080000 0x03f80000>;
361 };
362 };
363 };
364};