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Sergei Shtylyova42fc572015-07-29 01:14:59 +03001/*
2 * Device Tree Source for the SILK board
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 * Copyright (C) 2014-2015 Renesas Solutions Corp.
6 * Copyright (C) 2014-2015 Cogent Embedded, Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
Sergei Shtylyovfeb13b92016-07-28 00:05:58 +030013/*
14 * SSI-AK4643
15 *
16 * SW1: 2-1: AK4643
17 * 2-3: ADV7511
18 *
19 * This command is required before playback/capture:
20 *
21 * amixer set "LINEOUT Mixer DACL" on
22 */
23
Sergei Shtylyova42fc572015-07-29 01:14:59 +030024/dts-v1/;
25#include "r8a7794.dtsi"
Sergei Shtylyov761b11e2015-10-16 14:37:01 -070026#include <dt-bindings/gpio/gpio.h>
Sergei Shtylyova42fc572015-07-29 01:14:59 +030027
28/ {
29 model = "SILK";
30 compatible = "renesas,silk", "renesas,r8a7794";
31
32 aliases {
33 serial0 = &scif2;
34 };
35
36 chosen {
Sergei Shtylyovdad5c832015-07-29 01:16:02 +030037 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
Geert Uytterhoeven5995e9f2015-12-08 18:54:18 +010038 stdout-path = "serial0:115200n8";
Sergei Shtylyova42fc572015-07-29 01:14:59 +030039 };
40
41 memory@40000000 {
42 device_type = "memory";
43 reg = <0 0x40000000 0 0x40000000>;
44 };
Sergei Shtylyov054531e2015-07-31 00:55:23 +030045
Geert Uytterhoevenb6960f12016-05-20 09:10:12 +020046 d3_3v: regulator-d3-3v {
Sergei Shtylyov054531e2015-07-31 00:55:23 +030047 compatible = "regulator-fixed";
48 regulator-name = "D3.3V";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
51 regulator-boot-on;
52 regulator-always-on;
53 };
Sergei Shtylyov761b11e2015-10-16 14:37:01 -070054
Geert Uytterhoevenb6960f12016-05-20 09:10:12 +020055 vcc_sdhi1: regulator-vcc-sdhi1 {
Sergei Shtylyov761b11e2015-10-16 14:37:01 -070056 compatible = "regulator-fixed";
57
58 regulator-name = "SDHI1 Vcc";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61
62 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
63 enable-active-high;
64 };
65
Geert Uytterhoevenb6960f12016-05-20 09:10:12 +020066 vccq_sdhi1: regulator-vccq-sdhi1 {
Sergei Shtylyov761b11e2015-10-16 14:37:01 -070067 compatible = "regulator-gpio";
68
69 regulator-name = "SDHI1 VccQ";
70 regulator-min-microvolt = <1800000>;
71 regulator-max-microvolt = <3300000>;
72
73 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
74 gpios-states = <1>;
75 states = <3300000 1
76 1800000 0>;
77 };
Sergei Shtylyov84e734f2016-01-13 02:06:08 +030078
79 vga-encoder {
80 compatible = "adi,adv7123";
81
82 ports {
83 #address-cells = <1>;
84 #size-cells = <0>;
85
86 port@0 {
87 reg = <0>;
88 adv7123_in: endpoint {
89 remote-endpoint = <&du_out_rgb1>;
90 };
91 };
92 port@1 {
93 reg = <1>;
94 adv7123_out: endpoint {
95 remote-endpoint = <&vga_in>;
96 };
97 };
98 };
99 };
100
101 hdmi-out {
102 compatible = "hdmi-connector";
103 type = "a";
104
105 port {
106 hdmi_con: endpoint {
107 remote-endpoint = <&adv7511_out>;
108 };
109 };
110 };
111
112 vga {
113 compatible = "vga-connector";
114
115 port {
116 vga_in: endpoint {
117 remote-endpoint = <&adv7123_out>;
118 };
119 };
120 };
121
122 x2_clk: x2-clock {
123 compatible = "fixed-clock";
124 #clock-cells = <0>;
125 clock-frequency = <148500000>;
126 };
127
128 x3_clk: x3-clock {
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <74250000>;
132 };
Sergei Shtylyovfeb13b92016-07-28 00:05:58 +0300133
134 x9_clk: audio_clock {
135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <12288000>;
138 };
139
140 sound {
141 compatible = "simple-audio-card";
142
143 simple-audio-card,format = "left_j";
144 simple-audio-card,bitclock-master = <&soundcodec>;
145 simple-audio-card,frame-master = <&soundcodec>;
146
147 simple-audio-card,cpu {
148 sound-dai = <&rcar_sound>;
149 };
150
151 soundcodec: simple-audio-card,codec {
152 sound-dai = <&ak4643>;
153 clocks = <&x9_clk>;
154 };
155 };
Sergei Shtylyova42fc572015-07-29 01:14:59 +0300156};
157
158&extal_clk {
159 clock-frequency = <20000000>;
160};
161
162&pfc {
Geert Uytterhoevenc3373b02016-01-29 11:17:25 +0100163 pinctrl-0 = <&scif_clk_pins>;
164 pinctrl-names = "default";
165
Geert Uytterhoeven092599d62016-06-10 15:01:03 +0200166 scif2_pins: scif2 {
Simon Horman4386ed22016-03-18 07:57:28 +0900167 groups = "scif2_data";
168 function = "scif2";
Sergei Shtylyova42fc572015-07-29 01:14:59 +0300169 };
Sergei Shtylyovdad5c832015-07-29 01:16:02 +0300170
Geert Uytterhoevenc3373b02016-01-29 11:17:25 +0100171 scif_clk_pins: scif_clk {
Simon Horman4386ed22016-03-18 07:57:28 +0900172 groups = "scif_clk";
173 function = "scif_clk";
Geert Uytterhoevenc3373b02016-01-29 11:17:25 +0100174 };
175
Sergei Shtylyovdad5c832015-07-29 01:16:02 +0300176 ether_pins: ether {
Simon Horman4386ed22016-03-18 07:57:28 +0900177 groups = "eth_link", "eth_mdio", "eth_rmii";
178 function = "eth";
Sergei Shtylyovdad5c832015-07-29 01:16:02 +0300179 };
180
181 phy1_pins: phy1 {
Simon Horman4386ed22016-03-18 07:57:28 +0900182 groups = "intc_irq8";
183 function = "intc";
Sergei Shtylyovdad5c832015-07-29 01:16:02 +0300184 };
Sergei Shtylyov054531e2015-07-31 00:55:23 +0300185
Sergei Shtylyovfa070792015-08-20 01:05:02 +0300186 i2c1_pins: i2c1 {
Simon Horman4386ed22016-03-18 07:57:28 +0900187 groups = "i2c1";
188 function = "i2c1";
Sergei Shtylyovfa070792015-08-20 01:05:02 +0300189 };
190
Sergei Shtylyov054531e2015-07-31 00:55:23 +0300191 mmcif0_pins: mmcif0 {
Simon Horman4386ed22016-03-18 07:57:28 +0900192 groups = "mmc_data8", "mmc_ctrl";
193 function = "mmc";
Sergei Shtylyov054531e2015-07-31 00:55:23 +0300194 };
Sergei Shtylyov0ebdbc52015-08-11 01:00:35 +0300195
Sergei Shtylyov761b11e2015-10-16 14:37:01 -0700196 sdhi1_pins: sd1 {
Simon Horman4386ed22016-03-18 07:57:28 +0900197 groups = "sdhi1_data4", "sdhi1_ctrl";
198 function = "sdhi1";
Sergei Shtylyov761b11e2015-10-16 14:37:01 -0700199 };
200
Geert Uytterhoevena35cc9d22016-06-10 15:01:04 +0200201 qspi_pins: qspi {
Simon Horman4386ed22016-03-18 07:57:28 +0900202 groups = "qspi_ctrl", "qspi_data4";
203 function = "qspi";
Sergei Shtylyov0ebdbc52015-08-11 01:00:35 +0300204 };
Sergei Shtylyov8614daf2015-08-20 01:24:47 +0300205
206 vin0_pins: vin0 {
Simon Horman4386ed22016-03-18 07:57:28 +0900207 groups = "vin0_data8", "vin0_clk";
208 function = "vin0";
Sergei Shtylyov8614daf2015-08-20 01:24:47 +0300209 };
Sergei Shtylyovf409ed02015-09-13 01:32:12 +0300210
211 usb0_pins: usb0 {
Simon Horman4386ed22016-03-18 07:57:28 +0900212 groups = "usb0";
213 function = "usb0";
Sergei Shtylyovf409ed02015-09-13 01:32:12 +0300214 };
215
216 usb1_pins: usb1 {
Simon Horman4386ed22016-03-18 07:57:28 +0900217 groups = "usb1";
218 function = "usb1";
Sergei Shtylyovf409ed02015-09-13 01:32:12 +0300219 };
Sergei Shtylyovadc47ec2016-04-13 22:36:21 +0300220
221 du0_pins: du0 {
222 groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
223 function = "du0";
224 };
225
226 du1_pins: du1 {
227 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
228 function = "du1";
229 };
Sergei Shtylyovfeb13b92016-07-28 00:05:58 +0300230
231 ssi_pins: sound {
232 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
233 function = "ssi";
234 };
235
236 audio_clk_pins: audio_clk {
237 groups = "audio_clkc";
238 function = "audio_clk";
239 };
Sergei Shtylyova42fc572015-07-29 01:14:59 +0300240};
241
242&scif2 {
243 pinctrl-0 = <&scif2_pins>;
244 pinctrl-names = "default";
245
246 status = "okay";
247};
Sergei Shtylyovdad5c832015-07-29 01:16:02 +0300248
Geert Uytterhoevenc3373b02016-01-29 11:17:25 +0100249&scif_clk {
250 clock-frequency = <14745600>;
251 status = "okay";
252};
253
Sergei Shtylyovdad5c832015-07-29 01:16:02 +0300254&ether {
255 pinctrl-0 = <&ether_pins &phy1_pins>;
256 pinctrl-names = "default";
257
258 phy-handle = <&phy1>;
259 renesas,ether-link-active-low;
260 status = "okay";
261
262 phy1: ethernet-phy@1 {
263 reg = <1>;
264 interrupt-parent = <&irqc0>;
265 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
266 micrel,led-mode = <1>;
267 };
268};
Sergei Shtylyov054531e2015-07-31 00:55:23 +0300269
Sergei Shtylyovfa070792015-08-20 01:05:02 +0300270&i2c1 {
271 pinctrl-0 = <&i2c1_pins>;
272 pinctrl-names = "default";
273
274 status = "okay";
275 clock-frequency = <400000>;
Sergei Shtylyov8614daf2015-08-20 01:24:47 +0300276
Sergei Shtylyovfeb13b92016-07-28 00:05:58 +0300277 ak4643: codec@12 {
278 compatible = "asahi-kasei,ak4643";
279 #sound-dai-cells = <0>;
280 reg = <0x12>;
281 };
282
Sergei Shtylyov8614daf2015-08-20 01:24:47 +0300283 composite-in@20 {
284 compatible = "adi,adv7180";
285 reg = <0x20>;
286 remote = <&vin0>;
287
288 port {
289 adv7180: endpoint {
290 bus-width = <8>;
291 remote-endpoint = <&vin0ep>;
292 };
293 };
294 };
Sergei Shtylyov84e734f2016-01-13 02:06:08 +0300295
296 hdmi@39 {
297 compatible = "adi,adv7511w";
298 reg = <0x39>;
299 interrupt-parent = <&gpio5>;
300 interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
301
302 adi,input-depth = <8>;
303 adi,input-colorspace = "rgb";
304 adi,input-clock = "1x";
305 adi,input-style = <1>;
306 adi,input-justification = "evenly";
307
308 ports {
309 #address-cells = <1>;
310 #size-cells = <0>;
311
312 port@0 {
313 reg = <0>;
314 adv7511_in: endpoint {
315 remote-endpoint = <&du_out_rgb0>;
316 };
317 };
318
319 port@1 {
320 reg = <1>;
321 adv7511_out: endpoint {
322 remote-endpoint = <&hdmi_con>;
323 };
324 };
325 };
326 };
Sergei Shtylyovfa070792015-08-20 01:05:02 +0300327};
328
Sergei Shtylyov054531e2015-07-31 00:55:23 +0300329&mmcif0 {
330 pinctrl-0 = <&mmcif0_pins>;
331 pinctrl-names = "default";
332
333 vmmc-supply = <&d3_3v>;
334 vqmmc-supply = <&d3_3v>;
335 bus-width = <8>;
336 non-removable;
337 status = "okay";
338};
Sergei Shtylyov0ebdbc52015-08-11 01:00:35 +0300339
Sergei Shtylyov761b11e2015-10-16 14:37:01 -0700340&sdhi1 {
341 pinctrl-0 = <&sdhi1_pins>;
342 pinctrl-names = "default";
343
344 vmmc-supply = <&vcc_sdhi1>;
345 vqmmc-supply = <&vccq_sdhi1>;
346 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
347 status = "okay";
348};
349
Sergei Shtylyov0ebdbc52015-08-11 01:00:35 +0300350&qspi {
351 pinctrl-0 = <&qspi_pins>;
352 pinctrl-names = "default";
353
354 status = "okay";
355
356 flash@0 {
Sergei Shtylyov0ebdbc52015-08-11 01:00:35 +0300357 compatible = "spansion,s25fl512s", "jedec,spi-nor";
358 reg = <0>;
359 spi-max-frequency = <30000000>;
360 spi-tx-bus-width = <4>;
361 spi-rx-bus-width = <4>;
362 spi-cpol;
363 spi-cpha;
364 m25p,fast-read;
365
Geert Uytterhoeven99e14b32015-11-20 11:38:55 -0800366 partitions {
Geert Uytterhoeven8bc403b2015-12-21 11:33:52 +0100367 compatible = "fixed-partitions";
Geert Uytterhoeven99e14b32015-11-20 11:38:55 -0800368 #address-cells = <1>;
369 #size-cells = <1>;
370
371 partition@0 {
372 label = "loader";
373 reg = <0x00000000 0x00040000>;
374 read-only;
375 };
376 partition@40000 {
377 label = "user";
378 reg = <0x00040000 0x00400000>;
379 read-only;
380 };
381 partition@440000 {
382 label = "flash";
383 reg = <0x00440000 0x03bc0000>;
384 };
Sergei Shtylyov0ebdbc52015-08-11 01:00:35 +0300385 };
386 };
387};
Sergei Shtylyov8614daf2015-08-20 01:24:47 +0300388
389/* composite video input */
390&vin0 {
391 status = "okay";
392 pinctrl-0 = <&vin0_pins>;
393 pinctrl-names = "default";
394
395 port {
396 #address-cells = <1>;
397 #size-cells = <0>;
398
399 vin0ep: endpoint {
400 remote-endpoint = <&adv7180>;
401 bus-width = <8>;
402 };
403 };
404};
Sergei Shtylyovf409ed02015-09-13 01:32:12 +0300405
406&pci0 {
407 status = "okay";
408 pinctrl-0 = <&usb0_pins>;
409 pinctrl-names = "default";
410};
411
412&pci1 {
413 status = "okay";
414 pinctrl-0 = <&usb1_pins>;
415 pinctrl-names = "default";
416};
Sergei Shtylyov1f4f6312015-10-02 01:06:23 +0300417
418&usbphy {
419 status = "okay";
420};
Sergei Shtylyov84e734f2016-01-13 02:06:08 +0300421
422&du {
Sergei Shtylyovadc47ec2016-04-13 22:36:21 +0300423 pinctrl-0 = <&du0_pins &du1_pins>;
424 pinctrl-names = "default";
Sergei Shtylyov84e734f2016-01-13 02:06:08 +0300425 status = "okay";
426
427 clocks = <&mstp7_clks R8A7794_CLK_DU0>,
428 <&mstp7_clks R8A7794_CLK_DU0>,
429 <&x2_clk>, <&x3_clk>;
430 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
431
432 ports {
433 port@0 {
434 endpoint {
435 remote-endpoint = <&adv7511_in>;
436 };
437 };
438 port@1 {
439 endpoint {
440 remote-endpoint = <&adv7123_in>;
441 };
442 };
443 };
444};
Sergei Shtylyovfeb13b92016-07-28 00:05:58 +0300445
446&rcar_sound {
447 pinctrl-0 = <&ssi_pins &audio_clk_pins>;
448 pinctrl-names = "default";
449 status = "okay";
450
451 /* Single DAI */
452 #sound-dai-cells = <0>;
453
454 rcar_sound,dai {
455 dai0 {
456 playback = <&ssi0>;
457 capture = <&ssi1>;
458 };
459 };
460};
461
462&ssi1 {
463 shared-pin;
464};