blob: d9e0f3e7067113b771fa9c2bb1bdd2d0dbd50610 [file] [log] [blame]
Peter Crosthwaite7b01abb2014-12-01 10:25:50 +10001/*
2 * Copyright (C) 2011 - 2014 Xilinx
3 * Copyright (C) 2012 National Instruments Corp.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14/dts-v1/;
15/include/ "zynq-7000.dtsi"
16
17/ {
18 model = "Zynq ZYBO Development Board";
19 compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
20
Michal Simek1b654bc2015-02-11 13:05:11 +010021 aliases {
22 ethernet0 = &gem0;
23 serial0 = &uart1;
24 };
25
Peter Crosthwaite7b01abb2014-12-01 10:25:50 +100026 memory {
27 device_type = "memory";
28 reg = <0x0 0x20000000>;
29 };
30
31 chosen {
Michal Simek07bf4292016-02-15 16:36:11 +010032 bootargs = "earlycon";
Michal Simek22210432015-02-11 13:06:36 +010033 stdout-path = "serial0:115200n8";
Peter Crosthwaite7b01abb2014-12-01 10:25:50 +100034 };
35
Nathan Rossib9770252016-02-03 22:41:05 +100036 usb_phy0: phy0 {
37 #phy-cells = <0>;
38 compatible = "usb-nop-xceiv";
39 reset-gpios = <&gpio0 46 1>;
40 };
Peter Crosthwaite7b01abb2014-12-01 10:25:50 +100041};
42
43&clkc {
44 ps-clk-frequency = <50000000>;
45};
46
47&gem0 {
48 status = "okay";
49 phy-mode = "rgmii-id";
50 phy-handle = <&ethernet_phy>;
51
52 ethernet_phy: ethernet-phy@0 {
53 reg = <0>;
54 };
55};
56
57&sdhci0 {
58 status = "okay";
59};
60
61&uart1 {
62 status = "okay";
63};
Nathan Rossib9770252016-02-03 22:41:05 +100064
65&usb0 {
66 status = "okay";
67 dr_mode = "host";
68 usb-phy = <&usb_phy0>;
69};