blob: 39ea4791a3c977ad7eda47498b9f7d7741b438e2 [file] [log] [blame]
Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * core routines for the asynchronous memory transfer/transform api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
Franck Bui-Huu82524742008-05-12 21:21:05 +020026#include <linux/rculist.h>
Paul Gortmaker4bb33cc2011-05-27 14:41:48 -040027#include <linux/module.h>
Dan Williams9bc89cd2007-01-02 11:10:44 -070028#include <linux/kernel.h>
29#include <linux/async_tx.h>
30
31#ifdef CONFIG_DMA_ENGINE
Dan Williamsbec08512009-01-06 11:38:14 -070032static int __init async_tx_init(void)
Dan Williams9bc89cd2007-01-02 11:10:44 -070033{
Dan Williams729b5d12009-03-25 09:13:25 -070034 async_dmaengine_get();
Dan Williams9bc89cd2007-01-02 11:10:44 -070035
36 printk(KERN_INFO "async_tx: api initialized (async)\n");
37
38 return 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070039}
40
41static void __exit async_tx_exit(void)
42{
Dan Williams729b5d12009-03-25 09:13:25 -070043 async_dmaengine_put();
Dan Williams9bc89cd2007-01-02 11:10:44 -070044}
45
Dan Williamsaf1f9512009-08-29 19:09:26 -070046module_init(async_tx_init);
47module_exit(async_tx_exit);
48
Dan Williams9bc89cd2007-01-02 11:10:44 -070049/**
Dan Williams47437b22008-02-02 19:49:59 -070050 * __async_tx_find_channel - find a channel to carry out the operation or let
Dan Williams9bc89cd2007-01-02 11:10:44 -070051 * the transaction execute synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -070052 * @submit: transaction dependency and submission modifiers
Dan Williams9bc89cd2007-01-02 11:10:44 -070053 * @tx_type: transaction type
54 */
55struct dma_chan *
Dan Williamsa08abd82009-06-03 11:43:59 -070056__async_tx_find_channel(struct async_submit_ctl *submit,
57 enum dma_transaction_type tx_type)
Dan Williams9bc89cd2007-01-02 11:10:44 -070058{
Dan Williamsa08abd82009-06-03 11:43:59 -070059 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
60
Dan Williams9bc89cd2007-01-02 11:10:44 -070061 /* see if we can keep the chain on one channel */
62 if (depend_tx &&
Dan Williamsbec08512009-01-06 11:38:14 -070063 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
Dan Williams9bc89cd2007-01-02 11:10:44 -070064 return depend_tx->chan;
Dan Williams729b5d12009-03-25 09:13:25 -070065 return async_dma_find_channel(tx_type);
Dan Williams9bc89cd2007-01-02 11:10:44 -070066}
Dan Williams47437b22008-02-02 19:49:59 -070067EXPORT_SYMBOL_GPL(__async_tx_find_channel);
Dan Williams9bc89cd2007-01-02 11:10:44 -070068#endif
69
Dan Williams19242d72008-04-17 20:17:25 -070070
71/**
72 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
73 * pre-attached.
74 * @depend_tx: the operation that must finish before the new operation runs
75 * @tx: the new operation
76 */
77static void
78async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
79 struct dma_async_tx_descriptor *tx)
80{
Dan Williams95475e52009-07-14 12:19:02 -070081 struct dma_chan *chan = depend_tx->chan;
82 struct dma_device *device = chan->device;
Dan Williams19242d72008-04-17 20:17:25 -070083 struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
84
85 /* first check to see if we can still append to depend_tx */
Dan Williamscaa20d972010-05-17 16:24:16 -070086 txd_lock(depend_tx);
87 if (txd_parent(depend_tx) && depend_tx->chan == tx->chan) {
88 txd_chain(depend_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -070089 intr_tx = NULL;
90 }
Dan Williamscaa20d972010-05-17 16:24:16 -070091 txd_unlock(depend_tx);
Dan Williams19242d72008-04-17 20:17:25 -070092
Dan Williams95475e52009-07-14 12:19:02 -070093 /* attached dependency, flush the parent channel */
94 if (!intr_tx) {
95 device->device_issue_pending(chan);
Dan Williams19242d72008-04-17 20:17:25 -070096 return;
Dan Williams95475e52009-07-14 12:19:02 -070097 }
Dan Williams19242d72008-04-17 20:17:25 -070098
99 /* see if we can schedule an interrupt
100 * otherwise poll for completion
101 */
102 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
Dan Williams636bdea2008-04-17 20:17:26 -0700103 intr_tx = device->device_prep_dma_interrupt(chan, 0);
Dan Williams19242d72008-04-17 20:17:25 -0700104 else
105 intr_tx = NULL;
106
107 if (intr_tx) {
108 intr_tx->callback = NULL;
109 intr_tx->callback_param = NULL;
Dan Williamscaa20d972010-05-17 16:24:16 -0700110 /* safe to chain outside the lock since we know we are
Dan Williams19242d72008-04-17 20:17:25 -0700111 * not submitted yet
112 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700113 txd_chain(intr_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -0700114
115 /* check if we need to append */
Dan Williamscaa20d972010-05-17 16:24:16 -0700116 txd_lock(depend_tx);
117 if (txd_parent(depend_tx)) {
118 txd_chain(depend_tx, intr_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700119 async_tx_ack(intr_tx);
120 intr_tx = NULL;
121 }
Dan Williamscaa20d972010-05-17 16:24:16 -0700122 txd_unlock(depend_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700123
124 if (intr_tx) {
Dan Williamscaa20d972010-05-17 16:24:16 -0700125 txd_clear_parent(intr_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700126 intr_tx->tx_submit(intr_tx);
127 async_tx_ack(intr_tx);
128 }
Dan Williams95475e52009-07-14 12:19:02 -0700129 device->device_issue_pending(chan);
Dan Williams19242d72008-04-17 20:17:25 -0700130 } else {
Vinod Koul157efa82013-10-16 21:05:50 +0530131 if (dma_wait_for_async_tx(depend_tx) != DMA_COMPLETE)
Bartlomiej Zolnierkiewicz7d283392012-11-08 10:03:16 +0000132 panic("%s: DMA error waiting for depend_tx\n",
Dan Williams19242d72008-04-17 20:17:25 -0700133 __func__);
134 tx->tx_submit(tx);
135 }
136}
137
138
139/**
Dan Williamsa08abd82009-06-03 11:43:59 -0700140 * submit_disposition - flags for routing an incoming operation
Dan Williams19242d72008-04-17 20:17:25 -0700141 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
142 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
143 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
Dan Williamsa08abd82009-06-03 11:43:59 -0700144 *
145 * while holding depend_tx->lock we must avoid submitting new operations
146 * to prevent a circular locking dependency with drivers that already
147 * hold a channel lock when calling async_tx_run_dependencies.
Dan Williams19242d72008-04-17 20:17:25 -0700148 */
149enum submit_disposition {
150 ASYNC_TX_SUBMITTED,
151 ASYNC_TX_CHANNEL_SWITCH,
152 ASYNC_TX_DIRECT_SUBMIT,
153};
154
Dan Williams9bc89cd2007-01-02 11:10:44 -0700155void
156async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
Dan Williamsa08abd82009-06-03 11:43:59 -0700157 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700158{
Dan Williamsa08abd82009-06-03 11:43:59 -0700159 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
160
161 tx->callback = submit->cb_fn;
162 tx->callback_param = submit->cb_param;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700163
Dan Williams19242d72008-04-17 20:17:25 -0700164 if (depend_tx) {
165 enum submit_disposition s;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700166
Dan Williams19242d72008-04-17 20:17:25 -0700167 /* sanity check the dependency chain:
168 * 1/ if ack is already set then we cannot be sure
169 * we are referring to the correct operation
170 * 2/ dependencies are 1:1 i.e. two transactions can
171 * not depend on the same parent
172 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700173 BUG_ON(async_tx_test_ack(depend_tx) || txd_next(depend_tx) ||
174 txd_parent(tx));
Dan Williams19242d72008-04-17 20:17:25 -0700175
176 /* the lock prevents async_tx_run_dependencies from missing
177 * the setting of ->next when ->parent != NULL
178 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700179 txd_lock(depend_tx);
180 if (txd_parent(depend_tx)) {
Dan Williams19242d72008-04-17 20:17:25 -0700181 /* we have a parent so we can not submit directly
182 * if we are staying on the same channel: append
183 * else: channel switch
184 */
185 if (depend_tx->chan == chan) {
Dan Williamscaa20d972010-05-17 16:24:16 -0700186 txd_chain(depend_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -0700187 s = ASYNC_TX_SUBMITTED;
188 } else
189 s = ASYNC_TX_CHANNEL_SWITCH;
190 } else {
191 /* we do not have a parent so we may be able to submit
192 * directly if we are staying on the same channel
193 */
194 if (depend_tx->chan == chan)
195 s = ASYNC_TX_DIRECT_SUBMIT;
196 else
197 s = ASYNC_TX_CHANNEL_SWITCH;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700198 }
Dan Williamscaa20d972010-05-17 16:24:16 -0700199 txd_unlock(depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700200
Dan Williams19242d72008-04-17 20:17:25 -0700201 switch (s) {
202 case ASYNC_TX_SUBMITTED:
203 break;
204 case ASYNC_TX_CHANNEL_SWITCH:
205 async_tx_channel_switch(depend_tx, tx);
206 break;
207 case ASYNC_TX_DIRECT_SUBMIT:
Dan Williamscaa20d972010-05-17 16:24:16 -0700208 txd_clear_parent(tx);
Dan Williams19242d72008-04-17 20:17:25 -0700209 tx->tx_submit(tx);
210 break;
211 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700212 } else {
Dan Williamscaa20d972010-05-17 16:24:16 -0700213 txd_clear_parent(tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700214 tx->tx_submit(tx);
215 }
216
Dan Williamsa08abd82009-06-03 11:43:59 -0700217 if (submit->flags & ASYNC_TX_ACK)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700218 async_tx_ack(tx);
219
Dan Williams88ba2aa2009-04-09 16:16:18 -0700220 if (depend_tx)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700221 async_tx_ack(depend_tx);
222}
223EXPORT_SYMBOL_GPL(async_tx_submit);
224
225/**
Dan Williamsa08abd82009-06-03 11:43:59 -0700226 * async_trigger_callback - schedules the callback function to be run
227 * @submit: submission and completion parameters
228 *
229 * honored flags: ASYNC_TX_ACK
230 *
231 * The callback is run after any dependent operations have completed.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700232 */
233struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700234async_trigger_callback(struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700235{
236 struct dma_chan *chan;
237 struct dma_device *device;
238 struct dma_async_tx_descriptor *tx;
Dan Williamsa08abd82009-06-03 11:43:59 -0700239 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700240
241 if (depend_tx) {
242 chan = depend_tx->chan;
243 device = chan->device;
244
245 /* see if we can schedule an interrupt
246 * otherwise poll for completion
247 */
248 if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
249 device = NULL;
250
Dan Williams636bdea2008-04-17 20:17:26 -0700251 tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700252 } else
253 tx = NULL;
254
255 if (tx) {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700256 pr_debug("%s: (async)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700257
Dan Williamsa08abd82009-06-03 11:43:59 -0700258 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700259 } else {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700260 pr_debug("%s: (sync)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700261
262 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700263 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700264
Dan Williamsa08abd82009-06-03 11:43:59 -0700265 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700266 }
267
268 return tx;
269}
270EXPORT_SYMBOL_GPL(async_trigger_callback);
271
Dan Williamsd2c52b72008-07-17 17:59:55 -0700272/**
273 * async_tx_quiesce - ensure tx is complete and freeable upon return
274 * @tx - transaction to quiesce
275 */
276void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
277{
278 if (*tx) {
279 /* if ack is already set then we cannot be sure
280 * we are referring to the correct operation
281 */
282 BUG_ON(async_tx_test_ack(*tx));
Vinod Koul157efa82013-10-16 21:05:50 +0530283 if (dma_wait_for_async_tx(*tx) != DMA_COMPLETE)
Bartlomiej Zolnierkiewicz7d283392012-11-08 10:03:16 +0000284 panic("%s: DMA error waiting for transaction\n",
285 __func__);
Dan Williamsd2c52b72008-07-17 17:59:55 -0700286 async_tx_ack(*tx);
287 *tx = NULL;
288 }
289}
290EXPORT_SYMBOL_GPL(async_tx_quiesce);
291
Dan Williams9bc89cd2007-01-02 11:10:44 -0700292MODULE_AUTHOR("Intel Corporation");
293MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
294MODULE_LICENSE("GPL");