blob: 007ccbe1e26474a6788ef61ee046e226c480d877 [file] [log] [blame]
Ralf Baechledbee90b2006-02-02 14:31:16 +00001#include <asm/asm-offsets.h>
Nelson Elhagea0b54e22009-07-31 16:58:18 -04002#include <asm/page.h>
David Daney7b1c0d22012-07-19 09:11:14 +02003#include <asm/thread_info.h>
David Daney485172b2012-08-14 11:08:01 -07004
5/*
6 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
7 * ensure that it has .bss alignment (64K).
8 */
9#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
10
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <asm-generic/vmlinux.lds.h>
12
Ralf Baechle41c594a2006-04-05 09:45:45 +010013#undef mips
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#define mips mips
15OUTPUT_ARCH(mips)
16ENTRY(kernel_entry)
Ralf Baechle603bb992007-10-14 22:49:01 +010017PHDRS {
18 text PT_LOAD FLAGS(7); /* RWX */
19 note PT_NOTE FLAGS(4); /* R__ */
20}
Sam Ravnborg51b563f2009-09-20 12:28:22 +020021
Manuel Laussd71789b2009-09-24 21:44:24 +020022#ifdef CONFIG_32BIT
23 #ifdef CONFIG_CPU_LITTLE_ENDIAN
Sam Ravnborg51b563f2009-09-20 12:28:22 +020024 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020025 #else
Sam Ravnborg51b563f2009-09-20 12:28:22 +020026 jiffies = jiffies_64 + 4;
Manuel Laussd71789b2009-09-24 21:44:24 +020027 #endif
28#else
Sam Ravnborg51b563f2009-09-20 12:28:22 +020029 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020030#endif
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020031
Linus Torvalds1da177e2005-04-16 15:20:36 -070032SECTIONS
33{
34#ifdef CONFIG_BOOT_ELF64
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020035 /* Read-only sections, merged into text segment: */
36 /* . = 0xc000000000000000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070037
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020038 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
39 /* . = 0xc00000000001c000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020041 /* Set the vaddr for the text segment to a value
42 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
43 * >= 0xa800 0000 0030 0000 otherwise
44 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020046 /* . = 0xa800000000300000; */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020047 . = 0xffffffff80300000;
Linus Torvalds1da177e2005-04-16 15:20:36 -070048#endif
Sam Ravnborg51b563f2009-09-20 12:28:22 +020049 . = VMLINUX_LOAD_ADDRESS;
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020050 /* read-only */
51 _text = .; /* Text and read-only data */
52 .text : {
53 TEXT_TEXT
54 SCHED_TEXT
55 LOCK_TEXT
Ralf Baechlef70fd1b2007-10-14 22:50:05 +010056 KPROBES_TEXT
Wu Zhangjin8f99a162009-11-20 20:34:33 +080057 IRQENTRY_TEXT
Atsushi Nemoto6b3766a2008-08-05 23:45:14 +090058 *(.text.*)
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020059 *(.fixup)
60 *(.gnu.warning)
Ralf Baechle603bb992007-10-14 22:49:01 +010061 } :text = 0
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020062 _etext = .; /* End of text section */
Linus Torvalds1da177e2005-04-16 15:20:36 -070063
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040064 EXCEPTION_TABLE(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020066 /* Exception table for data bus errors */
67 __dbe_table : {
68 __start___dbe_table = .;
69 *(__dbe_table)
70 __stop___dbe_table = .;
71 }
Ralf Baechle603bb992007-10-14 22:49:01 +010072
73 NOTES :text :note
74 .dummy : { *(.dummy) } :text
75
Steven Rostedta2d063a2011-05-19 21:34:58 -040076 _sdata = .; /* Start of data section */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020077 RODATA
Linus Torvalds1da177e2005-04-16 15:20:36 -070078
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020079 /* writeable */
80 .data : { /* Data */
Franck Bui-Huu16be2432007-10-18 23:12:32 +020081 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
David Daney7b1c0d22012-07-19 09:11:14 +020083 INIT_TASK_DATA(THREAD_SIZE)
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040084 NOSAVE_DATA
85 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Catalin Marinasf8bec752011-03-29 11:40:06 +010086 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Franck Bui-Huu16be2432007-10-18 23:12:32 +020087 DATA_DATA
88 CONSTRUCTORS
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020089 }
90 _gp = . + 0x8000;
91 .lit8 : {
92 *(.lit8)
93 }
94 .lit4 : {
95 *(.lit4)
96 }
97 /* We want the small data sections together, so single-instruction offsets
98 can access them all, and initialized data all before uninitialized, so
99 we can shorten the on-disk segment size. */
100 .sdata : {
101 *(.sdata)
102 }
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200103 _edata = .; /* End of data section */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200105 /* will be freed after init */
Nelson Elhagea0b54e22009-07-31 16:58:18 -0400106 . = ALIGN(PAGE_SIZE); /* Init code and data */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200107 __init_begin = .;
Nelson Elhage6eb10bc2009-07-31 16:58:19 -0400108 INIT_TEXT_SECTION(PAGE_SIZE)
109 INIT_DATA_SECTION(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110
Gabor Juhos487d70d2010-11-23 16:06:25 +0100111 . = ALIGN(4);
112 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
113 __mips_machines_start = .;
114 *(.mips.machines.init)
115 __mips_machines_end = .;
116 }
117
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200118 /* .exit.text is discarded at runtime, not link time, to deal with
119 * references from .rodata
120 */
121 .exit.text : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100122 EXIT_TEXT
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200123 }
124 .exit.data : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100125 EXIT_DATA
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200126 }
Nelson Elhage6eb10bc2009-07-31 16:58:19 -0400127
Tejun Heo0415b00d12011-03-24 18:50:09 +0100128 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
David Daney485172b2012-08-14 11:08:01 -0700129 /*
130 * Align to 64K in attempt to eliminate holes before the
131 * .bss..swapper_pg_dir section at the start of .bss. This
132 * also satisfies PAGE_SIZE alignment as the largest page size
133 * allowed is 64K.
134 */
135 . = ALIGN(0x10000);
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200136 __init_end = .;
137 /* freed after init ends here */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138
David Daney485172b2012-08-14 11:08:01 -0700139 /*
140 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
141 * gets that alignment. .sbss should be empty, so there will be
142 * no holes after __init_end. */
143 BSS_SECTION(0, 0x10000, 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200145 _end = . ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200147 /* These mark the ABI of the kernel for debuggers. */
148 .mdebug.abi32 : {
149 KEEP(*(.mdebug.abi32))
150 }
151 .mdebug.abi64 : {
152 KEEP(*(.mdebug.abi64))
153 }
Daniel Jacobowitz6c769882007-08-03 11:43:01 -0400154
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200155 /* This is the MIPS specific mdebug section. */
156 .mdebug : {
157 *(.mdebug)
158 }
Atsushi Nemoto78665aa2006-05-11 00:41:26 +0900159
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200160 STABS_DEBUG
161 DWARF_DEBUG
Atsushi Nemoto04b6b3b2006-05-10 15:36:04 +0900162
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200163 /* These must appear regardless of . */
164 .gptab.sdata : {
165 *(.gptab.data)
166 *(.gptab.sdata)
167 }
168 .gptab.sbss : {
169 *(.gptab.bss)
170 *(.gptab.sbss)
171 }
Tejun Heo023bf6f2009-07-09 11:27:40 +0900172
173 /* Sections to be discarded */
174 DISCARDS
175 /DISCARD/ : {
176 /* ABI crap starts here */
177 *(.MIPS.options)
178 *(.options)
179 *(.pdr)
180 *(.reginfo)
181 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182}