blob: 063da008d520712cb482255cb7fed14110c33a88 [file] [log] [blame]
Jarkko Sakkinen48927bb2012-05-08 21:22:28 +03001/*
2 *
3 * Trampoline.S Derived from Setup.S by Linus Torvalds
4 *
5 * 4 Jan 1997 Michael Chastain: changed to gnu as.
6 * 15 Sept 2005 Eric Biederman: 64bit PIC support
7 *
8 * Entry: CS:IP point to the start of our code, we are
9 * in real mode with no stack, but the rest of the
10 * trampoline page to make our stack and everything else
11 * is a mystery.
12 *
13 * On entry to trampoline_data, the processor is in real mode
14 * with 16-bit addressing and 16-bit data. CS has some value
15 * and IP is zero. Thus, data addresses need to be absolute
16 * (no relocation) and are taken with regard to r_base.
17 *
18 * With the addition of trampoline_level4_pgt this code can
19 * now enter a 64bit kernel that lives at arbitrary 64bit
20 * physical addresses.
21 *
22 * If you work on this file, check the object module with objdump
23 * --full-contents --reloc to make sure there are no relocation
24 * entries.
25 */
26
27#include <linux/linkage.h>
28#include <linux/init.h>
29#include <asm/pgtable_types.h>
30#include <asm/page_types.h>
31#include <asm/msr.h>
32#include <asm/segment.h>
33#include <asm/processor-flags.h>
34
35 .text
36 .balign PAGE_SIZE
37 .code16
38
39ENTRY(trampoline_data)
40 cli # We should be safe anyway
41 wbinvd
42
43 .byte 0xea # ljmpw
44 .word 1f # Offset
45 .word real_mode_seg # Segment
461:
47 mov %cs, %ax # Code and data in the same place
48 mov %ax, %ds
49 mov %ax, %es
50 mov %ax, %ss
51
52 movl $0xA5A5A5A5, trampoline_status
53 # write marker for master knows we're running
54
55 # Setup stack
56 movw $trampoline_stack_end, %sp
57
58 call verify_cpu # Verify the cpu supports long mode
59 testl %eax, %eax # Check for return code
60 jnz no_longmode
61
62 /*
63 * GDT tables in non default location kernel can be beyond 16MB and
64 * lgdt will not be able to load the address as in real mode default
65 * operand size is 16bit. Use lgdtl instead to force operand size
66 * to 32 bit.
67 */
68
69 lidtl tidt # load idt with 0, 0
70 lgdtl tgdt # load gdt with whatever is appropriate
71
72 mov $X86_CR0_PE, %ax # protected mode (PE) bit
73 lmsw %ax # into protected mode
74
75 # flush prefetch and jump to startup_32
76 ljmpl *(startup_32_vector)
77
78no_longmode:
79 hlt
80 jmp no_longmode
81#include "../kernel/verify_cpu.S"
82
83 .code32
84 .balign 4
85ENTRY(startup_32)
86 movl $__KERNEL_DS, %eax # Initialize the %ds segment register
87 movl %eax, %ds
88
89 movl $X86_CR4_PAE, %eax
90 movl %eax, %cr4 # Enable PAE mode
91
92 movl pa_startup_64_smp, %esi
93 movl pa_startup_64_smp_high, %edi
94
95 # Setup trampoline 4 level pagetables
96 leal pa_trampoline_level4_pgt, %eax
97 movl %eax, %cr3
98
99 movl $MSR_EFER, %ecx
100 movl $(1 << _EFER_LME), %eax # Enable Long Mode
101 xorl %edx, %edx
102 wrmsr
103
104 # Enable paging and in turn activate Long Mode
105 # Enable protected mode
106 movl $(X86_CR0_PG | X86_CR0_PE), %eax
107 movl %eax, %cr0
108
109 /*
110 * At this point we're in long mode but in 32bit compatibility mode
111 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
112 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
113 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
114 */
115 ljmpl *(pa_startup_64_vector)
116
117 .code64
118 .balign 4
119ENTRY(startup_64)
120 # Now jump into the kernel using virtual addresses
121 movl %edi, %eax
122 shlq $32, %rax
123 addl %esi, %eax
124 jmp *%rax
125
126 # Careful these need to be in the same 64K segment as the above;
127tidt:
128 .word 0 # idt limit = 0
129 .word 0, 0 # idt base = 0L
130
131 # Duplicate the global descriptor table
132 # so the kernel can live anywhere
133 .balign 4
134 .globl tgdt
135tgdt:
136 .short tgdt_end - tgdt # gdt limit
137 .long pa_tgdt
138 .short 0
139 .quad 0x00cf9b000000ffff # __KERNEL32_CS
140 .quad 0x00af9b000000ffff # __KERNEL_CS
141 .quad 0x00cf93000000ffff # __KERNEL_DS
142tgdt_end:
143
144 .balign 4
145startup_32_vector:
146 .long pa_startup_32
147 .word __KERNEL32_CS, 0
148
149 .balign 4
150 .globl startup_64_vector
151startup_64_vector:
152 .long pa_startup_64
153 .word __KERNEL_CS, 0
154
155 .data
156
157 .balign 4
158ENTRY(trampoline_status)
159 .long 0
160
161trampoline_stack:
162 .org 0x1000
163trampoline_stack_end:
164
165 .globl level3_ident_pgt
166 .globl level3_kernel_pgt
167ENTRY(trampoline_level4_pgt)
168 level3_ident_pgt: .quad 0
169 .fill 510,8,0
170 level3_kernel_pgt: .quad 0
171
172 .globl startup_64_smp
173 .globl startup_64_smp_high
174startup_64_smp: .long 0
175startup_64_smp_high: .long 0