blob: e976d2fa15274239b9ed2b0568cb9bd9ba9b2aa6 [file] [log] [blame]
Stefan Agnerefb45b32014-11-02 21:36:46 +01001/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include "skeleton.dtsi"
11#include "vfxxx.dtsi"
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14/ {
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 a5_cpu: cpu@0 {
20 compatible = "arm,cortex-a5";
21 device_type = "cpu";
22 reg = <0x0>;
23 };
24 };
25
26 soc {
Stefan Agnerefb45b32014-11-02 21:36:46 +010027 aips-bus@40000000 {
28
29 intc: interrupt-controller@40002000 {
30 compatible = "arm,cortex-a9-gic";
31 #interrupt-cells = <3>;
32 interrupt-controller;
Stefan Agnerc09d0f72015-03-01 23:41:29 +010033 interrupt-parent = <&intc>;
Stefan Agnerefb45b32014-11-02 21:36:46 +010034 reg = <0x40003000 0x1000>,
35 <0x40002100 0x100>;
36 };
37
38 global_timer: timer@40002200 {
39 compatible = "arm,cortex-a9-global-timer";
40 reg = <0x40002200 0x20>;
41 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +010042 interrupt-parent = <&intc>;
Stefan Agnerefb45b32014-11-02 21:36:46 +010043 clocks = <&clks VF610_CLK_PLATFORM_BUS>;
44 };
45 };
46 };
47};
48
Stefan Agnerc09d0f72015-03-01 23:41:29 +010049&mscm_ir {
50 interrupt-parent = <&intc>;
Stefan Agnerefb45b32014-11-02 21:36:46 +010051};
Stefan Agnerc134e092014-11-28 00:35:36 +010052
53&wdoga5 {
Stefan Agnerc134e092014-11-28 00:35:36 +010054 status = "okay";
55};