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Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +08001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/slab.h>
22#include <linux/device.h>
23#include <linux/module.h>
Dong Aishengbaa64152012-09-05 10:57:15 +080024#include <linux/mfd/syscon.h>
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080025#include <linux/err.h>
26#include <linux/io.h>
27#include <linux/platform_device.h>
28#include <linux/of.h>
29#include <linux/of_address.h>
Dong Aishengbaa64152012-09-05 10:57:15 +080030#include <linux/regmap.h>
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080031#include <linux/regulator/driver.h>
32#include <linux/regulator/of_regulator.h>
Sascha Hauer0d192082015-10-13 12:45:30 +020033#include <linux/regulator/machine.h>
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080034
Anson Huang9ee417c2013-01-31 11:23:53 -050035#define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */
36#define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
37
Philipp Zabel605ebd32014-02-11 14:43:44 +010038#define LDO_POWER_GATE 0x00
Philipp Zabeld38018f2014-02-11 14:43:45 +010039#define LDO_FET_FULL_ON 0x1f
Philipp Zabel605ebd32014-02-11 14:43:44 +010040
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080041struct anatop_regulator {
42 const char *name;
43 u32 control_reg;
Dong Aishengbaa64152012-09-05 10:57:15 +080044 struct regmap *anatop;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080045 int vol_bit_shift;
46 int vol_bit_width;
Anson Huang9ee417c2013-01-31 11:23:53 -050047 u32 delay_reg;
48 int delay_bit_shift;
49 int delay_bit_width;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080050 int min_bit_val;
51 int min_voltage;
52 int max_voltage;
53 struct regulator_desc rdesc;
54 struct regulator_init_data *initdata;
Philipp Zabeld38018f2014-02-11 14:43:45 +010055 bool bypass;
Philipp Zabel605ebd32014-02-11 14:43:44 +010056 int sel;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080057};
58
Anson Huang9ee417c2013-01-31 11:23:53 -050059static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
60 unsigned int old_sel,
61 unsigned int new_sel)
62{
63 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
64 u32 val;
65 int ret = 0;
66
67 /* check whether need to care about LDO ramp up speed */
68 if (anatop_reg->delay_bit_width && new_sel > old_sel) {
69 /*
70 * the delay for LDO ramp up time is
71 * based on the register setting, we need
72 * to calculate how many steps LDO need to
73 * ramp up, and how much delay needed. (us)
74 */
75 regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
76 val = (val >> anatop_reg->delay_bit_shift) &
77 ((1 << anatop_reg->delay_bit_width) - 1);
Shawn Guoff1ce052013-02-04 10:21:32 +080078 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
79 val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
Anson Huang9ee417c2013-01-31 11:23:53 -050080 }
81
82 return ret;
83}
84
Philipp Zabel605ebd32014-02-11 14:43:44 +010085static int anatop_regmap_enable(struct regulator_dev *reg)
86{
87 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
Philipp Zabeld38018f2014-02-11 14:43:45 +010088 int sel;
Philipp Zabel605ebd32014-02-11 14:43:44 +010089
Philipp Zabeld38018f2014-02-11 14:43:45 +010090 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel;
91 return regulator_set_voltage_sel_regmap(reg, sel);
Philipp Zabel605ebd32014-02-11 14:43:44 +010092}
93
94static int anatop_regmap_disable(struct regulator_dev *reg)
95{
96 return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE);
97}
98
99static int anatop_regmap_is_enabled(struct regulator_dev *reg)
100{
101 return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE;
102}
103
104static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg,
105 unsigned selector)
106{
107 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
108 int ret;
109
Philipp Zabeld38018f2014-02-11 14:43:45 +0100110 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) {
Philipp Zabel605ebd32014-02-11 14:43:44 +0100111 anatop_reg->sel = selector;
112 return 0;
113 }
114
115 ret = regulator_set_voltage_sel_regmap(reg, selector);
116 if (!ret)
117 anatop_reg->sel = selector;
118 return ret;
119}
120
121static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg)
122{
123 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
124
Philipp Zabeld38018f2014-02-11 14:43:45 +0100125 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg))
Philipp Zabel605ebd32014-02-11 14:43:44 +0100126 return anatop_reg->sel;
127
128 return regulator_get_voltage_sel_regmap(reg);
129}
130
Philipp Zabeld38018f2014-02-11 14:43:45 +0100131static int anatop_regmap_get_bypass(struct regulator_dev *reg, bool *enable)
132{
133 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
134 int sel;
135
136 sel = regulator_get_voltage_sel_regmap(reg);
137 if (sel == LDO_FET_FULL_ON)
138 WARN_ON(!anatop_reg->bypass);
139 else if (sel != LDO_POWER_GATE)
140 WARN_ON(anatop_reg->bypass);
141
142 *enable = anatop_reg->bypass;
143 return 0;
144}
145
146static int anatop_regmap_set_bypass(struct regulator_dev *reg, bool enable)
147{
148 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
149 int sel;
150
151 if (enable == anatop_reg->bypass)
152 return 0;
153
154 sel = enable ? LDO_FET_FULL_ON : anatop_reg->sel;
155 anatop_reg->bypass = enable;
156
157 return regulator_set_voltage_sel_regmap(reg, sel);
158}
159
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800160static struct regulator_ops anatop_rops = {
Axel Lin114c5742014-02-22 12:53:18 +0800161 .set_voltage_sel = regulator_set_voltage_sel_regmap,
162 .get_voltage_sel = regulator_get_voltage_sel_regmap,
Axel Lind01c3a12012-06-03 23:02:34 +0800163 .list_voltage = regulator_list_voltage_linear,
164 .map_voltage = regulator_map_voltage_linear,
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800165};
166
Philipp Zabel605ebd32014-02-11 14:43:44 +0100167static struct regulator_ops anatop_core_rops = {
168 .enable = anatop_regmap_enable,
169 .disable = anatop_regmap_disable,
170 .is_enabled = anatop_regmap_is_enabled,
171 .set_voltage_sel = anatop_regmap_core_set_voltage_sel,
172 .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
173 .get_voltage_sel = anatop_regmap_core_get_voltage_sel,
174 .list_voltage = regulator_list_voltage_linear,
175 .map_voltage = regulator_map_voltage_linear,
Philipp Zabeld38018f2014-02-11 14:43:45 +0100176 .get_bypass = anatop_regmap_get_bypass,
177 .set_bypass = anatop_regmap_set_bypass,
Philipp Zabel605ebd32014-02-11 14:43:44 +0100178};
179
Bill Pembertona5023572012-11-19 13:22:22 -0500180static int anatop_regulator_probe(struct platform_device *pdev)
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800181{
182 struct device *dev = &pdev->dev;
183 struct device_node *np = dev->of_node;
Dong Aishengbaa64152012-09-05 10:57:15 +0800184 struct device_node *anatop_np;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800185 struct regulator_desc *rdesc;
186 struct regulator_dev *rdev;
187 struct anatop_regulator *sreg;
188 struct regulator_init_data *initdata;
Axel Lind914d812012-04-10 22:45:01 +0800189 struct regulator_config config = { };
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800190 int ret = 0;
Philipp Zabel605ebd32014-02-11 14:43:44 +0100191 u32 val;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800192
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800193 sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
194 if (!sreg)
195 return -ENOMEM;
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200196 sreg->name = of_get_property(np, "regulator-name", NULL);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800197 rdesc = &sreg->rdesc;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800198 rdesc->name = sreg->name;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800199 rdesc->type = REGULATOR_VOLTAGE;
200 rdesc->owner = THIS_MODULE;
Dong Aishengbaa64152012-09-05 10:57:15 +0800201
Javier Martinez Canillas072e78b2014-11-10 14:43:53 +0100202 initdata = of_get_regulator_init_data(dev, np, rdesc);
Sascha Hauer0d192082015-10-13 12:45:30 +0200203 initdata->supply_regulator = "vin";
Javier Martinez Canillas072e78b2014-11-10 14:43:53 +0100204 sreg->initdata = initdata;
205
Dong Aishengbaa64152012-09-05 10:57:15 +0800206 anatop_np = of_get_parent(np);
207 if (!anatop_np)
208 return -ENODEV;
209 sreg->anatop = syscon_node_to_regmap(anatop_np);
210 of_node_put(anatop_np);
211 if (IS_ERR(sreg->anatop))
212 return PTR_ERR(sreg->anatop);
213
Ying-Chun Liu (PaulLiu)2f2cc272012-03-27 15:54:01 +0800214 ret = of_property_read_u32(np, "anatop-reg-offset",
215 &sreg->control_reg);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800216 if (ret) {
Ying-Chun Liu (PaulLiu)2f2cc272012-03-27 15:54:01 +0800217 dev_err(dev, "no anatop-reg-offset property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200218 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800219 }
220 ret = of_property_read_u32(np, "anatop-vol-bit-width",
221 &sreg->vol_bit_width);
222 if (ret) {
223 dev_err(dev, "no anatop-vol-bit-width property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200224 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800225 }
226 ret = of_property_read_u32(np, "anatop-vol-bit-shift",
227 &sreg->vol_bit_shift);
228 if (ret) {
229 dev_err(dev, "no anatop-vol-bit-shift property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200230 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800231 }
232 ret = of_property_read_u32(np, "anatop-min-bit-val",
233 &sreg->min_bit_val);
234 if (ret) {
235 dev_err(dev, "no anatop-min-bit-val property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200236 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800237 }
238 ret = of_property_read_u32(np, "anatop-min-voltage",
239 &sreg->min_voltage);
240 if (ret) {
241 dev_err(dev, "no anatop-min-voltage property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200242 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800243 }
244 ret = of_property_read_u32(np, "anatop-max-voltage",
245 &sreg->max_voltage);
246 if (ret) {
247 dev_err(dev, "no anatop-max-voltage property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200248 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800249 }
250
Anson Huang9ee417c2013-01-31 11:23:53 -0500251 /* read LDO ramp up setting, only for core reg */
252 of_property_read_u32(np, "anatop-delay-reg-offset",
253 &sreg->delay_reg);
254 of_property_read_u32(np, "anatop-delay-bit-width",
255 &sreg->delay_bit_width);
256 of_property_read_u32(np, "anatop-delay-bit-shift",
257 &sreg->delay_bit_shift);
258
Axel Lin985884d2012-12-09 08:05:45 +0800259 rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
260 + sreg->min_bit_val;
Axel Lin0713e6a2012-05-14 11:06:44 +0800261 rdesc->min_uV = sreg->min_voltage;
262 rdesc->uV_step = 25000;
Axel Lin985884d2012-12-09 08:05:45 +0800263 rdesc->linear_min_sel = sreg->min_bit_val;
Axel Line1b01442012-12-09 08:07:43 +0800264 rdesc->vsel_reg = sreg->control_reg;
265 rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
266 sreg->vol_bit_shift;
Sascha Hauer0d192082015-10-13 12:45:30 +0200267 rdesc->min_dropout_uV = 125000;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800268
Axel Lind914d812012-04-10 22:45:01 +0800269 config.dev = &pdev->dev;
270 config.init_data = initdata;
271 config.driver_data = sreg;
272 config.of_node = pdev->dev.of_node;
Axel Line1b01442012-12-09 08:07:43 +0800273 config.regmap = sreg->anatop;
Axel Lind914d812012-04-10 22:45:01 +0800274
Philipp Zabel605ebd32014-02-11 14:43:44 +0100275 /* Only core regulators have the ramp up delay configuration. */
276 if (sreg->control_reg && sreg->delay_bit_width) {
277 rdesc->ops = &anatop_core_rops;
278
279 ret = regmap_read(config.regmap, rdesc->vsel_reg, &val);
280 if (ret) {
281 dev_err(dev, "failed to read initial state\n");
282 return ret;
283 }
284
285 sreg->sel = (val & rdesc->vsel_mask) >> sreg->vol_bit_shift;
Philipp Zabeld38018f2014-02-11 14:43:45 +0100286 if (sreg->sel == LDO_FET_FULL_ON) {
287 sreg->sel = 0;
288 sreg->bypass = true;
289 }
Markus Pargmannfe08be32014-10-06 21:33:36 +0200290
291 /*
292 * In case vddpu was disabled by the bootloader, we need to set
293 * a sane default until imx6-cpufreq was probed and changes the
294 * voltage to the correct value. In this case we set 1.25V.
295 */
296 if (!sreg->sel && !strcmp(sreg->name, "vddpu"))
297 sreg->sel = 22;
Markus Pargmannda0607c2014-10-06 21:33:37 +0200298
Mika Båtsman8a092e62016-06-17 13:31:37 +0300299 if (!sreg->bypass && !sreg->sel) {
Markus Pargmannda0607c2014-10-06 21:33:37 +0200300 dev_err(&pdev->dev, "Failed to read a valid default voltage selector.\n");
301 return -EINVAL;
302 }
Philipp Zabel605ebd32014-02-11 14:43:44 +0100303 } else {
304 rdesc->ops = &anatop_rops;
305 }
306
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800307 /* register regulator */
Sachin Kamatbe1221e2013-09-04 12:00:57 +0530308 rdev = devm_regulator_register(dev, rdesc, &config);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800309 if (IS_ERR(rdev)) {
310 dev_err(dev, "failed to register %s\n",
311 rdesc->name);
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200312 return PTR_ERR(rdev);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800313 }
314
315 platform_set_drvdata(pdev, rdev);
316
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800317 return 0;
318}
319
Jingoo Hana799baa2014-05-07 16:55:10 +0900320static const struct of_device_id of_anatop_regulator_match_tbl[] = {
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800321 { .compatible = "fsl,anatop-regulator", },
322 { /* end */ }
323};
Luis de Bethencourtd702ffd2015-09-18 19:09:07 +0200324MODULE_DEVICE_TABLE(of, of_anatop_regulator_match_tbl);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800325
Shawn Guoc0d78c22012-04-02 14:57:01 +0800326static struct platform_driver anatop_regulator_driver = {
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800327 .driver = {
328 .name = "anatop_regulator",
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800329 .of_match_table = of_anatop_regulator_match_tbl,
330 },
331 .probe = anatop_regulator_probe,
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800332};
333
334static int __init anatop_regulator_init(void)
335{
Shawn Guoc0d78c22012-04-02 14:57:01 +0800336 return platform_driver_register(&anatop_regulator_driver);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800337}
338postcore_initcall(anatop_regulator_init);
339
340static void __exit anatop_regulator_exit(void)
341{
Shawn Guoc0d78c22012-04-02 14:57:01 +0800342 platform_driver_unregister(&anatop_regulator_driver);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800343}
344module_exit(anatop_regulator_exit);
345
Jingoo Han34f75682013-10-14 17:45:51 +0900346MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
347MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800348MODULE_DESCRIPTION("ANATOP Regulator driver");
349MODULE_LICENSE("GPL v2");
Fabio Estevam89705b92013-12-31 10:56:00 -0200350MODULE_ALIAS("platform:anatop_regulator");