Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1 | /* |
| 2 | * SH7724 Pinmux |
| 3 | * |
| 4 | * Copyright (C) 2009 Renesas Solutions Corp. |
| 5 | * |
| 6 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> |
| 7 | * |
| 8 | * Based on SH7723 Pinmux |
| 9 | * Copyright (C) 2008 Magnus Damm |
| 10 | * |
| 11 | * This file is subject to the terms and conditions of the GNU General Public |
| 12 | * License. See the file "COPYING" in the main directory of this archive |
| 13 | * for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/kernel.h> |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 18 | #include <cpu/sh7724.h> |
| 19 | |
Laurent Pinchart | c332380 | 2012-12-15 23:51:55 +0100 | [diff] [blame] | 20 | #include "sh_pfc.h" |
| 21 | |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 22 | enum { |
| 23 | PINMUX_RESERVED = 0, |
| 24 | |
| 25 | PINMUX_DATA_BEGIN, |
| 26 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, |
| 27 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA, |
| 28 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, |
| 29 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA, |
| 30 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, |
| 31 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA, |
| 32 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, |
| 33 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA, |
| 34 | PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, |
| 35 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA, |
| 36 | PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA, |
| 37 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA, |
| 38 | PTG5_DATA, PTG4_DATA, |
| 39 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA, |
| 40 | PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA, |
| 41 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA, |
| 42 | PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, |
| 43 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA, |
| 44 | PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, |
| 45 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA, |
| 46 | PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, |
| 47 | PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA, |
| 48 | PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, |
| 49 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA, |
| 50 | PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, |
| 51 | PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA, |
| 52 | PTQ7_DATA, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, |
| 53 | PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA, |
| 54 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, |
| 55 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA, |
| 56 | PTS6_DATA, PTS5_DATA, PTS4_DATA, |
| 57 | PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA, |
| 58 | PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA, |
| 59 | PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA, |
| 60 | PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, |
| 61 | PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA, |
| 62 | PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA, |
| 63 | PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA, |
| 64 | PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA, |
| 65 | PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA, |
| 66 | PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA, |
| 67 | PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA, |
| 68 | PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA, |
| 69 | PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA, |
| 70 | PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA, |
| 71 | PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA, |
| 72 | PINMUX_DATA_END, |
| 73 | |
| 74 | PINMUX_INPUT_BEGIN, |
| 75 | PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN, |
| 76 | PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN, |
| 77 | PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN, |
| 78 | PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN, |
| 79 | PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN, |
| 80 | PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN, |
| 81 | PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, |
| 82 | PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN, |
| 83 | PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, |
| 84 | PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN, |
| 85 | PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN, |
| 86 | PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN, |
| 87 | PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN, |
| 88 | PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN, |
| 89 | PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN, |
| 90 | PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN, |
| 91 | PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN, |
| 92 | PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, |
| 93 | PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN, |
| 94 | PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN, |
| 95 | PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN, |
| 96 | PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN, |
| 97 | PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN, |
| 98 | PTQ7_IN, PTQ6_IN, PTQ5_IN, PTQ4_IN, |
| 99 | PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN, |
| 100 | PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN, |
| 101 | PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN, |
| 102 | PTS6_IN, PTS5_IN, PTS4_IN, |
| 103 | PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN, |
| 104 | PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN, |
| 105 | PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN, |
| 106 | PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN, |
| 107 | PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN, |
| 108 | PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN, |
| 109 | PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN, |
| 110 | PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN, |
| 111 | PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN, |
| 112 | PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN, |
| 113 | PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN, |
| 114 | PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN, |
| 115 | PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN, |
| 116 | PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN, |
| 117 | PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN, |
| 118 | PINMUX_INPUT_END, |
| 119 | |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 120 | PINMUX_OUTPUT_BEGIN, |
| 121 | PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT, |
| 122 | PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT, |
| 123 | PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT, |
| 124 | PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT, |
| 125 | PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT, |
| 126 | PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT, |
| 127 | PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT, |
| 128 | PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT, |
| 129 | PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, |
| 130 | PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT, |
| 131 | PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT, |
| 132 | PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT, |
| 133 | PTG5_OUT, PTG4_OUT, |
| 134 | PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT, |
| 135 | PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT, |
| 136 | PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT, |
| 137 | PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, |
| 138 | PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT, |
| 139 | PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT, |
| 140 | PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT, |
| 141 | PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, |
| 142 | PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT, |
| 143 | PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT, |
| 144 | PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT, |
| 145 | PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT, |
| 146 | PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, |
| 147 | PTQ7_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT, |
| 148 | PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT, |
| 149 | PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT, |
| 150 | PTR1_OUT, PTR0_OUT, |
| 151 | PTS6_OUT, PTS5_OUT, PTS4_OUT, |
| 152 | PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT, |
| 153 | PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT, |
| 154 | PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT, |
| 155 | PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT, |
| 156 | PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT, |
| 157 | PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT, |
| 158 | PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT, |
| 159 | PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT, |
| 160 | PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT, |
| 161 | PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT, |
| 162 | PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT, |
| 163 | PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT, |
| 164 | PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT, |
| 165 | PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT, |
| 166 | PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT, |
| 167 | PINMUX_OUTPUT_END, |
| 168 | |
| 169 | PINMUX_FUNCTION_BEGIN, |
| 170 | PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN, |
| 171 | PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN, |
| 172 | PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN, |
| 173 | PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN, |
| 174 | PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN, |
| 175 | PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN, |
| 176 | PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN, |
| 177 | PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN, |
| 178 | PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN, |
| 179 | PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN, |
| 180 | PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN, |
| 181 | PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN, |
| 182 | PTG5_FN, PTG4_FN, |
| 183 | PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN, |
| 184 | PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN, |
| 185 | PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN, |
| 186 | PTJ7_FN, PTJ6_FN, PTJ5_FN, |
| 187 | PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN, |
| 188 | PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN, |
| 189 | PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN, |
| 190 | PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, |
| 191 | PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN, |
| 192 | PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN, |
| 193 | PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN, |
| 194 | PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN, |
| 195 | PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN, |
| 196 | PTQ7_FN, PTQ6_FN, PTQ5_FN, PTQ4_FN, |
| 197 | PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN, |
| 198 | PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN, |
| 199 | PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN, |
| 200 | PTS6_FN, PTS5_FN, PTS4_FN, |
| 201 | PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN, |
| 202 | PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN, |
| 203 | PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN, |
| 204 | PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN, |
| 205 | PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN, |
| 206 | PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN, |
| 207 | PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN, |
| 208 | PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN, |
| 209 | PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN, |
| 210 | PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN, |
| 211 | PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN, |
| 212 | PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN, |
| 213 | PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN, |
| 214 | PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN, |
| 215 | PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN, |
| 216 | |
| 217 | |
| 218 | PSA15_0, PSA15_1, |
| 219 | PSA14_0, PSA14_1, |
| 220 | PSA13_0, PSA13_1, |
| 221 | PSA12_0, PSA12_1, |
| 222 | PSA10_0, PSA10_1, |
| 223 | PSA9_0, PSA9_1, |
| 224 | PSA8_0, PSA8_1, |
| 225 | PSA7_0, PSA7_1, |
| 226 | PSA6_0, PSA6_1, |
| 227 | PSA5_0, PSA5_1, |
| 228 | PSA3_0, PSA3_1, |
| 229 | PSA2_0, PSA2_1, |
| 230 | PSA1_0, PSA1_1, |
| 231 | PSA0_0, PSA0_1, |
| 232 | |
| 233 | PSB14_0, PSB14_1, |
| 234 | PSB13_0, PSB13_1, |
| 235 | PSB12_0, PSB12_1, |
| 236 | PSB11_0, PSB11_1, |
| 237 | PSB10_0, PSB10_1, |
| 238 | PSB9_0, PSB9_1, |
| 239 | PSB8_0, PSB8_1, |
| 240 | PSB7_0, PSB7_1, |
| 241 | PSB6_0, PSB6_1, |
| 242 | PSB5_0, PSB5_1, |
| 243 | PSB4_0, PSB4_1, |
| 244 | PSB3_0, PSB3_1, |
| 245 | PSB2_0, PSB2_1, |
| 246 | PSB1_0, PSB1_1, |
| 247 | PSB0_0, PSB0_1, |
| 248 | |
| 249 | PSC15_0, PSC15_1, |
| 250 | PSC14_0, PSC14_1, |
| 251 | PSC13_0, PSC13_1, |
| 252 | PSC12_0, PSC12_1, |
| 253 | PSC11_0, PSC11_1, |
| 254 | PSC10_0, PSC10_1, |
| 255 | PSC9_0, PSC9_1, |
| 256 | PSC8_0, PSC8_1, |
| 257 | PSC7_0, PSC7_1, |
| 258 | PSC6_0, PSC6_1, |
| 259 | PSC5_0, PSC5_1, |
| 260 | PSC4_0, PSC4_1, |
| 261 | PSC2_0, PSC2_1, |
| 262 | PSC1_0, PSC1_1, |
| 263 | PSC0_0, PSC0_1, |
| 264 | |
| 265 | PSD15_0, PSD15_1, |
| 266 | PSD14_0, PSD14_1, |
| 267 | PSD13_0, PSD13_1, |
| 268 | PSD12_0, PSD12_1, |
| 269 | PSD11_0, PSD11_1, |
| 270 | PSD10_0, PSD10_1, |
| 271 | PSD9_0, PSD9_1, |
| 272 | PSD8_0, PSD8_1, |
| 273 | PSD7_0, PSD7_1, |
| 274 | PSD6_0, PSD6_1, |
| 275 | PSD5_0, PSD5_1, |
| 276 | PSD4_0, PSD4_1, |
| 277 | PSD3_0, PSD3_1, |
| 278 | PSD2_0, PSD2_1, |
| 279 | PSD1_0, PSD1_1, |
| 280 | PSD0_0, PSD0_1, |
| 281 | |
| 282 | PSE15_0, PSE15_1, |
| 283 | PSE14_0, PSE14_1, |
| 284 | PSE13_0, PSE13_1, |
| 285 | PSE12_0, PSE12_1, |
| 286 | PSE11_0, PSE11_1, |
| 287 | PSE10_0, PSE10_1, |
| 288 | PSE9_0, PSE9_1, |
| 289 | PSE8_0, PSE8_1, |
| 290 | PSE7_0, PSE7_1, |
| 291 | PSE6_0, PSE6_1, |
| 292 | PSE5_0, PSE5_1, |
| 293 | PSE4_0, PSE4_1, |
| 294 | PSE3_0, PSE3_1, |
| 295 | PSE2_0, PSE2_1, |
| 296 | PSE1_0, PSE1_1, |
| 297 | PSE0_0, PSE0_1, |
| 298 | PINMUX_FUNCTION_END, |
| 299 | |
| 300 | PINMUX_MARK_BEGIN, |
| 301 | /*PTA*/ |
| 302 | D23_MARK, KEYOUT2_MARK, IDED15_MARK, |
| 303 | D22_MARK, KEYOUT1_MARK, IDED14_MARK, |
| 304 | D21_MARK, KEYOUT0_MARK, IDED13_MARK, |
| 305 | D20_MARK, KEYIN4_MARK, IDED12_MARK, |
| 306 | D19_MARK, KEYIN3_MARK, IDED11_MARK, |
| 307 | D18_MARK, KEYIN2_MARK, IDED10_MARK, |
| 308 | D17_MARK, KEYIN1_MARK, IDED9_MARK, |
| 309 | D16_MARK, KEYIN0_MARK, IDED8_MARK, |
| 310 | |
| 311 | /*PTB*/ |
| 312 | D31_MARK, TPUTO1_MARK, IDEA1_MARK, |
| 313 | D30_MARK, TPUTO0_MARK, IDEA0_MARK, |
| 314 | D29_MARK, IODREQ_MARK, |
| 315 | D28_MARK, IDECS0_MARK, |
| 316 | D27_MARK, IDECS1_MARK, |
| 317 | D26_MARK, KEYOUT5_IN5_MARK, IDEIORD_MARK, |
| 318 | D25_MARK, KEYOUT4_IN6_MARK, IDEIOWR_MARK, |
| 319 | D24_MARK, KEYOUT3_MARK, IDEINT_MARK, |
| 320 | |
| 321 | /*PTC*/ |
| 322 | LCDD7_MARK, |
| 323 | LCDD6_MARK, |
| 324 | LCDD5_MARK, |
| 325 | LCDD4_MARK, |
| 326 | LCDD3_MARK, |
| 327 | LCDD2_MARK, |
| 328 | LCDD1_MARK, |
| 329 | LCDD0_MARK, |
| 330 | |
| 331 | /*PTD*/ |
| 332 | LCDD15_MARK, |
| 333 | LCDD14_MARK, |
| 334 | LCDD13_MARK, |
| 335 | LCDD12_MARK, |
| 336 | LCDD11_MARK, |
| 337 | LCDD10_MARK, |
| 338 | LCDD9_MARK, |
| 339 | LCDD8_MARK, |
| 340 | |
| 341 | /*PTE*/ |
| 342 | FSIMCKB_MARK, |
| 343 | FSIMCKA_MARK, |
| 344 | LCDD21_MARK, SCIF2_L_TXD_MARK, |
| 345 | LCDD20_MARK, SCIF4_SCK_MARK, |
| 346 | LCDD19_MARK, SCIF4_RXD_MARK, |
| 347 | LCDD18_MARK, SCIF4_TXD_MARK, |
| 348 | LCDD17_MARK, |
| 349 | LCDD16_MARK, |
| 350 | |
| 351 | /*PTF*/ |
| 352 | LCDVSYN_MARK, |
| 353 | LCDDISP_MARK, LCDRS_MARK, |
| 354 | LCDHSYN_MARK, LCDCS_MARK, |
| 355 | LCDDON_MARK, |
| 356 | LCDDCK_MARK, LCDWR_MARK, |
| 357 | LCDVEPWC_MARK, SCIF0_TXD_MARK, |
| 358 | LCDD23_MARK, SCIF2_L_SCK_MARK, |
| 359 | LCDD22_MARK, SCIF2_L_RXD_MARK, |
| 360 | |
| 361 | /*PTG*/ |
| 362 | AUDCK_MARK, |
| 363 | AUDSYNC_MARK, |
| 364 | AUDATA3_MARK, |
| 365 | AUDATA2_MARK, |
| 366 | AUDATA1_MARK, |
| 367 | AUDATA0_MARK, |
| 368 | |
| 369 | /*PTH*/ |
| 370 | VIO0_VD_MARK, |
| 371 | VIO0_CLK_MARK, |
| 372 | VIO0_D7_MARK, |
| 373 | VIO0_D6_MARK, |
| 374 | VIO0_D5_MARK, |
| 375 | VIO0_D4_MARK, |
| 376 | VIO0_D3_MARK, |
| 377 | VIO0_D2_MARK, |
| 378 | |
| 379 | /*PTJ*/ |
| 380 | PDSTATUS_MARK, |
| 381 | STATUS2_MARK, |
| 382 | STATUS0_MARK, |
| 383 | A25_MARK, BS_MARK, |
| 384 | A24_MARK, |
| 385 | A23_MARK, |
| 386 | A22_MARK, |
| 387 | |
| 388 | /*PTK*/ |
| 389 | VIO1_D5_MARK, VIO0_D13_MARK, IDED5_MARK, |
| 390 | VIO1_D4_MARK, VIO0_D12_MARK, IDED4_MARK, |
| 391 | VIO1_D3_MARK, VIO0_D11_MARK, IDED3_MARK, |
| 392 | VIO1_D2_MARK, VIO0_D10_MARK, IDED2_MARK, |
| 393 | VIO1_D1_MARK, VIO0_D9_MARK, IDED1_MARK, |
| 394 | VIO1_D0_MARK, VIO0_D8_MARK, IDED0_MARK, |
| 395 | VIO0_FLD_MARK, |
| 396 | VIO0_HD_MARK, |
| 397 | |
| 398 | /*PTL*/ |
| 399 | DV_D5_MARK, SCIF3_V_SCK_MARK, RMII_RXD0_MARK, |
| 400 | DV_D4_MARK, SCIF3_V_RXD_MARK, RMII_RXD1_MARK, |
| 401 | DV_D3_MARK, SCIF3_V_TXD_MARK, RMII_REF_CLK_MARK, |
| 402 | DV_D2_MARK, SCIF1_SCK_MARK, RMII_TX_EN_MARK, |
| 403 | DV_D1_MARK, SCIF1_RXD_MARK, RMII_TXD0_MARK, |
| 404 | DV_D0_MARK, SCIF1_TXD_MARK, RMII_TXD1_MARK, |
| 405 | DV_D15_MARK, |
| 406 | DV_D14_MARK, MSIOF0_MCK_MARK, |
| 407 | |
| 408 | /*PTM*/ |
| 409 | DV_D13_MARK, MSIOF0_TSCK_MARK, |
| 410 | DV_D12_MARK, MSIOF0_RXD_MARK, |
| 411 | DV_D11_MARK, MSIOF0_TXD_MARK, |
| 412 | DV_D10_MARK, MSIOF0_TSYNC_MARK, |
| 413 | DV_D9_MARK, MSIOF0_SS1_MARK, MSIOF0_RSCK_MARK, |
| 414 | DV_D8_MARK, MSIOF0_SS2_MARK, MSIOF0_RSYNC_MARK, |
| 415 | LCDVCPWC_MARK, SCIF0_RXD_MARK, |
| 416 | LCDRD_MARK, SCIF0_SCK_MARK, |
| 417 | |
| 418 | /*PTN*/ |
| 419 | VIO0_D1_MARK, |
| 420 | VIO0_D0_MARK, |
| 421 | DV_CLKI_MARK, |
| 422 | DV_CLK_MARK, SCIF2_V_SCK_MARK, |
| 423 | DV_VSYNC_MARK, SCIF2_V_RXD_MARK, |
| 424 | DV_HSYNC_MARK, SCIF2_V_TXD_MARK, |
| 425 | DV_D7_MARK, SCIF3_V_CTS_MARK, RMII_RX_ER_MARK, |
| 426 | DV_D6_MARK, SCIF3_V_RTS_MARK, RMII_CRS_DV_MARK, |
| 427 | |
| 428 | /*PTQ*/ |
| 429 | D7_MARK, |
| 430 | D6_MARK, |
| 431 | D5_MARK, |
| 432 | D4_MARK, |
| 433 | D3_MARK, |
| 434 | D2_MARK, |
| 435 | D1_MARK, |
| 436 | D0_MARK, |
| 437 | |
| 438 | /*PTR*/ |
| 439 | CS6B_CE1B_MARK, |
| 440 | CS6A_CE2B_MARK, |
| 441 | CS5B_CE1A_MARK, |
| 442 | CS5A_CE2A_MARK, |
| 443 | IOIS16_MARK, LCDLCLK_MARK, |
| 444 | WAIT_MARK, |
| 445 | WE3_ICIOWR_MARK, TPUTO3_MARK, TPUTI3_MARK, |
| 446 | WE2_ICIORD_MARK, TPUTO2_MARK, IDEA2_MARK, |
| 447 | |
| 448 | /*PTS*/ |
| 449 | VIO_CKO_MARK, |
| 450 | VIO1_FLD_MARK, TPUTI2_MARK, IDEIORDY_MARK, |
| 451 | VIO1_HD_MARK, SCIF5_SCK_MARK, |
| 452 | VIO1_VD_MARK, SCIF5_RXD_MARK, |
| 453 | VIO1_CLK_MARK, SCIF5_TXD_MARK, |
| 454 | VIO1_D7_MARK, VIO0_D15_MARK, IDED7_MARK, |
| 455 | VIO1_D6_MARK, VIO0_D14_MARK, IDED6_MARK, |
| 456 | |
| 457 | /*PTT*/ |
| 458 | D15_MARK, |
| 459 | D14_MARK, |
| 460 | D13_MARK, |
| 461 | D12_MARK, |
| 462 | D11_MARK, |
| 463 | D10_MARK, |
| 464 | D9_MARK, |
| 465 | D8_MARK, |
| 466 | |
| 467 | /*PTU*/ |
| 468 | DMAC_DACK0_MARK, |
| 469 | DMAC_DREQ0_MARK, |
| 470 | FSIOASD_MARK, |
| 471 | FSIIABCK_MARK, |
| 472 | FSIIALRCK_MARK, |
| 473 | FSIOABCK_MARK, |
| 474 | FSIOALRCK_MARK, |
| 475 | CLKAUDIOAO_MARK, |
| 476 | |
| 477 | /*PTV*/ |
| 478 | FSIIBSD_MARK, MSIOF1_SS2_MARK, MSIOF1_RSYNC_MARK, |
| 479 | FSIOBSD_MARK, MSIOF1_SS1_MARK, MSIOF1_RSCK_MARK, |
| 480 | FSIIBBCK_MARK, MSIOF1_RXD_MARK, |
| 481 | FSIIBLRCK_MARK, MSIOF1_TSYNC_MARK, |
| 482 | FSIOBBCK_MARK, MSIOF1_TSCK_MARK, |
| 483 | FSIOBLRCK_MARK, MSIOF1_TXD_MARK, |
| 484 | CLKAUDIOBO_MARK, MSIOF1_MCK_MARK, |
| 485 | FSIIASD_MARK, |
| 486 | |
| 487 | /*PTW*/ |
| 488 | MMC_D7_MARK, SDHI1CD_MARK, IODACK_MARK, |
| 489 | MMC_D6_MARK, SDHI1WP_MARK, IDERST_MARK, |
| 490 | MMC_D5_MARK, SDHI1D3_MARK, EXBUF_ENB_MARK, |
| 491 | MMC_D4_MARK, SDHI1D2_MARK, DIRECTION_MARK, |
| 492 | MMC_D3_MARK, SDHI1D1_MARK, |
| 493 | MMC_D2_MARK, SDHI1D0_MARK, |
| 494 | MMC_D1_MARK, SDHI1CMD_MARK, |
| 495 | MMC_D0_MARK, SDHI1CLK_MARK, |
| 496 | |
| 497 | /*PTX*/ |
| 498 | DMAC_DACK1_MARK, IRDA_OUT_MARK, |
| 499 | DMAC_DREQ1_MARK, IRDA_IN_MARK, |
| 500 | TSIF_TS0_SDAT_MARK, LNKSTA_MARK, |
| 501 | TSIF_TS0_SCK_MARK, MDIO_MARK, |
| 502 | TSIF_TS0_SDEN_MARK, MDC_MARK, |
| 503 | TSIF_TS0_SPSYNC_MARK, |
| 504 | MMC_CLK_MARK, |
| 505 | MMC_CMD_MARK, |
| 506 | |
| 507 | /*PTY*/ |
| 508 | SDHI0CD_MARK, |
| 509 | SDHI0WP_MARK, |
| 510 | SDHI0D3_MARK, |
| 511 | SDHI0D2_MARK, |
| 512 | SDHI0D1_MARK, |
| 513 | SDHI0D0_MARK, |
| 514 | SDHI0CMD_MARK, |
| 515 | SDHI0CLK_MARK, |
| 516 | |
| 517 | /*PTZ*/ |
| 518 | INTC_IRQ7_MARK, SCIF3_I_CTS_MARK, |
| 519 | INTC_IRQ6_MARK, SCIF3_I_RTS_MARK, |
| 520 | INTC_IRQ5_MARK, SCIF3_I_SCK_MARK, |
| 521 | INTC_IRQ4_MARK, SCIF3_I_RXD_MARK, |
| 522 | INTC_IRQ3_MARK, SCIF3_I_TXD_MARK, |
| 523 | INTC_IRQ2_MARK, |
| 524 | INTC_IRQ1_MARK, |
| 525 | INTC_IRQ0_MARK, |
| 526 | PINMUX_MARK_END, |
| 527 | }; |
| 528 | |
Laurent Pinchart | 533743d | 2013-07-15 13:03:20 +0200 | [diff] [blame] | 529 | static const u16 pinmux_data[] = { |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 530 | /* PTA GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 531 | PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), |
| 532 | PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), |
| 533 | PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT), |
| 534 | PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT), |
| 535 | PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT), |
| 536 | PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT), |
| 537 | PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT), |
| 538 | PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 539 | |
| 540 | /* PTB GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 541 | PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT), |
| 542 | PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT), |
| 543 | PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT), |
| 544 | PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT), |
| 545 | PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT), |
| 546 | PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT), |
| 547 | PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT), |
| 548 | PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 549 | |
| 550 | /* PTC GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 551 | PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT), |
| 552 | PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT), |
| 553 | PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT), |
| 554 | PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT), |
| 555 | PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT), |
| 556 | PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT), |
| 557 | PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT), |
| 558 | PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 559 | |
| 560 | /* PTD GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 561 | PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT), |
| 562 | PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT), |
| 563 | PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT), |
| 564 | PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT), |
| 565 | PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT), |
| 566 | PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT), |
| 567 | PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT), |
| 568 | PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 569 | |
| 570 | /* PTE GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 571 | PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT), |
| 572 | PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT), |
| 573 | PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT), |
| 574 | PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT), |
| 575 | PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT), |
| 576 | PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT), |
| 577 | PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT), |
| 578 | PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 579 | |
| 580 | /* PTF GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 581 | PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT), |
| 582 | PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT), |
| 583 | PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT), |
| 584 | PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT), |
| 585 | PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT), |
| 586 | PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT), |
| 587 | PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT), |
| 588 | PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 589 | |
| 590 | /* PTG GPIO */ |
| 591 | PINMUX_DATA(PTG5_DATA, PTG5_OUT), |
| 592 | PINMUX_DATA(PTG4_DATA, PTG4_OUT), |
| 593 | PINMUX_DATA(PTG3_DATA, PTG3_OUT), |
| 594 | PINMUX_DATA(PTG2_DATA, PTG2_OUT), |
| 595 | PINMUX_DATA(PTG1_DATA, PTG1_OUT), |
| 596 | PINMUX_DATA(PTG0_DATA, PTG0_OUT), |
| 597 | |
| 598 | /* PTH GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 599 | PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT), |
| 600 | PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT), |
| 601 | PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT), |
| 602 | PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT), |
| 603 | PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT), |
| 604 | PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT), |
| 605 | PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT), |
| 606 | PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 607 | |
| 608 | /* PTJ GPIO */ |
| 609 | PINMUX_DATA(PTJ7_DATA, PTJ7_OUT), |
| 610 | PINMUX_DATA(PTJ6_DATA, PTJ6_OUT), |
| 611 | PINMUX_DATA(PTJ5_DATA, PTJ5_OUT), |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 612 | PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT), |
| 613 | PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT), |
| 614 | PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT), |
| 615 | PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 616 | |
| 617 | /* PTK GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 618 | PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT), |
| 619 | PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT), |
| 620 | PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT), |
| 621 | PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT), |
| 622 | PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT), |
| 623 | PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT), |
| 624 | PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT), |
| 625 | PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 626 | |
| 627 | /* PTL GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 628 | PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT), |
| 629 | PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT), |
| 630 | PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT), |
| 631 | PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT), |
| 632 | PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT), |
| 633 | PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT), |
| 634 | PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT), |
| 635 | PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 636 | |
| 637 | /* PTM GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 638 | PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT), |
| 639 | PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT), |
| 640 | PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT), |
| 641 | PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT), |
| 642 | PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT), |
| 643 | PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT), |
| 644 | PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT), |
| 645 | PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 646 | |
| 647 | /* PTN GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 648 | PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT), |
| 649 | PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT), |
| 650 | PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT), |
| 651 | PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT), |
| 652 | PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT), |
| 653 | PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT), |
| 654 | PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT), |
| 655 | PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 656 | |
| 657 | /* PTQ GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 658 | PINMUX_DATA(PTQ7_DATA, PTQ7_IN, PTQ7_OUT), |
| 659 | PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT), |
| 660 | PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT), |
| 661 | PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT), |
| 662 | PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT), |
| 663 | PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT), |
| 664 | PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT), |
| 665 | PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 666 | |
| 667 | /* PTR GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 668 | PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT), |
| 669 | PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT), |
| 670 | PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT), |
| 671 | PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT), |
| 672 | PINMUX_DATA(PTR3_DATA, PTR3_IN), |
| 673 | PINMUX_DATA(PTR2_DATA, PTR2_IN), |
| 674 | PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT), |
| 675 | PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 676 | |
| 677 | /* PTS GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 678 | PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT), |
| 679 | PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT), |
| 680 | PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT), |
| 681 | PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT), |
| 682 | PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT), |
| 683 | PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT), |
| 684 | PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 685 | |
| 686 | /* PTT GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 687 | PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT), |
| 688 | PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT), |
| 689 | PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT), |
| 690 | PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT), |
| 691 | PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT), |
| 692 | PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT), |
| 693 | PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT), |
| 694 | PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 695 | |
| 696 | /* PTU GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 697 | PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT), |
| 698 | PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT), |
| 699 | PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT), |
| 700 | PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT), |
| 701 | PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT), |
| 702 | PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT), |
| 703 | PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT), |
| 704 | PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 705 | |
| 706 | /* PTV GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 707 | PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT), |
| 708 | PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT), |
| 709 | PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT), |
| 710 | PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT), |
| 711 | PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT), |
| 712 | PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT), |
| 713 | PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT), |
| 714 | PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 715 | |
| 716 | /* PTW GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 717 | PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT), |
| 718 | PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT), |
| 719 | PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT), |
| 720 | PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT), |
| 721 | PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT), |
| 722 | PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT), |
| 723 | PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT), |
| 724 | PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 725 | |
| 726 | /* PTX GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 727 | PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT), |
| 728 | PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT), |
| 729 | PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT), |
| 730 | PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT), |
| 731 | PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT), |
| 732 | PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT), |
| 733 | PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT), |
| 734 | PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 735 | |
| 736 | /* PTY GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 737 | PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT), |
| 738 | PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT), |
| 739 | PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT), |
| 740 | PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT), |
| 741 | PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT), |
| 742 | PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT), |
| 743 | PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT), |
| 744 | PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 745 | |
| 746 | /* PTZ GPIO */ |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 747 | PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT), |
| 748 | PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT), |
| 749 | PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT), |
| 750 | PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT), |
| 751 | PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT), |
| 752 | PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT), |
| 753 | PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT), |
| 754 | PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 755 | |
| 756 | /* PTA FN */ |
| 757 | PINMUX_DATA(D23_MARK, PSA15_0, PSA14_0, PTA7_FN), |
| 758 | PINMUX_DATA(D22_MARK, PSA15_0, PSA14_0, PTA6_FN), |
| 759 | PINMUX_DATA(D21_MARK, PSA15_0, PSA14_0, PTA5_FN), |
| 760 | PINMUX_DATA(D20_MARK, PSA15_0, PSA14_0, PTA4_FN), |
| 761 | PINMUX_DATA(D19_MARK, PSA15_0, PSA14_0, PTA3_FN), |
| 762 | PINMUX_DATA(D18_MARK, PSA15_0, PSA14_0, PTA2_FN), |
| 763 | PINMUX_DATA(D17_MARK, PSA15_0, PSA14_0, PTA1_FN), |
| 764 | PINMUX_DATA(D16_MARK, PSA15_0, PSA14_0, PTA0_FN), |
| 765 | |
| 766 | PINMUX_DATA(KEYOUT2_MARK, PSA15_0, PSA14_1, PTA7_FN), |
| 767 | PINMUX_DATA(KEYOUT1_MARK, PSA15_0, PSA14_1, PTA6_FN), |
| 768 | PINMUX_DATA(KEYOUT0_MARK, PSA15_0, PSA14_1, PTA5_FN), |
| 769 | PINMUX_DATA(KEYIN4_MARK, PSA15_0, PSA14_1, PTA4_FN), |
| 770 | PINMUX_DATA(KEYIN3_MARK, PSA15_0, PSA14_1, PTA3_FN), |
| 771 | PINMUX_DATA(KEYIN2_MARK, PSA15_0, PSA14_1, PTA2_FN), |
| 772 | PINMUX_DATA(KEYIN1_MARK, PSA15_0, PSA14_1, PTA1_FN), |
| 773 | PINMUX_DATA(KEYIN0_MARK, PSA15_0, PSA14_1, PTA0_FN), |
| 774 | |
| 775 | PINMUX_DATA(IDED15_MARK, PSA15_1, PSA14_0, PTA7_FN), |
| 776 | PINMUX_DATA(IDED14_MARK, PSA15_1, PSA14_0, PTA6_FN), |
| 777 | PINMUX_DATA(IDED13_MARK, PSA15_1, PSA14_0, PTA5_FN), |
| 778 | PINMUX_DATA(IDED12_MARK, PSA15_1, PSA14_0, PTA4_FN), |
| 779 | PINMUX_DATA(IDED11_MARK, PSA15_1, PSA14_0, PTA3_FN), |
| 780 | PINMUX_DATA(IDED10_MARK, PSA15_1, PSA14_0, PTA2_FN), |
| 781 | PINMUX_DATA(IDED9_MARK, PSA15_1, PSA14_0, PTA1_FN), |
| 782 | PINMUX_DATA(IDED8_MARK, PSA15_1, PSA14_0, PTA0_FN), |
| 783 | |
| 784 | /* PTB FN */ |
| 785 | PINMUX_DATA(D31_MARK, PSE15_0, PSE14_0, PTB7_FN), |
| 786 | PINMUX_DATA(D30_MARK, PSE15_0, PSE14_0, PTB6_FN), |
| 787 | PINMUX_DATA(D29_MARK, PSE11_0, PTB5_FN), |
| 788 | PINMUX_DATA(D28_MARK, PSE11_0, PTB4_FN), |
| 789 | PINMUX_DATA(D27_MARK, PSE11_0, PTB3_FN), |
| 790 | PINMUX_DATA(D26_MARK, PSA15_0, PSA14_0, PTB2_FN), |
| 791 | PINMUX_DATA(D25_MARK, PSA15_0, PSA14_0, PTB1_FN), |
| 792 | PINMUX_DATA(D24_MARK, PSA15_0, PSA14_0, PTB0_FN), |
| 793 | |
| 794 | PINMUX_DATA(IDEA1_MARK, PSE15_1, PSE14_0, PTB7_FN), |
| 795 | PINMUX_DATA(IDEA0_MARK, PSE15_1, PSE14_0, PTB6_FN), |
| 796 | PINMUX_DATA(IODREQ_MARK, PSE11_1, PTB5_FN), |
| 797 | PINMUX_DATA(IDECS0_MARK, PSE11_1, PTB4_FN), |
| 798 | PINMUX_DATA(IDECS1_MARK, PSE11_1, PTB3_FN), |
| 799 | PINMUX_DATA(IDEIORD_MARK, PSA15_1, PSA14_0, PTB2_FN), |
| 800 | PINMUX_DATA(IDEIOWR_MARK, PSA15_1, PSA14_0, PTB1_FN), |
| 801 | PINMUX_DATA(IDEINT_MARK, PSA15_1, PSA14_0, PTB0_FN), |
| 802 | |
| 803 | PINMUX_DATA(TPUTO1_MARK, PSE15_0, PSE14_1, PTB7_FN), |
| 804 | PINMUX_DATA(TPUTO0_MARK, PSE15_0, PSE14_1, PTB6_FN), |
| 805 | |
| 806 | PINMUX_DATA(KEYOUT5_IN5_MARK, PSA15_0, PSA14_1, PTB2_FN), |
| 807 | PINMUX_DATA(KEYOUT4_IN6_MARK, PSA15_0, PSA14_1, PTB1_FN), |
| 808 | PINMUX_DATA(KEYOUT3_MARK, PSA15_0, PSA14_1, PTB0_FN), |
| 809 | |
| 810 | /* PTC FN */ |
| 811 | PINMUX_DATA(LCDD7_MARK, PSD5_0, PTC7_FN), |
| 812 | PINMUX_DATA(LCDD6_MARK, PSD5_0, PTC6_FN), |
| 813 | PINMUX_DATA(LCDD5_MARK, PSD5_0, PTC5_FN), |
| 814 | PINMUX_DATA(LCDD4_MARK, PSD5_0, PTC4_FN), |
| 815 | PINMUX_DATA(LCDD3_MARK, PSD5_0, PTC3_FN), |
| 816 | PINMUX_DATA(LCDD2_MARK, PSD5_0, PTC2_FN), |
| 817 | PINMUX_DATA(LCDD1_MARK, PSD5_0, PTC1_FN), |
| 818 | PINMUX_DATA(LCDD0_MARK, PSD5_0, PTC0_FN), |
| 819 | |
| 820 | /* PTD FN */ |
| 821 | PINMUX_DATA(LCDD15_MARK, PSD5_0, PTD7_FN), |
| 822 | PINMUX_DATA(LCDD14_MARK, PSD5_0, PTD6_FN), |
| 823 | PINMUX_DATA(LCDD13_MARK, PSD5_0, PTD5_FN), |
| 824 | PINMUX_DATA(LCDD12_MARK, PSD5_0, PTD4_FN), |
| 825 | PINMUX_DATA(LCDD11_MARK, PSD5_0, PTD3_FN), |
| 826 | PINMUX_DATA(LCDD10_MARK, PSD5_0, PTD2_FN), |
| 827 | PINMUX_DATA(LCDD9_MARK, PSD5_0, PTD1_FN), |
| 828 | PINMUX_DATA(LCDD8_MARK, PSD5_0, PTD0_FN), |
| 829 | |
| 830 | /* PTE FN */ |
| 831 | PINMUX_DATA(FSIMCKB_MARK, PTE7_FN), |
| 832 | PINMUX_DATA(FSIMCKA_MARK, PTE6_FN), |
| 833 | |
| 834 | PINMUX_DATA(LCDD21_MARK, PSC5_0, PSC4_0, PTE5_FN), |
| 835 | PINMUX_DATA(LCDD20_MARK, PSD3_0, PSD2_0, PTE4_FN), |
| 836 | PINMUX_DATA(LCDD19_MARK, PSA3_0, PSA2_0, PTE3_FN), |
| 837 | PINMUX_DATA(LCDD18_MARK, PSA3_0, PSA2_0, PTE2_FN), |
| 838 | PINMUX_DATA(LCDD17_MARK, PSD5_0, PTE1_FN), |
| 839 | PINMUX_DATA(LCDD16_MARK, PSD5_0, PTE0_FN), |
| 840 | |
| 841 | PINMUX_DATA(SCIF2_L_TXD_MARK, PSC5_0, PSC4_1, PTE5_FN), |
| 842 | PINMUX_DATA(SCIF4_SCK_MARK, PSD3_0, PSD2_1, PTE4_FN), |
| 843 | PINMUX_DATA(SCIF4_RXD_MARK, PSA3_0, PSA2_1, PTE3_FN), |
| 844 | PINMUX_DATA(SCIF4_TXD_MARK, PSA3_0, PSA2_1, PTE2_FN), |
| 845 | |
| 846 | /* PTF FN */ |
| 847 | PINMUX_DATA(LCDVSYN_MARK, PSD8_0, PTF7_FN), |
| 848 | PINMUX_DATA(LCDDISP_MARK, PSD10_0, PSD9_0, PTF6_FN), |
| 849 | PINMUX_DATA(LCDHSYN_MARK, PSD10_0, PSD9_0, PTF5_FN), |
| 850 | PINMUX_DATA(LCDDON_MARK, PSD8_0, PTF4_FN), |
| 851 | PINMUX_DATA(LCDDCK_MARK, PSD10_0, PSD9_0, PTF3_FN), |
| 852 | PINMUX_DATA(LCDVEPWC_MARK, PSA6_0, PTF2_FN), |
| 853 | PINMUX_DATA(LCDD23_MARK, PSC7_0, PSC6_0, PTF1_FN), |
| 854 | PINMUX_DATA(LCDD22_MARK, PSC5_0, PSC4_0, PTF0_FN), |
| 855 | |
| 856 | PINMUX_DATA(LCDRS_MARK, PSD10_0, PSD9_1, PTF6_FN), |
| 857 | PINMUX_DATA(LCDCS_MARK, PSD10_0, PSD9_1, PTF5_FN), |
| 858 | PINMUX_DATA(LCDWR_MARK, PSD10_0, PSD9_1, PTF3_FN), |
| 859 | |
| 860 | PINMUX_DATA(SCIF0_TXD_MARK, PSA6_1, PTF2_FN), |
| 861 | PINMUX_DATA(SCIF2_L_SCK_MARK, PSC7_0, PSC6_1, PTF1_FN), |
| 862 | PINMUX_DATA(SCIF2_L_RXD_MARK, PSC5_0, PSC4_1, PTF0_FN), |
| 863 | |
| 864 | /* PTG FN */ |
| 865 | PINMUX_DATA(AUDCK_MARK, PTG5_FN), |
| 866 | PINMUX_DATA(AUDSYNC_MARK, PTG4_FN), |
| 867 | PINMUX_DATA(AUDATA3_MARK, PTG3_FN), |
| 868 | PINMUX_DATA(AUDATA2_MARK, PTG2_FN), |
| 869 | PINMUX_DATA(AUDATA1_MARK, PTG1_FN), |
| 870 | PINMUX_DATA(AUDATA0_MARK, PTG0_FN), |
| 871 | |
| 872 | /* PTH FN */ |
| 873 | PINMUX_DATA(VIO0_VD_MARK, PTH7_FN), |
| 874 | PINMUX_DATA(VIO0_CLK_MARK, PTH6_FN), |
| 875 | PINMUX_DATA(VIO0_D7_MARK, PTH5_FN), |
| 876 | PINMUX_DATA(VIO0_D6_MARK, PTH4_FN), |
| 877 | PINMUX_DATA(VIO0_D5_MARK, PTH3_FN), |
| 878 | PINMUX_DATA(VIO0_D4_MARK, PTH2_FN), |
| 879 | PINMUX_DATA(VIO0_D3_MARK, PTH1_FN), |
| 880 | PINMUX_DATA(VIO0_D2_MARK, PTH0_FN), |
| 881 | |
| 882 | /* PTJ FN */ |
| 883 | PINMUX_DATA(PDSTATUS_MARK, PTJ7_FN), |
| 884 | PINMUX_DATA(STATUS2_MARK, PTJ6_FN), |
| 885 | PINMUX_DATA(STATUS0_MARK, PTJ5_FN), |
| 886 | PINMUX_DATA(A25_MARK, PSA8_0, PTJ3_FN), |
| 887 | PINMUX_DATA(BS_MARK, PSA8_1, PTJ3_FN), |
| 888 | PINMUX_DATA(A24_MARK, PTJ2_FN), |
| 889 | PINMUX_DATA(A23_MARK, PTJ1_FN), |
| 890 | PINMUX_DATA(A22_MARK, PTJ0_FN), |
| 891 | |
| 892 | /* PTK FN */ |
| 893 | PINMUX_DATA(VIO1_D5_MARK, PSB7_0, PSB6_0, PTK7_FN), |
| 894 | PINMUX_DATA(VIO1_D4_MARK, PSB7_0, PSB6_0, PTK6_FN), |
| 895 | PINMUX_DATA(VIO1_D3_MARK, PSB7_0, PSB6_0, PTK5_FN), |
| 896 | PINMUX_DATA(VIO1_D2_MARK, PSB7_0, PSB6_0, PTK4_FN), |
| 897 | PINMUX_DATA(VIO1_D1_MARK, PSB7_0, PSB6_0, PTK3_FN), |
| 898 | PINMUX_DATA(VIO1_D0_MARK, PSB7_0, PSB6_0, PTK2_FN), |
| 899 | |
| 900 | PINMUX_DATA(VIO0_D13_MARK, PSB7_0, PSB6_1, PTK7_FN), |
| 901 | PINMUX_DATA(VIO0_D12_MARK, PSB7_0, PSB6_1, PTK6_FN), |
| 902 | PINMUX_DATA(VIO0_D11_MARK, PSB7_0, PSB6_1, PTK5_FN), |
| 903 | PINMUX_DATA(VIO0_D10_MARK, PSB7_0, PSB6_1, PTK4_FN), |
| 904 | PINMUX_DATA(VIO0_D9_MARK, PSB7_0, PSB6_1, PTK3_FN), |
| 905 | PINMUX_DATA(VIO0_D8_MARK, PSB7_0, PSB6_1, PTK2_FN), |
| 906 | |
| 907 | PINMUX_DATA(IDED5_MARK, PSB7_1, PSB6_0, PTK7_FN), |
| 908 | PINMUX_DATA(IDED4_MARK, PSB7_1, PSB6_0, PTK6_FN), |
| 909 | PINMUX_DATA(IDED3_MARK, PSB7_1, PSB6_0, PTK5_FN), |
| 910 | PINMUX_DATA(IDED2_MARK, PSB7_1, PSB6_0, PTK4_FN), |
| 911 | PINMUX_DATA(IDED1_MARK, PSB7_1, PSB6_0, PTK3_FN), |
| 912 | PINMUX_DATA(IDED0_MARK, PSB7_1, PSB6_0, PTK2_FN), |
| 913 | |
| 914 | PINMUX_DATA(VIO0_FLD_MARK, PTK1_FN), |
| 915 | PINMUX_DATA(VIO0_HD_MARK, PTK0_FN), |
| 916 | |
| 917 | /* PTL FN */ |
| 918 | PINMUX_DATA(DV_D5_MARK, PSB9_0, PSB8_0, PTL7_FN), |
| 919 | PINMUX_DATA(DV_D4_MARK, PSB9_0, PSB8_0, PTL6_FN), |
| 920 | PINMUX_DATA(DV_D3_MARK, PSE7_0, PSE6_0, PTL5_FN), |
| 921 | PINMUX_DATA(DV_D2_MARK, PSC9_0, PSC8_0, PTL4_FN), |
| 922 | PINMUX_DATA(DV_D1_MARK, PSC9_0, PSC8_0, PTL3_FN), |
| 923 | PINMUX_DATA(DV_D0_MARK, PSC9_0, PSC8_0, PTL2_FN), |
| 924 | PINMUX_DATA(DV_D15_MARK, PSD4_0, PTL1_FN), |
| 925 | PINMUX_DATA(DV_D14_MARK, PSE5_0, PSE4_0, PTL0_FN), |
| 926 | |
| 927 | PINMUX_DATA(SCIF3_V_SCK_MARK, PSB9_0, PSB8_1, PTL7_FN), |
| 928 | PINMUX_DATA(SCIF3_V_RXD_MARK, PSB9_0, PSB8_1, PTL6_FN), |
| 929 | PINMUX_DATA(SCIF3_V_TXD_MARK, PSE7_0, PSE6_1, PTL5_FN), |
| 930 | PINMUX_DATA(SCIF1_SCK_MARK, PSC9_0, PSC8_1, PTL4_FN), |
| 931 | PINMUX_DATA(SCIF1_RXD_MARK, PSC9_0, PSC8_1, PTL3_FN), |
| 932 | PINMUX_DATA(SCIF1_TXD_MARK, PSC9_0, PSC8_1, PTL2_FN), |
| 933 | |
| 934 | PINMUX_DATA(RMII_RXD0_MARK, PSB9_1, PSB8_0, PTL7_FN), |
| 935 | PINMUX_DATA(RMII_RXD1_MARK, PSB9_1, PSB8_0, PTL6_FN), |
| 936 | PINMUX_DATA(RMII_REF_CLK_MARK, PSE7_1, PSE6_0, PTL5_FN), |
| 937 | PINMUX_DATA(RMII_TX_EN_MARK, PSC9_1, PSC8_0, PTL4_FN), |
| 938 | PINMUX_DATA(RMII_TXD0_MARK, PSC9_1, PSC8_0, PTL3_FN), |
| 939 | PINMUX_DATA(RMII_TXD1_MARK, PSC9_1, PSC8_0, PTL2_FN), |
| 940 | |
| 941 | PINMUX_DATA(MSIOF0_MCK_MARK, PSE5_0, PSE4_1, PTL0_FN), |
| 942 | |
| 943 | /* PTM FN */ |
| 944 | PINMUX_DATA(DV_D13_MARK, PSC13_0, PSC12_0, PTM7_FN), |
| 945 | PINMUX_DATA(DV_D12_MARK, PSC13_0, PSC12_0, PTM6_FN), |
| 946 | PINMUX_DATA(DV_D11_MARK, PSC13_0, PSC12_0, PTM5_FN), |
| 947 | PINMUX_DATA(DV_D10_MARK, PSC13_0, PSC12_0, PTM4_FN), |
| 948 | PINMUX_DATA(DV_D9_MARK, PSC11_0, PSC10_0, PTM3_FN), |
| 949 | PINMUX_DATA(DV_D8_MARK, PSC11_0, PSC10_0, PTM2_FN), |
| 950 | |
| 951 | PINMUX_DATA(MSIOF0_TSCK_MARK, PSC13_0, PSC12_1, PTM7_FN), |
| 952 | PINMUX_DATA(MSIOF0_RXD_MARK, PSC13_0, PSC12_1, PTM6_FN), |
| 953 | PINMUX_DATA(MSIOF0_TXD_MARK, PSC13_0, PSC12_1, PTM5_FN), |
| 954 | PINMUX_DATA(MSIOF0_TSYNC_MARK, PSC13_0, PSC12_1, PTM4_FN), |
| 955 | PINMUX_DATA(MSIOF0_SS1_MARK, PSC11_0, PSC10_1, PTM3_FN), |
| 956 | PINMUX_DATA(MSIOF0_RSCK_MARK, PSC11_1, PSC10_0, PTM3_FN), |
| 957 | PINMUX_DATA(MSIOF0_SS2_MARK, PSC11_0, PSC10_1, PTM2_FN), |
| 958 | PINMUX_DATA(MSIOF0_RSYNC_MARK, PSC11_1, PSC10_0, PTM2_FN), |
| 959 | |
| 960 | PINMUX_DATA(LCDVCPWC_MARK, PSA6_0, PTM1_FN), |
| 961 | PINMUX_DATA(LCDRD_MARK, PSA7_0, PTM0_FN), |
| 962 | |
| 963 | PINMUX_DATA(SCIF0_RXD_MARK, PSA6_1, PTM1_FN), |
| 964 | PINMUX_DATA(SCIF0_SCK_MARK, PSA7_1, PTM0_FN), |
| 965 | |
| 966 | /* PTN FN */ |
| 967 | PINMUX_DATA(VIO0_D1_MARK, PTN7_FN), |
| 968 | PINMUX_DATA(VIO0_D0_MARK, PTN6_FN), |
| 969 | |
| 970 | PINMUX_DATA(DV_CLKI_MARK, PSD11_0, PTN5_FN), |
| 971 | PINMUX_DATA(DV_CLK_MARK, PSD13_0, PSD12_0, PTN4_FN), |
| 972 | PINMUX_DATA(DV_VSYNC_MARK, PSD15_0, PSD14_0, PTN3_FN), |
| 973 | PINMUX_DATA(DV_HSYNC_MARK, PSB5_0, PSB4_0, PTN2_FN), |
| 974 | PINMUX_DATA(DV_D7_MARK, PSB3_0, PSB2_0, PTN1_FN), |
| 975 | PINMUX_DATA(DV_D6_MARK, PSB1_0, PSB0_0, PTN0_FN), |
| 976 | |
| 977 | PINMUX_DATA(SCIF2_V_SCK_MARK, PSD13_0, PSD12_1, PTN4_FN), |
| 978 | PINMUX_DATA(SCIF2_V_RXD_MARK, PSD15_0, PSD14_1, PTN3_FN), |
| 979 | PINMUX_DATA(SCIF2_V_TXD_MARK, PSB5_0, PSB4_1, PTN2_FN), |
| 980 | PINMUX_DATA(SCIF3_V_CTS_MARK, PSB3_0, PSB2_1, PTN1_FN), |
| 981 | PINMUX_DATA(SCIF3_V_RTS_MARK, PSB1_0, PSB0_1, PTN0_FN), |
| 982 | |
| 983 | PINMUX_DATA(RMII_RX_ER_MARK, PSB3_1, PSB2_0, PTN1_FN), |
| 984 | PINMUX_DATA(RMII_CRS_DV_MARK, PSB1_1, PSB0_0, PTN0_FN), |
| 985 | |
| 986 | /* PTQ FN */ |
| 987 | PINMUX_DATA(D7_MARK, PTQ7_FN), |
| 988 | PINMUX_DATA(D6_MARK, PTQ6_FN), |
| 989 | PINMUX_DATA(D5_MARK, PTQ5_FN), |
| 990 | PINMUX_DATA(D4_MARK, PTQ4_FN), |
| 991 | PINMUX_DATA(D3_MARK, PTQ3_FN), |
| 992 | PINMUX_DATA(D2_MARK, PTQ2_FN), |
| 993 | PINMUX_DATA(D1_MARK, PTQ1_FN), |
| 994 | PINMUX_DATA(D0_MARK, PTQ0_FN), |
| 995 | |
| 996 | /* PTR FN */ |
| 997 | PINMUX_DATA(CS6B_CE1B_MARK, PTR7_FN), |
| 998 | PINMUX_DATA(CS6A_CE2B_MARK, PTR6_FN), |
| 999 | PINMUX_DATA(CS5B_CE1A_MARK, PTR5_FN), |
| 1000 | PINMUX_DATA(CS5A_CE2A_MARK, PTR4_FN), |
| 1001 | PINMUX_DATA(IOIS16_MARK, PSA5_0, PTR3_FN), |
| 1002 | PINMUX_DATA(WAIT_MARK, PTR2_FN), |
| 1003 | PINMUX_DATA(WE3_ICIOWR_MARK, PSA1_0, PSA0_0, PTR1_FN), |
| 1004 | PINMUX_DATA(WE2_ICIORD_MARK, PSD1_0, PSD0_0, PTR0_FN), |
| 1005 | |
| 1006 | PINMUX_DATA(LCDLCLK_MARK, PSA5_1, PTR3_FN), |
| 1007 | |
| 1008 | PINMUX_DATA(IDEA2_MARK, PSD1_1, PSD0_0, PTR0_FN), |
| 1009 | |
| 1010 | PINMUX_DATA(TPUTO3_MARK, PSA1_0, PSA0_1, PTR1_FN), |
| 1011 | PINMUX_DATA(TPUTI3_MARK, PSA1_1, PSA0_0, PTR1_FN), |
| 1012 | PINMUX_DATA(TPUTO2_MARK, PSD1_0, PSD0_1, PTR0_FN), |
| 1013 | |
| 1014 | /* PTS FN */ |
| 1015 | PINMUX_DATA(VIO_CKO_MARK, PTS6_FN), |
| 1016 | |
| 1017 | PINMUX_DATA(TPUTI2_MARK, PSE9_0, PSE8_1, PTS5_FN), |
| 1018 | |
| 1019 | PINMUX_DATA(IDEIORDY_MARK, PSE9_1, PSE8_0, PTS5_FN), |
| 1020 | |
| 1021 | PINMUX_DATA(VIO1_FLD_MARK, PSE9_0, PSE8_0, PTS5_FN), |
| 1022 | PINMUX_DATA(VIO1_HD_MARK, PSA10_0, PTS4_FN), |
| 1023 | PINMUX_DATA(VIO1_VD_MARK, PSA9_0, PTS3_FN), |
| 1024 | PINMUX_DATA(VIO1_CLK_MARK, PSA9_0, PTS2_FN), |
| 1025 | PINMUX_DATA(VIO1_D7_MARK, PSB7_0, PSB6_0, PTS1_FN), |
| 1026 | PINMUX_DATA(VIO1_D6_MARK, PSB7_0, PSB6_0, PTS0_FN), |
| 1027 | |
| 1028 | PINMUX_DATA(SCIF5_SCK_MARK, PSA10_1, PTS4_FN), |
| 1029 | PINMUX_DATA(SCIF5_RXD_MARK, PSA9_1, PTS3_FN), |
| 1030 | PINMUX_DATA(SCIF5_TXD_MARK, PSA9_1, PTS2_FN), |
| 1031 | |
| 1032 | PINMUX_DATA(VIO0_D15_MARK, PSB7_0, PSB6_1, PTS1_FN), |
| 1033 | PINMUX_DATA(VIO0_D14_MARK, PSB7_0, PSB6_1, PTS0_FN), |
| 1034 | |
| 1035 | PINMUX_DATA(IDED7_MARK, PSB7_1, PSB6_0, PTS1_FN), |
| 1036 | PINMUX_DATA(IDED6_MARK, PSB7_1, PSB6_0, PTS0_FN), |
| 1037 | |
| 1038 | /* PTT FN */ |
| 1039 | PINMUX_DATA(D15_MARK, PTT7_FN), |
| 1040 | PINMUX_DATA(D14_MARK, PTT6_FN), |
| 1041 | PINMUX_DATA(D13_MARK, PTT5_FN), |
| 1042 | PINMUX_DATA(D12_MARK, PTT4_FN), |
| 1043 | PINMUX_DATA(D11_MARK, PTT3_FN), |
| 1044 | PINMUX_DATA(D10_MARK, PTT2_FN), |
| 1045 | PINMUX_DATA(D9_MARK, PTT1_FN), |
| 1046 | PINMUX_DATA(D8_MARK, PTT0_FN), |
| 1047 | |
| 1048 | /* PTU FN */ |
| 1049 | PINMUX_DATA(DMAC_DACK0_MARK, PTU7_FN), |
| 1050 | PINMUX_DATA(DMAC_DREQ0_MARK, PTU6_FN), |
| 1051 | |
| 1052 | PINMUX_DATA(FSIOASD_MARK, PSE1_0, PTU5_FN), |
| 1053 | PINMUX_DATA(FSIIABCK_MARK, PSE1_0, PTU4_FN), |
| 1054 | PINMUX_DATA(FSIIALRCK_MARK, PSE1_0, PTU3_FN), |
| 1055 | PINMUX_DATA(FSIOABCK_MARK, PSE1_0, PTU2_FN), |
| 1056 | PINMUX_DATA(FSIOALRCK_MARK, PSE1_0, PTU1_FN), |
| 1057 | PINMUX_DATA(CLKAUDIOAO_MARK, PSE0_0, PTU0_FN), |
| 1058 | |
| 1059 | /* PTV FN */ |
| 1060 | PINMUX_DATA(FSIIBSD_MARK, PSD7_0, PSD6_0, PTV7_FN), |
| 1061 | PINMUX_DATA(FSIOBSD_MARK, PSD7_0, PSD6_0, PTV6_FN), |
| 1062 | PINMUX_DATA(FSIIBBCK_MARK, PSC15_0, PSC14_0, PTV5_FN), |
| 1063 | PINMUX_DATA(FSIIBLRCK_MARK, PSC15_0, PSC14_0, PTV4_FN), |
| 1064 | PINMUX_DATA(FSIOBBCK_MARK, PSC15_0, PSC14_0, PTV3_FN), |
| 1065 | PINMUX_DATA(FSIOBLRCK_MARK, PSC15_0, PSC14_0, PTV2_FN), |
| 1066 | PINMUX_DATA(CLKAUDIOBO_MARK, PSE3_0, PSE2_0, PTV1_FN), |
| 1067 | PINMUX_DATA(FSIIASD_MARK, PSE10_0, PTV0_FN), |
| 1068 | |
| 1069 | PINMUX_DATA(MSIOF1_SS2_MARK, PSD7_0, PSD6_1, PTV7_FN), |
| 1070 | PINMUX_DATA(MSIOF1_RSYNC_MARK, PSD7_1, PSD6_0, PTV7_FN), |
| 1071 | PINMUX_DATA(MSIOF1_SS1_MARK, PSD7_0, PSD6_1, PTV6_FN), |
| 1072 | PINMUX_DATA(MSIOF1_RSCK_MARK, PSD7_1, PSD6_0, PTV6_FN), |
| 1073 | PINMUX_DATA(MSIOF1_RXD_MARK, PSC15_0, PSC14_1, PTV5_FN), |
| 1074 | PINMUX_DATA(MSIOF1_TSYNC_MARK, PSC15_0, PSC14_1, PTV4_FN), |
| 1075 | PINMUX_DATA(MSIOF1_TSCK_MARK, PSC15_0, PSC14_1, PTV3_FN), |
| 1076 | PINMUX_DATA(MSIOF1_TXD_MARK, PSC15_0, PSC14_1, PTV2_FN), |
| 1077 | PINMUX_DATA(MSIOF1_MCK_MARK, PSE3_0, PSE2_1, PTV1_FN), |
| 1078 | |
| 1079 | /* PTW FN */ |
| 1080 | PINMUX_DATA(MMC_D7_MARK, PSE13_0, PSE12_0, PTW7_FN), |
| 1081 | PINMUX_DATA(MMC_D6_MARK, PSE13_0, PSE12_0, PTW6_FN), |
| 1082 | PINMUX_DATA(MMC_D5_MARK, PSE13_0, PSE12_0, PTW5_FN), |
| 1083 | PINMUX_DATA(MMC_D4_MARK, PSE13_0, PSE12_0, PTW4_FN), |
| 1084 | PINMUX_DATA(MMC_D3_MARK, PSA13_0, PTW3_FN), |
| 1085 | PINMUX_DATA(MMC_D2_MARK, PSA13_0, PTW2_FN), |
| 1086 | PINMUX_DATA(MMC_D1_MARK, PSA13_0, PTW1_FN), |
| 1087 | PINMUX_DATA(MMC_D0_MARK, PSA13_0, PTW0_FN), |
| 1088 | |
| 1089 | PINMUX_DATA(SDHI1CD_MARK, PSE13_0, PSE12_1, PTW7_FN), |
| 1090 | PINMUX_DATA(SDHI1WP_MARK, PSE13_0, PSE12_1, PTW6_FN), |
| 1091 | PINMUX_DATA(SDHI1D3_MARK, PSE13_0, PSE12_1, PTW5_FN), |
| 1092 | PINMUX_DATA(SDHI1D2_MARK, PSE13_0, PSE12_1, PTW4_FN), |
| 1093 | PINMUX_DATA(SDHI1D1_MARK, PSA13_1, PTW3_FN), |
| 1094 | PINMUX_DATA(SDHI1D0_MARK, PSA13_1, PTW2_FN), |
| 1095 | PINMUX_DATA(SDHI1CMD_MARK, PSA13_1, PTW1_FN), |
| 1096 | PINMUX_DATA(SDHI1CLK_MARK, PSA13_1, PTW0_FN), |
| 1097 | |
| 1098 | PINMUX_DATA(IODACK_MARK, PSE13_1, PSE12_0, PTW7_FN), |
| 1099 | PINMUX_DATA(IDERST_MARK, PSE13_1, PSE12_0, PTW6_FN), |
| 1100 | PINMUX_DATA(EXBUF_ENB_MARK, PSE13_1, PSE12_0, PTW5_FN), |
| 1101 | PINMUX_DATA(DIRECTION_MARK, PSE13_1, PSE12_0, PTW4_FN), |
| 1102 | |
| 1103 | /* PTX FN */ |
| 1104 | PINMUX_DATA(DMAC_DACK1_MARK, PSA12_0, PTX7_FN), |
| 1105 | PINMUX_DATA(DMAC_DREQ1_MARK, PSA12_0, PTX6_FN), |
| 1106 | |
| 1107 | PINMUX_DATA(IRDA_OUT_MARK, PSA12_1, PTX7_FN), |
| 1108 | PINMUX_DATA(IRDA_IN_MARK, PSA12_1, PTX6_FN), |
| 1109 | |
| 1110 | PINMUX_DATA(TSIF_TS0_SDAT_MARK, PSC0_0, PTX5_FN), |
| 1111 | PINMUX_DATA(TSIF_TS0_SCK_MARK, PSC1_0, PTX4_FN), |
| 1112 | PINMUX_DATA(TSIF_TS0_SDEN_MARK, PSC2_0, PTX3_FN), |
| 1113 | PINMUX_DATA(TSIF_TS0_SPSYNC_MARK, PTX2_FN), |
| 1114 | |
| 1115 | PINMUX_DATA(LNKSTA_MARK, PSC0_1, PTX5_FN), |
| 1116 | PINMUX_DATA(MDIO_MARK, PSC1_1, PTX4_FN), |
| 1117 | PINMUX_DATA(MDC_MARK, PSC2_1, PTX3_FN), |
| 1118 | |
| 1119 | PINMUX_DATA(MMC_CLK_MARK, PTX1_FN), |
| 1120 | PINMUX_DATA(MMC_CMD_MARK, PTX0_FN), |
| 1121 | |
| 1122 | /* PTY FN */ |
| 1123 | PINMUX_DATA(SDHI0CD_MARK, PTY7_FN), |
| 1124 | PINMUX_DATA(SDHI0WP_MARK, PTY6_FN), |
| 1125 | PINMUX_DATA(SDHI0D3_MARK, PTY5_FN), |
| 1126 | PINMUX_DATA(SDHI0D2_MARK, PTY4_FN), |
| 1127 | PINMUX_DATA(SDHI0D1_MARK, PTY3_FN), |
| 1128 | PINMUX_DATA(SDHI0D0_MARK, PTY2_FN), |
| 1129 | PINMUX_DATA(SDHI0CMD_MARK, PTY1_FN), |
| 1130 | PINMUX_DATA(SDHI0CLK_MARK, PTY0_FN), |
| 1131 | |
| 1132 | /* PTZ FN */ |
| 1133 | PINMUX_DATA(INTC_IRQ7_MARK, PSB10_0, PTZ7_FN), |
| 1134 | PINMUX_DATA(INTC_IRQ6_MARK, PSB11_0, PTZ6_FN), |
| 1135 | PINMUX_DATA(INTC_IRQ5_MARK, PSB12_0, PTZ5_FN), |
| 1136 | PINMUX_DATA(INTC_IRQ4_MARK, PSB13_0, PTZ4_FN), |
| 1137 | PINMUX_DATA(INTC_IRQ3_MARK, PSB14_0, PTZ3_FN), |
| 1138 | PINMUX_DATA(INTC_IRQ2_MARK, PTZ2_FN), |
| 1139 | PINMUX_DATA(INTC_IRQ1_MARK, PTZ1_FN), |
| 1140 | PINMUX_DATA(INTC_IRQ0_MARK, PTZ0_FN), |
| 1141 | |
| 1142 | PINMUX_DATA(SCIF3_I_CTS_MARK, PSB10_1, PTZ7_FN), |
| 1143 | PINMUX_DATA(SCIF3_I_RTS_MARK, PSB11_1, PTZ6_FN), |
| 1144 | PINMUX_DATA(SCIF3_I_SCK_MARK, PSB12_1, PTZ5_FN), |
| 1145 | PINMUX_DATA(SCIF3_I_RXD_MARK, PSB13_1, PTZ4_FN), |
| 1146 | PINMUX_DATA(SCIF3_I_TXD_MARK, PSB14_1, PTZ3_FN), |
| 1147 | }; |
| 1148 | |
Laurent Pinchart | f41a1ef | 2013-12-16 20:25:16 +0100 | [diff] [blame] | 1149 | static const struct sh_pfc_pin pinmux_pins[] = { |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1150 | /* PTA */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1151 | PINMUX_GPIO(PTA7), |
| 1152 | PINMUX_GPIO(PTA6), |
| 1153 | PINMUX_GPIO(PTA5), |
| 1154 | PINMUX_GPIO(PTA4), |
| 1155 | PINMUX_GPIO(PTA3), |
| 1156 | PINMUX_GPIO(PTA2), |
| 1157 | PINMUX_GPIO(PTA1), |
| 1158 | PINMUX_GPIO(PTA0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1159 | |
| 1160 | /* PTB */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1161 | PINMUX_GPIO(PTB7), |
| 1162 | PINMUX_GPIO(PTB6), |
| 1163 | PINMUX_GPIO(PTB5), |
| 1164 | PINMUX_GPIO(PTB4), |
| 1165 | PINMUX_GPIO(PTB3), |
| 1166 | PINMUX_GPIO(PTB2), |
| 1167 | PINMUX_GPIO(PTB1), |
| 1168 | PINMUX_GPIO(PTB0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1169 | |
| 1170 | /* PTC */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1171 | PINMUX_GPIO(PTC7), |
| 1172 | PINMUX_GPIO(PTC6), |
| 1173 | PINMUX_GPIO(PTC5), |
| 1174 | PINMUX_GPIO(PTC4), |
| 1175 | PINMUX_GPIO(PTC3), |
| 1176 | PINMUX_GPIO(PTC2), |
| 1177 | PINMUX_GPIO(PTC1), |
| 1178 | PINMUX_GPIO(PTC0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1179 | |
| 1180 | /* PTD */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1181 | PINMUX_GPIO(PTD7), |
| 1182 | PINMUX_GPIO(PTD6), |
| 1183 | PINMUX_GPIO(PTD5), |
| 1184 | PINMUX_GPIO(PTD4), |
| 1185 | PINMUX_GPIO(PTD3), |
| 1186 | PINMUX_GPIO(PTD2), |
| 1187 | PINMUX_GPIO(PTD1), |
| 1188 | PINMUX_GPIO(PTD0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1189 | |
| 1190 | /* PTE */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1191 | PINMUX_GPIO(PTE7), |
| 1192 | PINMUX_GPIO(PTE6), |
| 1193 | PINMUX_GPIO(PTE5), |
| 1194 | PINMUX_GPIO(PTE4), |
| 1195 | PINMUX_GPIO(PTE3), |
| 1196 | PINMUX_GPIO(PTE2), |
| 1197 | PINMUX_GPIO(PTE1), |
| 1198 | PINMUX_GPIO(PTE0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1199 | |
| 1200 | /* PTF */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1201 | PINMUX_GPIO(PTF7), |
| 1202 | PINMUX_GPIO(PTF6), |
| 1203 | PINMUX_GPIO(PTF5), |
| 1204 | PINMUX_GPIO(PTF4), |
| 1205 | PINMUX_GPIO(PTF3), |
| 1206 | PINMUX_GPIO(PTF2), |
| 1207 | PINMUX_GPIO(PTF1), |
| 1208 | PINMUX_GPIO(PTF0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1209 | |
| 1210 | /* PTG */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1211 | PINMUX_GPIO(PTG5), |
| 1212 | PINMUX_GPIO(PTG4), |
| 1213 | PINMUX_GPIO(PTG3), |
| 1214 | PINMUX_GPIO(PTG2), |
| 1215 | PINMUX_GPIO(PTG1), |
| 1216 | PINMUX_GPIO(PTG0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1217 | |
| 1218 | /* PTH */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1219 | PINMUX_GPIO(PTH7), |
| 1220 | PINMUX_GPIO(PTH6), |
| 1221 | PINMUX_GPIO(PTH5), |
| 1222 | PINMUX_GPIO(PTH4), |
| 1223 | PINMUX_GPIO(PTH3), |
| 1224 | PINMUX_GPIO(PTH2), |
| 1225 | PINMUX_GPIO(PTH1), |
| 1226 | PINMUX_GPIO(PTH0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1227 | |
| 1228 | /* PTJ */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1229 | PINMUX_GPIO(PTJ7), |
| 1230 | PINMUX_GPIO(PTJ6), |
| 1231 | PINMUX_GPIO(PTJ5), |
| 1232 | PINMUX_GPIO(PTJ3), |
| 1233 | PINMUX_GPIO(PTJ2), |
| 1234 | PINMUX_GPIO(PTJ1), |
| 1235 | PINMUX_GPIO(PTJ0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1236 | |
| 1237 | /* PTK */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1238 | PINMUX_GPIO(PTK7), |
| 1239 | PINMUX_GPIO(PTK6), |
| 1240 | PINMUX_GPIO(PTK5), |
| 1241 | PINMUX_GPIO(PTK4), |
| 1242 | PINMUX_GPIO(PTK3), |
| 1243 | PINMUX_GPIO(PTK2), |
| 1244 | PINMUX_GPIO(PTK1), |
| 1245 | PINMUX_GPIO(PTK0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1246 | |
| 1247 | /* PTL */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1248 | PINMUX_GPIO(PTL7), |
| 1249 | PINMUX_GPIO(PTL6), |
| 1250 | PINMUX_GPIO(PTL5), |
| 1251 | PINMUX_GPIO(PTL4), |
| 1252 | PINMUX_GPIO(PTL3), |
| 1253 | PINMUX_GPIO(PTL2), |
| 1254 | PINMUX_GPIO(PTL1), |
| 1255 | PINMUX_GPIO(PTL0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1256 | |
| 1257 | /* PTM */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1258 | PINMUX_GPIO(PTM7), |
| 1259 | PINMUX_GPIO(PTM6), |
| 1260 | PINMUX_GPIO(PTM5), |
| 1261 | PINMUX_GPIO(PTM4), |
| 1262 | PINMUX_GPIO(PTM3), |
| 1263 | PINMUX_GPIO(PTM2), |
| 1264 | PINMUX_GPIO(PTM1), |
| 1265 | PINMUX_GPIO(PTM0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1266 | |
| 1267 | /* PTN */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1268 | PINMUX_GPIO(PTN7), |
| 1269 | PINMUX_GPIO(PTN6), |
| 1270 | PINMUX_GPIO(PTN5), |
| 1271 | PINMUX_GPIO(PTN4), |
| 1272 | PINMUX_GPIO(PTN3), |
| 1273 | PINMUX_GPIO(PTN2), |
| 1274 | PINMUX_GPIO(PTN1), |
| 1275 | PINMUX_GPIO(PTN0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1276 | |
| 1277 | /* PTQ */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1278 | PINMUX_GPIO(PTQ7), |
| 1279 | PINMUX_GPIO(PTQ6), |
| 1280 | PINMUX_GPIO(PTQ5), |
| 1281 | PINMUX_GPIO(PTQ4), |
| 1282 | PINMUX_GPIO(PTQ3), |
| 1283 | PINMUX_GPIO(PTQ2), |
| 1284 | PINMUX_GPIO(PTQ1), |
| 1285 | PINMUX_GPIO(PTQ0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1286 | |
| 1287 | /* PTR */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1288 | PINMUX_GPIO(PTR7), |
| 1289 | PINMUX_GPIO(PTR6), |
| 1290 | PINMUX_GPIO(PTR5), |
| 1291 | PINMUX_GPIO(PTR4), |
| 1292 | PINMUX_GPIO(PTR3), |
| 1293 | PINMUX_GPIO(PTR2), |
| 1294 | PINMUX_GPIO(PTR1), |
| 1295 | PINMUX_GPIO(PTR0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1296 | |
| 1297 | /* PTS */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1298 | PINMUX_GPIO(PTS6), |
| 1299 | PINMUX_GPIO(PTS5), |
| 1300 | PINMUX_GPIO(PTS4), |
| 1301 | PINMUX_GPIO(PTS3), |
| 1302 | PINMUX_GPIO(PTS2), |
| 1303 | PINMUX_GPIO(PTS1), |
| 1304 | PINMUX_GPIO(PTS0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1305 | |
| 1306 | /* PTT */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1307 | PINMUX_GPIO(PTT7), |
| 1308 | PINMUX_GPIO(PTT6), |
| 1309 | PINMUX_GPIO(PTT5), |
| 1310 | PINMUX_GPIO(PTT4), |
| 1311 | PINMUX_GPIO(PTT3), |
| 1312 | PINMUX_GPIO(PTT2), |
| 1313 | PINMUX_GPIO(PTT1), |
| 1314 | PINMUX_GPIO(PTT0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1315 | |
| 1316 | /* PTU */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1317 | PINMUX_GPIO(PTU7), |
| 1318 | PINMUX_GPIO(PTU6), |
| 1319 | PINMUX_GPIO(PTU5), |
| 1320 | PINMUX_GPIO(PTU4), |
| 1321 | PINMUX_GPIO(PTU3), |
| 1322 | PINMUX_GPIO(PTU2), |
| 1323 | PINMUX_GPIO(PTU1), |
| 1324 | PINMUX_GPIO(PTU0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1325 | |
| 1326 | /* PTV */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1327 | PINMUX_GPIO(PTV7), |
| 1328 | PINMUX_GPIO(PTV6), |
| 1329 | PINMUX_GPIO(PTV5), |
| 1330 | PINMUX_GPIO(PTV4), |
| 1331 | PINMUX_GPIO(PTV3), |
| 1332 | PINMUX_GPIO(PTV2), |
| 1333 | PINMUX_GPIO(PTV1), |
| 1334 | PINMUX_GPIO(PTV0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1335 | |
| 1336 | /* PTW */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1337 | PINMUX_GPIO(PTW7), |
| 1338 | PINMUX_GPIO(PTW6), |
| 1339 | PINMUX_GPIO(PTW5), |
| 1340 | PINMUX_GPIO(PTW4), |
| 1341 | PINMUX_GPIO(PTW3), |
| 1342 | PINMUX_GPIO(PTW2), |
| 1343 | PINMUX_GPIO(PTW1), |
| 1344 | PINMUX_GPIO(PTW0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1345 | |
| 1346 | /* PTX */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1347 | PINMUX_GPIO(PTX7), |
| 1348 | PINMUX_GPIO(PTX6), |
| 1349 | PINMUX_GPIO(PTX5), |
| 1350 | PINMUX_GPIO(PTX4), |
| 1351 | PINMUX_GPIO(PTX3), |
| 1352 | PINMUX_GPIO(PTX2), |
| 1353 | PINMUX_GPIO(PTX1), |
| 1354 | PINMUX_GPIO(PTX0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1355 | |
| 1356 | /* PTY */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1357 | PINMUX_GPIO(PTY7), |
| 1358 | PINMUX_GPIO(PTY6), |
| 1359 | PINMUX_GPIO(PTY5), |
| 1360 | PINMUX_GPIO(PTY4), |
| 1361 | PINMUX_GPIO(PTY3), |
| 1362 | PINMUX_GPIO(PTY2), |
| 1363 | PINMUX_GPIO(PTY1), |
| 1364 | PINMUX_GPIO(PTY0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1365 | |
| 1366 | /* PTZ */ |
Laurent Pinchart | 7cbb0e5 | 2013-07-15 21:16:25 +0200 | [diff] [blame] | 1367 | PINMUX_GPIO(PTZ7), |
| 1368 | PINMUX_GPIO(PTZ6), |
| 1369 | PINMUX_GPIO(PTZ5), |
| 1370 | PINMUX_GPIO(PTZ4), |
| 1371 | PINMUX_GPIO(PTZ3), |
| 1372 | PINMUX_GPIO(PTZ2), |
| 1373 | PINMUX_GPIO(PTZ1), |
| 1374 | PINMUX_GPIO(PTZ0), |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 1375 | }; |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1376 | |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 1377 | #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) |
| 1378 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 1379 | static const struct pinmux_func pinmux_func_gpios[] = { |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1380 | /* BSC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1381 | GPIO_FN(D31), |
| 1382 | GPIO_FN(D30), |
| 1383 | GPIO_FN(D29), |
| 1384 | GPIO_FN(D28), |
| 1385 | GPIO_FN(D27), |
| 1386 | GPIO_FN(D26), |
| 1387 | GPIO_FN(D25), |
| 1388 | GPIO_FN(D24), |
| 1389 | GPIO_FN(D23), |
| 1390 | GPIO_FN(D22), |
| 1391 | GPIO_FN(D21), |
| 1392 | GPIO_FN(D20), |
| 1393 | GPIO_FN(D19), |
| 1394 | GPIO_FN(D18), |
| 1395 | GPIO_FN(D17), |
| 1396 | GPIO_FN(D16), |
| 1397 | GPIO_FN(D15), |
| 1398 | GPIO_FN(D14), |
| 1399 | GPIO_FN(D13), |
| 1400 | GPIO_FN(D12), |
| 1401 | GPIO_FN(D11), |
| 1402 | GPIO_FN(D10), |
| 1403 | GPIO_FN(D9), |
| 1404 | GPIO_FN(D8), |
| 1405 | GPIO_FN(D7), |
| 1406 | GPIO_FN(D6), |
| 1407 | GPIO_FN(D5), |
| 1408 | GPIO_FN(D4), |
| 1409 | GPIO_FN(D3), |
| 1410 | GPIO_FN(D2), |
| 1411 | GPIO_FN(D1), |
| 1412 | GPIO_FN(D0), |
| 1413 | GPIO_FN(A25), |
| 1414 | GPIO_FN(A24), |
| 1415 | GPIO_FN(A23), |
| 1416 | GPIO_FN(A22), |
| 1417 | GPIO_FN(CS6B_CE1B), |
| 1418 | GPIO_FN(CS6A_CE2B), |
| 1419 | GPIO_FN(CS5B_CE1A), |
| 1420 | GPIO_FN(CS5A_CE2A), |
| 1421 | GPIO_FN(WE3_ICIOWR), |
| 1422 | GPIO_FN(WE2_ICIORD), |
| 1423 | GPIO_FN(IOIS16), |
| 1424 | GPIO_FN(WAIT), |
| 1425 | GPIO_FN(BS), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1426 | |
| 1427 | /* KEYSC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1428 | GPIO_FN(KEYOUT5_IN5), |
| 1429 | GPIO_FN(KEYOUT4_IN6), |
| 1430 | GPIO_FN(KEYIN4), |
| 1431 | GPIO_FN(KEYIN3), |
| 1432 | GPIO_FN(KEYIN2), |
| 1433 | GPIO_FN(KEYIN1), |
| 1434 | GPIO_FN(KEYIN0), |
| 1435 | GPIO_FN(KEYOUT3), |
| 1436 | GPIO_FN(KEYOUT2), |
| 1437 | GPIO_FN(KEYOUT1), |
| 1438 | GPIO_FN(KEYOUT0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1439 | |
| 1440 | /* ATAPI */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1441 | GPIO_FN(IDED15), |
| 1442 | GPIO_FN(IDED14), |
| 1443 | GPIO_FN(IDED13), |
| 1444 | GPIO_FN(IDED12), |
| 1445 | GPIO_FN(IDED11), |
| 1446 | GPIO_FN(IDED10), |
| 1447 | GPIO_FN(IDED9), |
| 1448 | GPIO_FN(IDED8), |
| 1449 | GPIO_FN(IDED7), |
| 1450 | GPIO_FN(IDED6), |
| 1451 | GPIO_FN(IDED5), |
| 1452 | GPIO_FN(IDED4), |
| 1453 | GPIO_FN(IDED3), |
| 1454 | GPIO_FN(IDED2), |
| 1455 | GPIO_FN(IDED1), |
| 1456 | GPIO_FN(IDED0), |
| 1457 | GPIO_FN(IDEA2), |
| 1458 | GPIO_FN(IDEA1), |
| 1459 | GPIO_FN(IDEA0), |
| 1460 | GPIO_FN(IDEIOWR), |
| 1461 | GPIO_FN(IODREQ), |
| 1462 | GPIO_FN(IDECS0), |
| 1463 | GPIO_FN(IDECS1), |
| 1464 | GPIO_FN(IDEIORD), |
| 1465 | GPIO_FN(DIRECTION), |
| 1466 | GPIO_FN(EXBUF_ENB), |
| 1467 | GPIO_FN(IDERST), |
| 1468 | GPIO_FN(IODACK), |
| 1469 | GPIO_FN(IDEINT), |
| 1470 | GPIO_FN(IDEIORDY), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1471 | |
| 1472 | /* TPU */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1473 | GPIO_FN(TPUTO3), |
| 1474 | GPIO_FN(TPUTO2), |
| 1475 | GPIO_FN(TPUTO1), |
| 1476 | GPIO_FN(TPUTO0), |
| 1477 | GPIO_FN(TPUTI3), |
| 1478 | GPIO_FN(TPUTI2), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1479 | |
| 1480 | /* LCDC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1481 | GPIO_FN(LCDD23), |
| 1482 | GPIO_FN(LCDD22), |
| 1483 | GPIO_FN(LCDD21), |
| 1484 | GPIO_FN(LCDD20), |
| 1485 | GPIO_FN(LCDD19), |
| 1486 | GPIO_FN(LCDD18), |
| 1487 | GPIO_FN(LCDD17), |
| 1488 | GPIO_FN(LCDD16), |
| 1489 | GPIO_FN(LCDD15), |
| 1490 | GPIO_FN(LCDD14), |
| 1491 | GPIO_FN(LCDD13), |
| 1492 | GPIO_FN(LCDD12), |
| 1493 | GPIO_FN(LCDD11), |
| 1494 | GPIO_FN(LCDD10), |
| 1495 | GPIO_FN(LCDD9), |
| 1496 | GPIO_FN(LCDD8), |
| 1497 | GPIO_FN(LCDD7), |
| 1498 | GPIO_FN(LCDD6), |
| 1499 | GPIO_FN(LCDD5), |
| 1500 | GPIO_FN(LCDD4), |
| 1501 | GPIO_FN(LCDD3), |
| 1502 | GPIO_FN(LCDD2), |
| 1503 | GPIO_FN(LCDD1), |
| 1504 | GPIO_FN(LCDD0), |
| 1505 | GPIO_FN(LCDVSYN), |
| 1506 | GPIO_FN(LCDDISP), |
| 1507 | GPIO_FN(LCDRS), |
| 1508 | GPIO_FN(LCDHSYN), |
| 1509 | GPIO_FN(LCDCS), |
| 1510 | GPIO_FN(LCDDON), |
| 1511 | GPIO_FN(LCDDCK), |
| 1512 | GPIO_FN(LCDWR), |
| 1513 | GPIO_FN(LCDVEPWC), |
| 1514 | GPIO_FN(LCDVCPWC), |
| 1515 | GPIO_FN(LCDRD), |
| 1516 | GPIO_FN(LCDLCLK), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1517 | |
| 1518 | /* SCIF0 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1519 | GPIO_FN(SCIF0_TXD), |
| 1520 | GPIO_FN(SCIF0_RXD), |
| 1521 | GPIO_FN(SCIF0_SCK), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1522 | |
| 1523 | /* SCIF1 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1524 | GPIO_FN(SCIF1_SCK), |
| 1525 | GPIO_FN(SCIF1_RXD), |
| 1526 | GPIO_FN(SCIF1_TXD), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1527 | |
| 1528 | /* SCIF2 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1529 | GPIO_FN(SCIF2_L_TXD), |
| 1530 | GPIO_FN(SCIF2_L_SCK), |
| 1531 | GPIO_FN(SCIF2_L_RXD), |
| 1532 | GPIO_FN(SCIF2_V_TXD), |
| 1533 | GPIO_FN(SCIF2_V_SCK), |
| 1534 | GPIO_FN(SCIF2_V_RXD), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1535 | |
| 1536 | /* SCIF3 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1537 | GPIO_FN(SCIF3_V_SCK), |
| 1538 | GPIO_FN(SCIF3_V_RXD), |
| 1539 | GPIO_FN(SCIF3_V_TXD), |
| 1540 | GPIO_FN(SCIF3_V_CTS), |
| 1541 | GPIO_FN(SCIF3_V_RTS), |
| 1542 | GPIO_FN(SCIF3_I_SCK), |
| 1543 | GPIO_FN(SCIF3_I_RXD), |
| 1544 | GPIO_FN(SCIF3_I_TXD), |
| 1545 | GPIO_FN(SCIF3_I_CTS), |
| 1546 | GPIO_FN(SCIF3_I_RTS), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1547 | |
| 1548 | /* SCIF4 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1549 | GPIO_FN(SCIF4_SCK), |
| 1550 | GPIO_FN(SCIF4_RXD), |
| 1551 | GPIO_FN(SCIF4_TXD), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1552 | |
| 1553 | /* SCIF5 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1554 | GPIO_FN(SCIF5_SCK), |
| 1555 | GPIO_FN(SCIF5_RXD), |
| 1556 | GPIO_FN(SCIF5_TXD), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1557 | |
| 1558 | /* FSI */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1559 | GPIO_FN(FSIMCKB), |
| 1560 | GPIO_FN(FSIMCKA), |
| 1561 | GPIO_FN(FSIOASD), |
| 1562 | GPIO_FN(FSIIABCK), |
| 1563 | GPIO_FN(FSIIALRCK), |
| 1564 | GPIO_FN(FSIOABCK), |
| 1565 | GPIO_FN(FSIOALRCK), |
| 1566 | GPIO_FN(CLKAUDIOAO), |
| 1567 | GPIO_FN(FSIIBSD), |
| 1568 | GPIO_FN(FSIOBSD), |
| 1569 | GPIO_FN(FSIIBBCK), |
| 1570 | GPIO_FN(FSIIBLRCK), |
| 1571 | GPIO_FN(FSIOBBCK), |
| 1572 | GPIO_FN(FSIOBLRCK), |
| 1573 | GPIO_FN(CLKAUDIOBO), |
| 1574 | GPIO_FN(FSIIASD), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1575 | |
| 1576 | /* AUD */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1577 | GPIO_FN(AUDCK), |
| 1578 | GPIO_FN(AUDSYNC), |
| 1579 | GPIO_FN(AUDATA3), |
| 1580 | GPIO_FN(AUDATA2), |
| 1581 | GPIO_FN(AUDATA1), |
| 1582 | GPIO_FN(AUDATA0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1583 | |
| 1584 | /* VIO */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1585 | GPIO_FN(VIO_CKO), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1586 | |
| 1587 | /* VIO0 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1588 | GPIO_FN(VIO0_D15), |
| 1589 | GPIO_FN(VIO0_D14), |
| 1590 | GPIO_FN(VIO0_D13), |
| 1591 | GPIO_FN(VIO0_D12), |
| 1592 | GPIO_FN(VIO0_D11), |
| 1593 | GPIO_FN(VIO0_D10), |
| 1594 | GPIO_FN(VIO0_D9), |
| 1595 | GPIO_FN(VIO0_D8), |
| 1596 | GPIO_FN(VIO0_D7), |
| 1597 | GPIO_FN(VIO0_D6), |
| 1598 | GPIO_FN(VIO0_D5), |
| 1599 | GPIO_FN(VIO0_D4), |
| 1600 | GPIO_FN(VIO0_D3), |
| 1601 | GPIO_FN(VIO0_D2), |
| 1602 | GPIO_FN(VIO0_D1), |
| 1603 | GPIO_FN(VIO0_D0), |
| 1604 | GPIO_FN(VIO0_VD), |
| 1605 | GPIO_FN(VIO0_CLK), |
| 1606 | GPIO_FN(VIO0_FLD), |
| 1607 | GPIO_FN(VIO0_HD), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1608 | |
| 1609 | /* VIO1 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1610 | GPIO_FN(VIO1_D7), |
| 1611 | GPIO_FN(VIO1_D6), |
| 1612 | GPIO_FN(VIO1_D5), |
| 1613 | GPIO_FN(VIO1_D4), |
| 1614 | GPIO_FN(VIO1_D3), |
| 1615 | GPIO_FN(VIO1_D2), |
| 1616 | GPIO_FN(VIO1_D1), |
| 1617 | GPIO_FN(VIO1_D0), |
| 1618 | GPIO_FN(VIO1_FLD), |
| 1619 | GPIO_FN(VIO1_HD), |
| 1620 | GPIO_FN(VIO1_VD), |
| 1621 | GPIO_FN(VIO1_CLK), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1622 | |
| 1623 | /* Eth */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1624 | GPIO_FN(RMII_RXD0), |
| 1625 | GPIO_FN(RMII_RXD1), |
| 1626 | GPIO_FN(RMII_TXD0), |
| 1627 | GPIO_FN(RMII_TXD1), |
| 1628 | GPIO_FN(RMII_REF_CLK), |
| 1629 | GPIO_FN(RMII_TX_EN), |
| 1630 | GPIO_FN(RMII_RX_ER), |
| 1631 | GPIO_FN(RMII_CRS_DV), |
| 1632 | GPIO_FN(LNKSTA), |
| 1633 | GPIO_FN(MDIO), |
| 1634 | GPIO_FN(MDC), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1635 | |
| 1636 | /* System */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1637 | GPIO_FN(PDSTATUS), |
| 1638 | GPIO_FN(STATUS2), |
| 1639 | GPIO_FN(STATUS0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1640 | |
| 1641 | /* VOU */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1642 | GPIO_FN(DV_D15), |
| 1643 | GPIO_FN(DV_D14), |
| 1644 | GPIO_FN(DV_D13), |
| 1645 | GPIO_FN(DV_D12), |
| 1646 | GPIO_FN(DV_D11), |
| 1647 | GPIO_FN(DV_D10), |
| 1648 | GPIO_FN(DV_D9), |
| 1649 | GPIO_FN(DV_D8), |
| 1650 | GPIO_FN(DV_D7), |
| 1651 | GPIO_FN(DV_D6), |
| 1652 | GPIO_FN(DV_D5), |
| 1653 | GPIO_FN(DV_D4), |
| 1654 | GPIO_FN(DV_D3), |
| 1655 | GPIO_FN(DV_D2), |
| 1656 | GPIO_FN(DV_D1), |
| 1657 | GPIO_FN(DV_D0), |
| 1658 | GPIO_FN(DV_CLKI), |
| 1659 | GPIO_FN(DV_CLK), |
| 1660 | GPIO_FN(DV_VSYNC), |
| 1661 | GPIO_FN(DV_HSYNC), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1662 | |
| 1663 | /* MSIOF0 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1664 | GPIO_FN(MSIOF0_RXD), |
| 1665 | GPIO_FN(MSIOF0_TXD), |
| 1666 | GPIO_FN(MSIOF0_MCK), |
| 1667 | GPIO_FN(MSIOF0_TSCK), |
| 1668 | GPIO_FN(MSIOF0_SS1), |
| 1669 | GPIO_FN(MSIOF0_SS2), |
| 1670 | GPIO_FN(MSIOF0_TSYNC), |
| 1671 | GPIO_FN(MSIOF0_RSCK), |
| 1672 | GPIO_FN(MSIOF0_RSYNC), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1673 | |
| 1674 | /* MSIOF1 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1675 | GPIO_FN(MSIOF1_RXD), |
| 1676 | GPIO_FN(MSIOF1_TXD), |
| 1677 | GPIO_FN(MSIOF1_MCK), |
| 1678 | GPIO_FN(MSIOF1_TSCK), |
| 1679 | GPIO_FN(MSIOF1_SS1), |
| 1680 | GPIO_FN(MSIOF1_SS2), |
| 1681 | GPIO_FN(MSIOF1_TSYNC), |
| 1682 | GPIO_FN(MSIOF1_RSCK), |
| 1683 | GPIO_FN(MSIOF1_RSYNC), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1684 | |
| 1685 | /* DMAC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1686 | GPIO_FN(DMAC_DACK0), |
| 1687 | GPIO_FN(DMAC_DREQ0), |
| 1688 | GPIO_FN(DMAC_DACK1), |
| 1689 | GPIO_FN(DMAC_DREQ1), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1690 | |
| 1691 | /* SDHI0 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1692 | GPIO_FN(SDHI0CD), |
| 1693 | GPIO_FN(SDHI0WP), |
| 1694 | GPIO_FN(SDHI0CMD), |
| 1695 | GPIO_FN(SDHI0CLK), |
| 1696 | GPIO_FN(SDHI0D3), |
| 1697 | GPIO_FN(SDHI0D2), |
| 1698 | GPIO_FN(SDHI0D1), |
| 1699 | GPIO_FN(SDHI0D0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1700 | |
| 1701 | /* SDHI1 */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1702 | GPIO_FN(SDHI1CD), |
| 1703 | GPIO_FN(SDHI1WP), |
| 1704 | GPIO_FN(SDHI1CMD), |
| 1705 | GPIO_FN(SDHI1CLK), |
| 1706 | GPIO_FN(SDHI1D3), |
| 1707 | GPIO_FN(SDHI1D2), |
| 1708 | GPIO_FN(SDHI1D1), |
| 1709 | GPIO_FN(SDHI1D0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1710 | |
| 1711 | /* MMC */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1712 | GPIO_FN(MMC_D7), |
| 1713 | GPIO_FN(MMC_D6), |
| 1714 | GPIO_FN(MMC_D5), |
| 1715 | GPIO_FN(MMC_D4), |
| 1716 | GPIO_FN(MMC_D3), |
| 1717 | GPIO_FN(MMC_D2), |
| 1718 | GPIO_FN(MMC_D1), |
| 1719 | GPIO_FN(MMC_D0), |
| 1720 | GPIO_FN(MMC_CLK), |
| 1721 | GPIO_FN(MMC_CMD), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1722 | |
| 1723 | /* IrDA */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1724 | GPIO_FN(IRDA_OUT), |
| 1725 | GPIO_FN(IRDA_IN), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1726 | |
| 1727 | /* TSIF */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1728 | GPIO_FN(TSIF_TS0_SDAT), |
| 1729 | GPIO_FN(TSIF_TS0_SCK), |
| 1730 | GPIO_FN(TSIF_TS0_SDEN), |
| 1731 | GPIO_FN(TSIF_TS0_SPSYNC), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1732 | |
| 1733 | /* IRQ */ |
Laurent Pinchart | 35ad427 | 2012-11-28 22:05:49 +0100 | [diff] [blame] | 1734 | GPIO_FN(INTC_IRQ7), |
| 1735 | GPIO_FN(INTC_IRQ6), |
| 1736 | GPIO_FN(INTC_IRQ5), |
| 1737 | GPIO_FN(INTC_IRQ4), |
| 1738 | GPIO_FN(INTC_IRQ3), |
| 1739 | GPIO_FN(INTC_IRQ2), |
| 1740 | GPIO_FN(INTC_IRQ1), |
| 1741 | GPIO_FN(INTC_IRQ0), |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1742 | }; |
| 1743 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 1744 | static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1745 | { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1746 | PTA7_FN, PTA7_OUT, 0, PTA7_IN, |
| 1747 | PTA6_FN, PTA6_OUT, 0, PTA6_IN, |
| 1748 | PTA5_FN, PTA5_OUT, 0, PTA5_IN, |
| 1749 | PTA4_FN, PTA4_OUT, 0, PTA4_IN, |
| 1750 | PTA3_FN, PTA3_OUT, 0, PTA3_IN, |
| 1751 | PTA2_FN, PTA2_OUT, 0, PTA2_IN, |
| 1752 | PTA1_FN, PTA1_OUT, 0, PTA1_IN, |
| 1753 | PTA0_FN, PTA0_OUT, 0, PTA0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1754 | }, |
| 1755 | { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1756 | PTB7_FN, PTB7_OUT, 0, PTB7_IN, |
| 1757 | PTB6_FN, PTB6_OUT, 0, PTB6_IN, |
| 1758 | PTB5_FN, PTB5_OUT, 0, PTB5_IN, |
| 1759 | PTB4_FN, PTB4_OUT, 0, PTB4_IN, |
| 1760 | PTB3_FN, PTB3_OUT, 0, PTB3_IN, |
| 1761 | PTB2_FN, PTB2_OUT, 0, PTB2_IN, |
| 1762 | PTB1_FN, PTB1_OUT, 0, PTB1_IN, |
| 1763 | PTB0_FN, PTB0_OUT, 0, PTB0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1764 | }, |
| 1765 | { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1766 | PTC7_FN, PTC7_OUT, 0, PTC7_IN, |
| 1767 | PTC6_FN, PTC6_OUT, 0, PTC6_IN, |
| 1768 | PTC5_FN, PTC5_OUT, 0, PTC5_IN, |
| 1769 | PTC4_FN, PTC4_OUT, 0, PTC4_IN, |
| 1770 | PTC3_FN, PTC3_OUT, 0, PTC3_IN, |
| 1771 | PTC2_FN, PTC2_OUT, 0, PTC2_IN, |
| 1772 | PTC1_FN, PTC1_OUT, 0, PTC1_IN, |
| 1773 | PTC0_FN, PTC0_OUT, 0, PTC0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1774 | }, |
| 1775 | { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1776 | PTD7_FN, PTD7_OUT, 0, PTD7_IN, |
| 1777 | PTD6_FN, PTD6_OUT, 0, PTD6_IN, |
| 1778 | PTD5_FN, PTD5_OUT, 0, PTD5_IN, |
| 1779 | PTD4_FN, PTD4_OUT, 0, PTD4_IN, |
| 1780 | PTD3_FN, PTD3_OUT, 0, PTD3_IN, |
| 1781 | PTD2_FN, PTD2_OUT, 0, PTD2_IN, |
| 1782 | PTD1_FN, PTD1_OUT, 0, PTD1_IN, |
| 1783 | PTD0_FN, PTD0_OUT, 0, PTD0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1784 | }, |
| 1785 | { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1786 | PTE7_FN, PTE7_OUT, 0, PTE7_IN, |
| 1787 | PTE6_FN, PTE6_OUT, 0, PTE6_IN, |
| 1788 | PTE5_FN, PTE5_OUT, 0, PTE5_IN, |
| 1789 | PTE4_FN, PTE4_OUT, 0, PTE4_IN, |
| 1790 | PTE3_FN, PTE3_OUT, 0, PTE3_IN, |
| 1791 | PTE2_FN, PTE2_OUT, 0, PTE2_IN, |
| 1792 | PTE1_FN, PTE1_OUT, 0, PTE1_IN, |
| 1793 | PTE0_FN, PTE0_OUT, 0, PTE0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1794 | }, |
| 1795 | { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1796 | PTF7_FN, PTF7_OUT, 0, PTF7_IN, |
| 1797 | PTF6_FN, PTF6_OUT, 0, PTF6_IN, |
| 1798 | PTF5_FN, PTF5_OUT, 0, PTF5_IN, |
| 1799 | PTF4_FN, PTF4_OUT, 0, PTF4_IN, |
| 1800 | PTF3_FN, PTF3_OUT, 0, PTF3_IN, |
| 1801 | PTF2_FN, PTF2_OUT, 0, PTF2_IN, |
| 1802 | PTF1_FN, PTF1_OUT, 0, PTF1_IN, |
| 1803 | PTF0_FN, PTF0_OUT, 0, PTF0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1804 | }, |
| 1805 | { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) { |
| 1806 | 0, 0, 0, 0, |
| 1807 | 0, 0, 0, 0, |
| 1808 | PTG5_FN, PTG5_OUT, 0, 0, |
| 1809 | PTG4_FN, PTG4_OUT, 0, 0, |
| 1810 | PTG3_FN, PTG3_OUT, 0, 0, |
| 1811 | PTG2_FN, PTG2_OUT, 0, 0, |
| 1812 | PTG1_FN, PTG1_OUT, 0, 0, |
| 1813 | PTG0_FN, PTG0_OUT, 0, 0 } |
| 1814 | }, |
| 1815 | { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1816 | PTH7_FN, PTH7_OUT, 0, PTH7_IN, |
| 1817 | PTH6_FN, PTH6_OUT, 0, PTH6_IN, |
| 1818 | PTH5_FN, PTH5_OUT, 0, PTH5_IN, |
| 1819 | PTH4_FN, PTH4_OUT, 0, PTH4_IN, |
| 1820 | PTH3_FN, PTH3_OUT, 0, PTH3_IN, |
| 1821 | PTH2_FN, PTH2_OUT, 0, PTH2_IN, |
| 1822 | PTH1_FN, PTH1_OUT, 0, PTH1_IN, |
| 1823 | PTH0_FN, PTH0_OUT, 0, PTH0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1824 | }, |
| 1825 | { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) { |
| 1826 | PTJ7_FN, PTJ7_OUT, 0, 0, |
| 1827 | PTJ6_FN, PTJ6_OUT, 0, 0, |
| 1828 | PTJ5_FN, PTJ5_OUT, 0, 0, |
| 1829 | 0, 0, 0, 0, |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1830 | PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN, |
| 1831 | PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN, |
| 1832 | PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN, |
| 1833 | PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1834 | }, |
| 1835 | { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1836 | PTK7_FN, PTK7_OUT, 0, PTK7_IN, |
| 1837 | PTK6_FN, PTK6_OUT, 0, PTK6_IN, |
| 1838 | PTK5_FN, PTK5_OUT, 0, PTK5_IN, |
| 1839 | PTK4_FN, PTK4_OUT, 0, PTK4_IN, |
| 1840 | PTK3_FN, PTK3_OUT, 0, PTK3_IN, |
| 1841 | PTK2_FN, PTK2_OUT, 0, PTK2_IN, |
| 1842 | PTK1_FN, PTK1_OUT, 0, PTK1_IN, |
| 1843 | PTK0_FN, PTK0_OUT, 0, PTK0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1844 | }, |
| 1845 | { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1846 | PTL7_FN, PTL7_OUT, 0, PTL7_IN, |
| 1847 | PTL6_FN, PTL6_OUT, 0, PTL6_IN, |
| 1848 | PTL5_FN, PTL5_OUT, 0, PTL5_IN, |
| 1849 | PTL4_FN, PTL4_OUT, 0, PTL4_IN, |
| 1850 | PTL3_FN, PTL3_OUT, 0, PTL3_IN, |
| 1851 | PTL2_FN, PTL2_OUT, 0, PTL2_IN, |
| 1852 | PTL1_FN, PTL1_OUT, 0, PTL1_IN, |
| 1853 | PTL0_FN, PTL0_OUT, 0, PTL0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1854 | }, |
| 1855 | { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1856 | PTM7_FN, PTM7_OUT, 0, PTM7_IN, |
| 1857 | PTM6_FN, PTM6_OUT, 0, PTM6_IN, |
| 1858 | PTM5_FN, PTM5_OUT, 0, PTM5_IN, |
| 1859 | PTM4_FN, PTM4_OUT, 0, PTM4_IN, |
| 1860 | PTM3_FN, PTM3_OUT, 0, PTM3_IN, |
| 1861 | PTM2_FN, PTM2_OUT, 0, PTM2_IN, |
| 1862 | PTM1_FN, PTM1_OUT, 0, PTM1_IN, |
| 1863 | PTM0_FN, PTM0_OUT, 0, PTM0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1864 | }, |
| 1865 | { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1866 | PTN7_FN, PTN7_OUT, 0, PTN7_IN, |
| 1867 | PTN6_FN, PTN6_OUT, 0, PTN6_IN, |
| 1868 | PTN5_FN, PTN5_OUT, 0, PTN5_IN, |
| 1869 | PTN4_FN, PTN4_OUT, 0, PTN4_IN, |
| 1870 | PTN3_FN, PTN3_OUT, 0, PTN3_IN, |
| 1871 | PTN2_FN, PTN2_OUT, 0, PTN2_IN, |
| 1872 | PTN1_FN, PTN1_OUT, 0, PTN1_IN, |
| 1873 | PTN0_FN, PTN0_OUT, 0, PTN0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1874 | }, |
| 1875 | { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1876 | PTQ7_FN, PTQ7_OUT, 0, PTQ7_IN, |
| 1877 | PTQ6_FN, PTQ6_OUT, 0, PTQ6_IN, |
| 1878 | PTQ5_FN, PTQ5_OUT, 0, PTQ5_IN, |
| 1879 | PTQ4_FN, PTQ4_OUT, 0, PTQ4_IN, |
| 1880 | PTQ3_FN, PTQ3_OUT, 0, PTQ3_IN, |
| 1881 | PTQ2_FN, PTQ2_OUT, 0, PTQ2_IN, |
| 1882 | PTQ1_FN, PTQ1_OUT, 0, PTQ1_IN, |
| 1883 | PTQ0_FN, PTQ0_OUT, 0, PTQ0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1884 | }, |
| 1885 | { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1886 | PTR7_FN, PTR7_OUT, 0, PTR7_IN, |
| 1887 | PTR6_FN, PTR6_OUT, 0, PTR6_IN, |
| 1888 | PTR5_FN, PTR5_OUT, 0, PTR5_IN, |
| 1889 | PTR4_FN, PTR4_OUT, 0, PTR4_IN, |
| 1890 | PTR3_FN, 0, 0, PTR3_IN, |
| 1891 | PTR2_FN, 0, 0, PTR2_IN, |
| 1892 | PTR1_FN, PTR1_OUT, 0, PTR1_IN, |
| 1893 | PTR0_FN, PTR0_OUT, 0, PTR0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1894 | }, |
| 1895 | { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) { |
| 1896 | 0, 0, 0, 0, |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1897 | PTS6_FN, PTS6_OUT, 0, PTS6_IN, |
| 1898 | PTS5_FN, PTS5_OUT, 0, PTS5_IN, |
| 1899 | PTS4_FN, PTS4_OUT, 0, PTS4_IN, |
| 1900 | PTS3_FN, PTS3_OUT, 0, PTS3_IN, |
| 1901 | PTS2_FN, PTS2_OUT, 0, PTS2_IN, |
| 1902 | PTS1_FN, PTS1_OUT, 0, PTS1_IN, |
| 1903 | PTS0_FN, PTS0_OUT, 0, PTS0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1904 | }, |
| 1905 | { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1906 | PTT7_FN, PTT7_OUT, 0, PTT7_IN, |
| 1907 | PTT6_FN, PTT6_OUT, 0, PTT6_IN, |
| 1908 | PTT5_FN, PTT5_OUT, 0, PTT5_IN, |
| 1909 | PTT4_FN, PTT4_OUT, 0, PTT4_IN, |
| 1910 | PTT3_FN, PTT3_OUT, 0, PTT3_IN, |
| 1911 | PTT2_FN, PTT2_OUT, 0, PTT2_IN, |
| 1912 | PTT1_FN, PTT1_OUT, 0, PTT1_IN, |
| 1913 | PTT0_FN, PTT0_OUT, 0, PTT0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1914 | }, |
| 1915 | { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1916 | PTU7_FN, PTU7_OUT, 0, PTU7_IN, |
| 1917 | PTU6_FN, PTU6_OUT, 0, PTU6_IN, |
| 1918 | PTU5_FN, PTU5_OUT, 0, PTU5_IN, |
| 1919 | PTU4_FN, PTU4_OUT, 0, PTU4_IN, |
| 1920 | PTU3_FN, PTU3_OUT, 0, PTU3_IN, |
| 1921 | PTU2_FN, PTU2_OUT, 0, PTU2_IN, |
| 1922 | PTU1_FN, PTU1_OUT, 0, PTU1_IN, |
| 1923 | PTU0_FN, PTU0_OUT, 0, PTU0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1924 | }, |
| 1925 | { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1926 | PTV7_FN, PTV7_OUT, 0, PTV7_IN, |
| 1927 | PTV6_FN, PTV6_OUT, 0, PTV6_IN, |
| 1928 | PTV5_FN, PTV5_OUT, 0, PTV5_IN, |
| 1929 | PTV4_FN, PTV4_OUT, 0, PTV4_IN, |
| 1930 | PTV3_FN, PTV3_OUT, 0, PTV3_IN, |
| 1931 | PTV2_FN, PTV2_OUT, 0, PTV2_IN, |
| 1932 | PTV1_FN, PTV1_OUT, 0, PTV1_IN, |
| 1933 | PTV0_FN, PTV0_OUT, 0, PTV0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1934 | }, |
| 1935 | { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1936 | PTW7_FN, PTW7_OUT, 0, PTW7_IN, |
| 1937 | PTW6_FN, PTW6_OUT, 0, PTW6_IN, |
| 1938 | PTW5_FN, PTW5_OUT, 0, PTW5_IN, |
| 1939 | PTW4_FN, PTW4_OUT, 0, PTW4_IN, |
| 1940 | PTW3_FN, PTW3_OUT, 0, PTW3_IN, |
| 1941 | PTW2_FN, PTW2_OUT, 0, PTW2_IN, |
| 1942 | PTW1_FN, PTW1_OUT, 0, PTW1_IN, |
| 1943 | PTW0_FN, PTW0_OUT, 0, PTW0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1944 | }, |
| 1945 | { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1946 | PTX7_FN, PTX7_OUT, 0, PTX7_IN, |
| 1947 | PTX6_FN, PTX6_OUT, 0, PTX6_IN, |
| 1948 | PTX5_FN, PTX5_OUT, 0, PTX5_IN, |
| 1949 | PTX4_FN, PTX4_OUT, 0, PTX4_IN, |
| 1950 | PTX3_FN, PTX3_OUT, 0, PTX3_IN, |
| 1951 | PTX2_FN, PTX2_OUT, 0, PTX2_IN, |
| 1952 | PTX1_FN, PTX1_OUT, 0, PTX1_IN, |
| 1953 | PTX0_FN, PTX0_OUT, 0, PTX0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1954 | }, |
| 1955 | { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1956 | PTY7_FN, PTY7_OUT, 0, PTY7_IN, |
| 1957 | PTY6_FN, PTY6_OUT, 0, PTY6_IN, |
| 1958 | PTY5_FN, PTY5_OUT, 0, PTY5_IN, |
| 1959 | PTY4_FN, PTY4_OUT, 0, PTY4_IN, |
| 1960 | PTY3_FN, PTY3_OUT, 0, PTY3_IN, |
| 1961 | PTY2_FN, PTY2_OUT, 0, PTY2_IN, |
| 1962 | PTY1_FN, PTY1_OUT, 0, PTY1_IN, |
| 1963 | PTY0_FN, PTY0_OUT, 0, PTY0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1964 | }, |
| 1965 | { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) { |
Laurent Pinchart | c536151 | 2013-07-16 01:54:13 +0200 | [diff] [blame] | 1966 | PTZ7_FN, PTZ7_OUT, 0, PTZ7_IN, |
| 1967 | PTZ6_FN, PTZ6_OUT, 0, PTZ6_IN, |
| 1968 | PTZ5_FN, PTZ5_OUT, 0, PTZ5_IN, |
| 1969 | PTZ4_FN, PTZ4_OUT, 0, PTZ4_IN, |
| 1970 | PTZ3_FN, PTZ3_OUT, 0, PTZ3_IN, |
| 1971 | PTZ2_FN, PTZ2_OUT, 0, PTZ2_IN, |
| 1972 | PTZ1_FN, PTZ1_OUT, 0, PTZ1_IN, |
| 1973 | PTZ0_FN, PTZ0_OUT, 0, PTZ0_IN } |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 1974 | }, |
| 1975 | { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) { |
| 1976 | PSA15_0, PSA15_1, |
| 1977 | PSA14_0, PSA14_1, |
| 1978 | PSA13_0, PSA13_1, |
| 1979 | PSA12_0, PSA12_1, |
| 1980 | 0, 0, |
| 1981 | PSA10_0, PSA10_1, |
| 1982 | PSA9_0, PSA9_1, |
| 1983 | PSA8_0, PSA8_1, |
| 1984 | PSA7_0, PSA7_1, |
| 1985 | PSA6_0, PSA6_1, |
| 1986 | PSA5_0, PSA5_1, |
| 1987 | 0, 0, |
| 1988 | PSA3_0, PSA3_1, |
| 1989 | PSA2_0, PSA2_1, |
| 1990 | PSA1_0, PSA1_1, |
| 1991 | PSA0_0, PSA0_1} |
| 1992 | }, |
| 1993 | { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1) { |
| 1994 | 0, 0, |
| 1995 | PSB14_0, PSB14_1, |
| 1996 | PSB13_0, PSB13_1, |
| 1997 | PSB12_0, PSB12_1, |
| 1998 | PSB11_0, PSB11_1, |
| 1999 | PSB10_0, PSB10_1, |
| 2000 | PSB9_0, PSB9_1, |
| 2001 | PSB8_0, PSB8_1, |
| 2002 | PSB7_0, PSB7_1, |
| 2003 | PSB6_0, PSB6_1, |
| 2004 | PSB5_0, PSB5_1, |
| 2005 | PSB4_0, PSB4_1, |
| 2006 | PSB3_0, PSB3_1, |
| 2007 | PSB2_0, PSB2_1, |
| 2008 | PSB1_0, PSB1_1, |
| 2009 | PSB0_0, PSB0_1} |
| 2010 | }, |
| 2011 | { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1) { |
| 2012 | PSC15_0, PSC15_1, |
| 2013 | PSC14_0, PSC14_1, |
| 2014 | PSC13_0, PSC13_1, |
| 2015 | PSC12_0, PSC12_1, |
| 2016 | PSC11_0, PSC11_1, |
| 2017 | PSC10_0, PSC10_1, |
| 2018 | PSC9_0, PSC9_1, |
| 2019 | PSC8_0, PSC8_1, |
| 2020 | PSC7_0, PSC7_1, |
| 2021 | PSC6_0, PSC6_1, |
| 2022 | PSC5_0, PSC5_1, |
| 2023 | PSC4_0, PSC4_1, |
| 2024 | 0, 0, |
| 2025 | PSC2_0, PSC2_1, |
| 2026 | PSC1_0, PSC1_1, |
| 2027 | PSC0_0, PSC0_1} |
| 2028 | }, |
| 2029 | { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1) { |
| 2030 | PSD15_0, PSD15_1, |
| 2031 | PSD14_0, PSD14_1, |
| 2032 | PSD13_0, PSD13_1, |
| 2033 | PSD12_0, PSD12_1, |
| 2034 | PSD11_0, PSD11_1, |
| 2035 | PSD10_0, PSD10_1, |
| 2036 | PSD9_0, PSD9_1, |
| 2037 | PSD8_0, PSD8_1, |
| 2038 | PSD7_0, PSD7_1, |
| 2039 | PSD6_0, PSD6_1, |
| 2040 | PSD5_0, PSD5_1, |
| 2041 | PSD4_0, PSD4_1, |
| 2042 | PSD3_0, PSD3_1, |
| 2043 | PSD2_0, PSD2_1, |
| 2044 | PSD1_0, PSD1_1, |
| 2045 | PSD0_0, PSD0_1} |
| 2046 | }, |
| 2047 | { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1) { |
| 2048 | PSE15_0, PSE15_1, |
| 2049 | PSE14_0, PSE14_1, |
| 2050 | PSE13_0, PSE13_1, |
| 2051 | PSE12_0, PSE12_1, |
| 2052 | PSE11_0, PSE11_1, |
| 2053 | PSE10_0, PSE10_1, |
| 2054 | PSE9_0, PSE9_1, |
| 2055 | PSE8_0, PSE8_1, |
| 2056 | PSE7_0, PSE7_1, |
| 2057 | PSE6_0, PSE6_1, |
| 2058 | PSE5_0, PSE5_1, |
| 2059 | PSE4_0, PSE4_1, |
| 2060 | PSE3_0, PSE3_1, |
| 2061 | PSE2_0, PSE2_1, |
| 2062 | PSE1_0, PSE1_1, |
| 2063 | PSE0_0, PSE0_1} |
| 2064 | }, |
| 2065 | {} |
| 2066 | }; |
| 2067 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 2068 | static const struct pinmux_data_reg pinmux_data_regs[] = { |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 2069 | { PINMUX_DATA_REG("PADR", 0xa4050120, 8) { |
| 2070 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, |
| 2071 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } |
| 2072 | }, |
| 2073 | { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) { |
| 2074 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, |
| 2075 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA } |
| 2076 | }, |
| 2077 | { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) { |
| 2078 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, |
| 2079 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA } |
| 2080 | }, |
| 2081 | { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) { |
| 2082 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, |
| 2083 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA } |
| 2084 | }, |
| 2085 | { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) { |
| 2086 | PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, |
| 2087 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA } |
| 2088 | }, |
| 2089 | { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) { |
| 2090 | PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA, |
| 2091 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA } |
| 2092 | }, |
| 2093 | { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) { |
| 2094 | 0, 0, PTG5_DATA, PTG4_DATA, |
| 2095 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA } |
| 2096 | }, |
| 2097 | { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) { |
| 2098 | PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA, |
| 2099 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA } |
| 2100 | }, |
| 2101 | { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) { |
| 2102 | PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0, |
| 2103 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA } |
| 2104 | }, |
| 2105 | { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) { |
| 2106 | PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, |
| 2107 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA } |
| 2108 | }, |
| 2109 | { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) { |
| 2110 | PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, |
| 2111 | PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA } |
| 2112 | }, |
| 2113 | { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) { |
| 2114 | PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, |
| 2115 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA } |
| 2116 | }, |
| 2117 | { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) { |
| 2118 | PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, |
| 2119 | PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA } |
| 2120 | }, |
| 2121 | { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) { |
| 2122 | PTQ7_DATA, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, |
| 2123 | PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA } |
| 2124 | }, |
| 2125 | { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) { |
| 2126 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, |
| 2127 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA } |
| 2128 | }, |
| 2129 | { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) { |
| 2130 | 0, PTS6_DATA, PTS5_DATA, PTS4_DATA, |
| 2131 | PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA } |
| 2132 | }, |
| 2133 | { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) { |
| 2134 | PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA, |
| 2135 | PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA } |
| 2136 | }, |
| 2137 | { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) { |
| 2138 | PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, |
| 2139 | PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA } |
| 2140 | }, |
| 2141 | { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) { |
| 2142 | PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA, |
| 2143 | PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA } |
| 2144 | }, |
| 2145 | { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) { |
| 2146 | PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA, |
| 2147 | PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA } |
| 2148 | }, |
| 2149 | { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) { |
| 2150 | PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA, |
| 2151 | PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA } |
| 2152 | }, |
| 2153 | { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) { |
| 2154 | PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA, |
| 2155 | PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA } |
| 2156 | }, |
| 2157 | { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) { |
| 2158 | PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA, |
| 2159 | PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA } |
| 2160 | }, |
| 2161 | { }, |
| 2162 | }; |
| 2163 | |
Laurent Pinchart | cd3c1be | 2013-02-16 18:47:05 +0100 | [diff] [blame] | 2164 | const struct sh_pfc_soc_info sh7724_pinmux_info = { |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 2165 | .name = "sh7724_pfc", |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 2166 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 2167 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 2168 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |
| 2169 | |
Laurent Pinchart | a373ed0 | 2012-11-29 13:24:07 +0100 | [diff] [blame] | 2170 | .pins = pinmux_pins, |
| 2171 | .nr_pins = ARRAY_SIZE(pinmux_pins), |
| 2172 | .func_gpios = pinmux_func_gpios, |
| 2173 | .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), |
Laurent Pinchart | d7a7ca5 | 2012-11-28 17:51:00 +0100 | [diff] [blame] | 2174 | |
Laurent Pinchart | 0ff25ba | 2012-12-15 23:51:35 +0100 | [diff] [blame] | 2175 | .cfg_regs = pinmux_config_regs, |
| 2176 | .data_regs = pinmux_data_regs, |
| 2177 | |
| 2178 | .gpio_data = pinmux_data, |
| 2179 | .gpio_data_size = ARRAY_SIZE(pinmux_data), |
| 2180 | }; |