Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Corenet based SoC DS Setup |
| 3 | * |
| 4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) |
| 5 | * |
Kumar Gala | b9a4334 | 2011-05-09 15:08:57 -0500 | [diff] [blame] | 6 | * Copyright 2009-2011 Freescale Semiconductor Inc. |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/pci.h> |
| 16 | #include <linux/kdev_t.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/interrupt.h> |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 19 | |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 20 | #include <asm/time.h> |
| 21 | #include <asm/machdep.h> |
| 22 | #include <asm/pci-bridge.h> |
Kumar Gala | 6d251dd | 2011-05-19 21:59:23 -0500 | [diff] [blame] | 23 | #include <asm/ppc-pci.h> |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 24 | #include <mm/mmu_decl.h> |
| 25 | #include <asm/prom.h> |
| 26 | #include <asm/udbg.h> |
| 27 | #include <asm/mpic.h> |
Kevin Hao | 512e267 | 2013-09-26 09:42:26 +0800 | [diff] [blame] | 28 | #include <asm/ehv_pic.h> |
Zhao Qiang | 0f5a869 | 2014-03-06 09:39:24 +0800 | [diff] [blame] | 29 | #include <asm/qe_ic.h> |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 30 | |
| 31 | #include <linux/of_platform.h> |
| 32 | #include <sysdev/fsl_soc.h> |
| 33 | #include <sysdev/fsl_pci.h> |
Kyle Moffett | 582d3e0 | 2011-12-02 06:27:58 +0000 | [diff] [blame] | 34 | #include "smp.h" |
Zhao Qiang | 0f5a869 | 2014-03-06 09:39:24 +0800 | [diff] [blame] | 35 | #include "mpc85xx.h" |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 36 | |
Kevin Hao | befe7c1 | 2013-09-26 09:42:27 +0800 | [diff] [blame] | 37 | void __init corenet_gen_pic_init(void) |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 38 | { |
| 39 | struct mpic *mpic; |
Kyle Moffett | e55d7f7 | 2011-12-22 10:19:14 +0000 | [diff] [blame] | 40 | unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU | |
| 41 | MPIC_NO_RESET; |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 42 | |
Zhao Qiang | 0f5a869 | 2014-03-06 09:39:24 +0800 | [diff] [blame] | 43 | struct device_node *np; |
| 44 | |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 45 | if (ppc_md.get_irq == mpic_get_coreint_irq) |
| 46 | flags |= MPIC_ENABLE_COREINT; |
| 47 | |
Kumar Gala | b9faa36 | 2012-01-05 11:09:04 -0600 | [diff] [blame] | 48 | mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC "); |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 49 | BUG_ON(mpic == NULL); |
| 50 | |
| 51 | mpic_init(mpic); |
Zhao Qiang | 0f5a869 | 2014-03-06 09:39:24 +0800 | [diff] [blame] | 52 | |
| 53 | np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); |
| 54 | if (np) { |
| 55 | qe_ic_init(np, 0, qe_ic_cascade_low_mpic, |
| 56 | qe_ic_cascade_high_mpic); |
| 57 | of_node_put(np); |
| 58 | } |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 59 | } |
| 60 | |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 61 | /* |
| 62 | * Setup the architecture |
| 63 | */ |
Kevin Hao | befe7c1 | 2013-09-26 09:42:27 +0800 | [diff] [blame] | 64 | void __init corenet_gen_setup_arch(void) |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 65 | { |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 66 | mpc85xx_smp_init(); |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 67 | |
Jia Hongtao | 905e75c | 2012-08-28 15:44:08 +0800 | [diff] [blame] | 68 | swiotlb_detect_4g(); |
| 69 | |
Valentin Longchamp | 497c8b60 | 2014-04-22 11:30:31 +0200 | [diff] [blame^] | 70 | pr_info("%s board\n", ppc_md.name); |
Zhao Qiang | 0f5a869 | 2014-03-06 09:39:24 +0800 | [diff] [blame] | 71 | |
| 72 | mpc85xx_qe_init(); |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 73 | } |
| 74 | |
Greg Kroah-Hartman | cad5cef | 2012-12-21 14:04:10 -0800 | [diff] [blame] | 75 | static const struct of_device_id of_device_ids[] = { |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 76 | { |
| 77 | .compatible = "simple-bus" |
| 78 | }, |
| 79 | { |
Kai Jiang | 077200c | 2011-11-12 20:02:31 +0800 | [diff] [blame] | 80 | .compatible = "fsl,srio", |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 81 | }, |
Kumar Gala | b9a4334 | 2011-05-09 15:08:57 -0500 | [diff] [blame] | 82 | { |
| 83 | .compatible = "fsl,p4080-pcie", |
| 84 | }, |
| 85 | { |
| 86 | .compatible = "fsl,qoriq-pcie-v2.2", |
| 87 | }, |
Timur Tabi | 4c30c14 | 2012-07-26 10:08:54 -0500 | [diff] [blame] | 88 | { |
| 89 | .compatible = "fsl,qoriq-pcie-v2.3", |
| 90 | }, |
| 91 | { |
| 92 | .compatible = "fsl,qoriq-pcie-v2.4", |
| 93 | }, |
Kumar Gala | b9faa36 | 2012-01-05 11:09:04 -0600 | [diff] [blame] | 94 | { |
| 95 | .compatible = "fsl,qoriq-pcie-v3.0", |
| 96 | }, |
Zhao Qiang | 0f5a869 | 2014-03-06 09:39:24 +0800 | [diff] [blame] | 97 | { |
| 98 | .compatible = "fsl,qe", |
| 99 | }, |
Timur Tabi | 3907ab2 | 2011-05-19 08:54:30 -0500 | [diff] [blame] | 100 | /* The following two are for the Freescale hypervisor */ |
| 101 | { |
| 102 | .name = "hypervisor", |
| 103 | }, |
| 104 | { |
| 105 | .name = "handles", |
| 106 | }, |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 107 | {} |
| 108 | }; |
| 109 | |
Kevin Hao | befe7c1 | 2013-09-26 09:42:27 +0800 | [diff] [blame] | 110 | int __init corenet_gen_publish_devices(void) |
Kumar Gala | ab2f489 | 2009-10-22 16:35:07 -0500 | [diff] [blame] | 111 | { |
| 112 | return of_platform_bus_probe(NULL, of_device_ids, NULL); |
| 113 | } |
Kevin Hao | 512e267 | 2013-09-26 09:42:26 +0800 | [diff] [blame] | 114 | |
| 115 | static const char * const boards[] __initconst = { |
| 116 | "fsl,P2041RDB", |
| 117 | "fsl,P3041DS", |
| 118 | "fsl,P4080DS", |
| 119 | "fsl,P5020DS", |
| 120 | "fsl,P5040DS", |
| 121 | "fsl,T4240QDS", |
| 122 | "fsl,B4860QDS", |
| 123 | "fsl,B4420QDS", |
| 124 | "fsl,B4220QDS", |
Valentin Longchamp | 497c8b60 | 2014-04-22 11:30:31 +0200 | [diff] [blame^] | 125 | "keymile,kmcoge4", |
Kevin Hao | 512e267 | 2013-09-26 09:42:26 +0800 | [diff] [blame] | 126 | NULL |
| 127 | }; |
| 128 | |
| 129 | static const char * const hv_boards[] __initconst = { |
| 130 | "fsl,P2041RDB-hv", |
| 131 | "fsl,P3041DS-hv", |
| 132 | "fsl,P4080DS-hv", |
| 133 | "fsl,P5020DS-hv", |
| 134 | "fsl,P5040DS-hv", |
| 135 | "fsl,T4240QDS-hv", |
| 136 | "fsl,B4860QDS-hv", |
| 137 | "fsl,B4420QDS-hv", |
| 138 | "fsl,B4220QDS-hv", |
| 139 | NULL |
| 140 | }; |
| 141 | |
| 142 | /* |
| 143 | * Called very early, device-tree isn't unflattened |
| 144 | */ |
| 145 | static int __init corenet_generic_probe(void) |
| 146 | { |
| 147 | unsigned long root = of_get_flat_dt_root(); |
| 148 | #ifdef CONFIG_SMP |
| 149 | extern struct smp_ops_t smp_85xx_ops; |
| 150 | #endif |
| 151 | |
| 152 | if (of_flat_dt_match(root, boards)) |
| 153 | return 1; |
| 154 | |
| 155 | /* Check if we're running under the Freescale hypervisor */ |
| 156 | if (of_flat_dt_match(root, hv_boards)) { |
| 157 | ppc_md.init_IRQ = ehv_pic_init; |
| 158 | ppc_md.get_irq = ehv_pic_get_irq; |
| 159 | ppc_md.restart = fsl_hv_restart; |
| 160 | ppc_md.power_off = fsl_hv_halt; |
| 161 | ppc_md.halt = fsl_hv_halt; |
| 162 | #ifdef CONFIG_SMP |
| 163 | /* |
| 164 | * Disable the timebase sync operations because we can't write |
| 165 | * to the timebase registers under the hypervisor. |
| 166 | */ |
| 167 | smp_85xx_ops.give_timebase = NULL; |
| 168 | smp_85xx_ops.take_timebase = NULL; |
| 169 | #endif |
| 170 | return 1; |
| 171 | } |
| 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | |
| 176 | define_machine(corenet_generic) { |
| 177 | .name = "CoreNet Generic", |
| 178 | .probe = corenet_generic_probe, |
Kevin Hao | befe7c1 | 2013-09-26 09:42:27 +0800 | [diff] [blame] | 179 | .setup_arch = corenet_gen_setup_arch, |
| 180 | .init_IRQ = corenet_gen_pic_init, |
Kevin Hao | 512e267 | 2013-09-26 09:42:26 +0800 | [diff] [blame] | 181 | #ifdef CONFIG_PCI |
| 182 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
Wang Dongsheng | 48b1618 | 2014-03-20 11:19:37 +0800 | [diff] [blame] | 183 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, |
Kevin Hao | 512e267 | 2013-09-26 09:42:26 +0800 | [diff] [blame] | 184 | #endif |
| 185 | .get_irq = mpic_get_coreint_irq, |
| 186 | .restart = fsl_rstcr_restart, |
| 187 | .calibrate_decr = generic_calibrate_decr, |
| 188 | .progress = udbg_progress, |
| 189 | #ifdef CONFIG_PPC64 |
| 190 | .power_save = book3e_idle, |
| 191 | #else |
| 192 | .power_save = e500_idle, |
| 193 | #endif |
| 194 | }; |
| 195 | |
Kevin Hao | befe7c1 | 2013-09-26 09:42:27 +0800 | [diff] [blame] | 196 | machine_arch_initcall(corenet_generic, corenet_gen_publish_devices); |
Kevin Hao | 512e267 | 2013-09-26 09:42:26 +0800 | [diff] [blame] | 197 | |
| 198 | #ifdef CONFIG_SWIOTLB |
| 199 | machine_arch_initcall(corenet_generic, swiotlb_setup_bus_notifier); |
| 200 | #endif |