blob: 4beccea0897f1424d4379a20c14f0708920e4999 [file] [log] [blame]
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -07001/*
2 * Handle caching attributes in page tables (PAT)
3 *
4 * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
5 * Suresh B Siddha <suresh.b.siddha@intel.com>
6 *
7 * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen.
8 */
9
10#include <linux/mm.h>
11#include <linux/kernel.h>
12#include <linux/gfp.h>
13#include <linux/fs.h>
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -070014#include <linux/bootmem.h>
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070015
16#include <asm/msr.h>
17#include <asm/tlbflush.h>
18#include <asm/processor.h>
Venki Pallipadi0124cec2008-04-26 11:32:12 -070019#include <asm/page.h>
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070020#include <asm/pgtable.h>
21#include <asm/pat.h>
22#include <asm/e820.h>
23#include <asm/cacheflush.h>
24#include <asm/fcntl.h>
25#include <asm/mtrr.h>
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -070026#include <asm/io.h>
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070027
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020028#ifdef CONFIG_X86_PAT
Andreas Herrmann499f8f82008-06-10 16:06:21 +020029int __read_mostly pat_enabled = 1;
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070030
Avi Kivity31f4d872008-05-14 12:20:32 +030031void __cpuinit pat_disable(char *reason)
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020032{
Andreas Herrmann499f8f82008-06-10 16:06:21 +020033 pat_enabled = 0;
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020034 printk(KERN_INFO "%s\n", reason);
35}
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070036
37static int nopat(char *str)
38{
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020039 pat_disable("PAT support disabled.");
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070040 return 0;
41}
42early_param("nopat", nopat);
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020043#endif
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070044
Venki Pallipadi77b52b42008-05-05 19:09:10 -070045
46static int debug_enable;
47static int __init pat_debug_setup(char *str)
48{
49 debug_enable = 1;
50 return 0;
51}
52__setup("debugpat", pat_debug_setup);
53
54#define dprintk(fmt, arg...) \
55 do { if (debug_enable) printk(KERN_INFO fmt, ##arg); } while (0)
56
57
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020058static u64 __read_mostly boot_pat_state;
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070059
60enum {
61 PAT_UC = 0, /* uncached */
62 PAT_WC = 1, /* Write combining */
63 PAT_WT = 4, /* Write Through */
64 PAT_WP = 5, /* Write Protected */
65 PAT_WB = 6, /* Write Back (default) */
66 PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */
67};
68
Andreas Herrmanncd7a4e92008-06-10 16:05:39 +020069#define PAT(x, y) ((u64)PAT_ ## y << ((x)*8))
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070070
71void pat_init(void)
72{
73 u64 pat;
74
Andreas Herrmann499f8f82008-06-10 16:06:21 +020075 if (!pat_enabled)
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070076 return;
77
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020078 /* Paranoia check. */
Andreas Herrmann97cfab62008-06-10 16:05:18 +020079 if (!cpu_has_pat && boot_pat_state) {
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020080 /*
Andreas Herrmann97cfab62008-06-10 16:05:18 +020081 * If this happens we are on a secondary CPU, but
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020082 * switched to PAT on the boot CPU. We have no way to
83 * undo PAT.
Andreas Herrmann97cfab62008-06-10 16:05:18 +020084 */
85 printk(KERN_ERR "PAT enabled, "
86 "but not supported by secondary CPU\n");
87 BUG();
Thomas Gleixner8d4a4302008-05-08 09:18:43 +020088 }
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -070089
90 /* Set PWT to Write-Combining. All other bits stay the same */
91 /*
92 * PTE encoding used in Linux:
93 * PAT
94 * |PCD
95 * ||PWT
96 * |||
97 * 000 WB _PAGE_CACHE_WB
98 * 001 WC _PAGE_CACHE_WC
99 * 010 UC- _PAGE_CACHE_UC_MINUS
100 * 011 UC _PAGE_CACHE_UC
101 * PAT bit unused
102 */
Andreas Herrmanncd7a4e92008-06-10 16:05:39 +0200103 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
104 PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700105
106 /* Boot CPU check */
Thomas Gleixner8d4a4302008-05-08 09:18:43 +0200107 if (!boot_pat_state)
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700108 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700109
110 wrmsrl(MSR_IA32_CR_PAT, pat);
111 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
112 smp_processor_id(), boot_pat_state, pat);
113}
114
115#undef PAT
116
117static char *cattr_name(unsigned long flags)
118{
119 switch (flags & _PAGE_CACHE_MASK) {
Andreas Herrmanncd7a4e92008-06-10 16:05:39 +0200120 case _PAGE_CACHE_UC: return "uncached";
121 case _PAGE_CACHE_UC_MINUS: return "uncached-minus";
122 case _PAGE_CACHE_WB: return "write-back";
123 case _PAGE_CACHE_WC: return "write-combining";
124 default: return "broken";
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700125 }
126}
127
128/*
129 * The global memtype list keeps track of memory type for specific
130 * physical memory areas. Conflicting memory types in different
131 * mappings can cause CPU cache corruption. To avoid this we keep track.
132 *
133 * The list is sorted based on starting address and can contain multiple
134 * entries for each address (this allows reference counting for overlapping
135 * areas). All the aliases have the same cache attributes of course.
136 * Zero attributes are represented as holes.
137 *
138 * Currently the data structure is a list because the number of mappings
139 * are expected to be relatively small. If this should be a problem
140 * it could be changed to a rbtree or similar.
141 *
142 * memtype_lock protects the whole list.
143 */
144
145struct memtype {
146 u64 start;
147 u64 end;
148 unsigned long type;
149 struct list_head nd;
150};
151
152static LIST_HEAD(memtype_list);
153static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */
154
155/*
156 * Does intersection of PAT memory type and MTRR memory type and returns
157 * the resulting memory type as PAT understands it.
158 * (Type in pat and mtrr will not have same value)
159 * The intersection is based on "Effective Memory Type" tables in IA-32
160 * SDM vol 3a
161 */
162static int pat_x_mtrr_type(u64 start, u64 end, unsigned long prot,
163 unsigned long *ret_prot)
164{
165 unsigned long pat_type;
166 u8 mtrr_type;
167
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700168 pat_type = prot & _PAGE_CACHE_MASK;
169 prot &= (~_PAGE_CACHE_MASK);
170
Venki Pallipadic26421d2008-05-29 12:01:44 -0700171 /*
172 * We return the PAT request directly for types where PAT takes
173 * precedence with respect to MTRR and for UC_MINUS.
174 * Consistency checks with other PAT requests is done later
175 * while going through memtype list.
176 */
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700177 if (pat_type == _PAGE_CACHE_WC) {
178 *ret_prot = prot | _PAGE_CACHE_WC;
Venki Pallipadic26421d2008-05-29 12:01:44 -0700179 return 0;
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700180 } else if (pat_type == _PAGE_CACHE_UC_MINUS) {
181 *ret_prot = prot | _PAGE_CACHE_UC_MINUS;
Venki Pallipadic26421d2008-05-29 12:01:44 -0700182 return 0;
183 } else if (pat_type == _PAGE_CACHE_UC) {
184 *ret_prot = prot | _PAGE_CACHE_UC;
185 return 0;
186 }
187
188 /*
189 * Look for MTRR hint to get the effective type in case where PAT
190 * request is for WB.
191 */
192 mtrr_type = mtrr_type_lookup(start, end);
193
194 if (mtrr_type == MTRR_TYPE_UNCACHABLE) {
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700195 *ret_prot = prot | _PAGE_CACHE_UC;
196 } else if (mtrr_type == MTRR_TYPE_WRCOMB) {
197 *ret_prot = prot | _PAGE_CACHE_WC;
198 } else {
199 *ret_prot = prot | _PAGE_CACHE_WB;
200 }
201
202 return 0;
203}
204
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700205/*
206 * req_type typically has one of the:
207 * - _PAGE_CACHE_WB
208 * - _PAGE_CACHE_WC
209 * - _PAGE_CACHE_UC_MINUS
210 * - _PAGE_CACHE_UC
211 *
212 * req_type will have a special case value '-1', when requester want to inherit
213 * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS.
214 *
215 * If ret_type is NULL, function will return an error if it cannot reserve the
216 * region with req_type. If ret_type is non-null, function will return
217 * available type in ret_type in case of no error. In case of any error
218 * it will return a negative return value.
219 */
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700220int reserve_memtype(u64 start, u64 end, unsigned long req_type,
221 unsigned long *ret_type)
222{
223 struct memtype *new_entry = NULL;
224 struct memtype *parse;
225 unsigned long actual_type;
226 int err = 0;
227
Andreas Herrmann499f8f82008-06-10 16:06:21 +0200228 /* Only track when pat_enabled */
229 if (!pat_enabled) {
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700230 /* This is identical to page table setting without PAT */
231 if (ret_type) {
232 if (req_type == -1) {
233 *ret_type = _PAGE_CACHE_WB;
234 } else {
235 *ret_type = req_type;
236 }
237 }
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700238 return 0;
239 }
240
241 /* Low ISA region is always mapped WB in page table. No need to track */
242 if (start >= ISA_START_ADDRESS && (end - 1) <= ISA_END_ADDRESS) {
243 if (ret_type)
244 *ret_type = _PAGE_CACHE_WB;
245
246 return 0;
247 }
248
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700249 if (req_type == -1) {
250 /*
Venki Pallipadic26421d2008-05-29 12:01:44 -0700251 * Call mtrr_lookup to get the type hint. This is an
252 * optimization for /dev/mem mmap'ers into WB memory (BIOS
253 * tools and ACPI tools). Use WB request for WB memory and use
254 * UC_MINUS otherwise.
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700255 */
256 u8 mtrr_type = mtrr_type_lookup(start, end);
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700257
258 if (mtrr_type == MTRR_TYPE_WRBACK) {
259 req_type = _PAGE_CACHE_WB;
260 actual_type = _PAGE_CACHE_WB;
261 } else {
262 req_type = _PAGE_CACHE_UC_MINUS;
263 actual_type = _PAGE_CACHE_UC_MINUS;
264 }
265 } else {
266 req_type &= _PAGE_CACHE_MASK;
267 err = pat_x_mtrr_type(start, end, req_type, &actual_type);
268 }
269
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700270 if (err) {
271 if (ret_type)
272 *ret_type = actual_type;
273
274 return -EINVAL;
275 }
276
277 new_entry = kmalloc(sizeof(struct memtype), GFP_KERNEL);
278 if (!new_entry)
279 return -ENOMEM;
280
281 new_entry->start = start;
282 new_entry->end = end;
283 new_entry->type = actual_type;
284
285 if (ret_type)
286 *ret_type = actual_type;
287
288 spin_lock(&memtype_lock);
289
290 /* Search for existing mapping that overlaps the current range */
291 list_for_each_entry(parse, &memtype_list, nd) {
292 struct memtype *saved_ptr;
293
294 if (parse->start >= end) {
Venki Pallipadi77b52b42008-05-05 19:09:10 -0700295 dprintk("New Entry\n");
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700296 list_add(&new_entry->nd, parse->nd.prev);
297 new_entry = NULL;
298 break;
299 }
300
301 if (start <= parse->start && end >= parse->start) {
302 if (actual_type != parse->type && ret_type) {
303 actual_type = parse->type;
304 *ret_type = actual_type;
305 new_entry->type = actual_type;
306 }
307
308 if (actual_type != parse->type) {
309 printk(
310 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
311 current->comm, current->pid,
312 start, end,
313 cattr_name(actual_type),
314 cattr_name(parse->type));
315 err = -EBUSY;
316 break;
317 }
318
319 saved_ptr = parse;
320 /*
321 * Check to see whether the request overlaps more
322 * than one entry in the list
323 */
324 list_for_each_entry_continue(parse, &memtype_list, nd) {
325 if (end <= parse->start) {
326 break;
327 }
328
329 if (actual_type != parse->type) {
330 printk(
331 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
332 current->comm, current->pid,
333 start, end,
334 cattr_name(actual_type),
335 cattr_name(parse->type));
336 err = -EBUSY;
337 break;
338 }
339 }
340
341 if (err) {
342 break;
343 }
344
Venki Pallipadi77b52b42008-05-05 19:09:10 -0700345 dprintk("Overlap at 0x%Lx-0x%Lx\n",
venkatesh.pallipadi@intel.com6997ab42008-03-18 17:00:25 -0700346 saved_ptr->start, saved_ptr->end);
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700347 /* No conflict. Go ahead and add this new entry */
348 list_add(&new_entry->nd, saved_ptr->nd.prev);
349 new_entry = NULL;
350 break;
351 }
352
353 if (start < parse->end) {
354 if (actual_type != parse->type && ret_type) {
355 actual_type = parse->type;
356 *ret_type = actual_type;
357 new_entry->type = actual_type;
358 }
359
360 if (actual_type != parse->type) {
361 printk(
362 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
363 current->comm, current->pid,
364 start, end,
365 cattr_name(actual_type),
366 cattr_name(parse->type));
367 err = -EBUSY;
368 break;
369 }
370
371 saved_ptr = parse;
372 /*
373 * Check to see whether the request overlaps more
374 * than one entry in the list
375 */
376 list_for_each_entry_continue(parse, &memtype_list, nd) {
377 if (end <= parse->start) {
378 break;
379 }
380
381 if (actual_type != parse->type) {
382 printk(
383 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
384 current->comm, current->pid,
385 start, end,
386 cattr_name(actual_type),
387 cattr_name(parse->type));
388 err = -EBUSY;
389 break;
390 }
391 }
392
393 if (err) {
394 break;
395 }
396
Venki Pallipadi77b52b42008-05-05 19:09:10 -0700397 dprintk("Overlap at 0x%Lx-0x%Lx\n",
Linus Torvalds86cf02f2008-04-27 11:59:30 -0700398 saved_ptr->start, saved_ptr->end);
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700399 /* No conflict. Go ahead and add this new entry */
400 list_add(&new_entry->nd, &saved_ptr->nd);
401 new_entry = NULL;
402 break;
403 }
404 }
405
406 if (err) {
Ingo Molnar28eb559b2008-04-03 10:14:33 +0200407 printk(KERN_INFO
venkatesh.pallipadi@intel.com6997ab42008-03-18 17:00:25 -0700408 "reserve_memtype failed 0x%Lx-0x%Lx, track %s, req %s\n",
409 start, end, cattr_name(new_entry->type),
410 cattr_name(req_type));
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700411 kfree(new_entry);
412 spin_unlock(&memtype_lock);
413 return err;
414 }
415
416 if (new_entry) {
417 /* No conflict. Not yet added to the list. Add to the tail */
418 list_add_tail(&new_entry->nd, &memtype_list);
Venki Pallipadi77b52b42008-05-05 19:09:10 -0700419 dprintk("New Entry\n");
Ingo Molnar28eb559b2008-04-03 10:14:33 +0200420 }
venkatesh.pallipadi@intel.com6997ab42008-03-18 17:00:25 -0700421
422 if (ret_type) {
Venki Pallipadi77b52b42008-05-05 19:09:10 -0700423 dprintk(
venkatesh.pallipadi@intel.com6997ab42008-03-18 17:00:25 -0700424 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",
425 start, end, cattr_name(actual_type),
426 cattr_name(req_type), cattr_name(*ret_type));
427 } else {
Venki Pallipadi77b52b42008-05-05 19:09:10 -0700428 dprintk(
venkatesh.pallipadi@intel.com6997ab42008-03-18 17:00:25 -0700429 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s\n",
430 start, end, cattr_name(actual_type),
431 cattr_name(req_type));
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700432 }
433
434 spin_unlock(&memtype_lock);
435 return err;
436}
437
438int free_memtype(u64 start, u64 end)
439{
440 struct memtype *ml;
441 int err = -EINVAL;
442
Andreas Herrmann499f8f82008-06-10 16:06:21 +0200443 /* Only track when pat_enabled */
444 if (!pat_enabled) {
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700445 return 0;
446 }
447
448 /* Low ISA region is always mapped WB. No need to track */
449 if (start >= ISA_START_ADDRESS && end <= ISA_END_ADDRESS) {
450 return 0;
451 }
452
453 spin_lock(&memtype_lock);
454 list_for_each_entry(ml, &memtype_list, nd) {
455 if (ml->start == start && ml->end == end) {
456 list_del(&ml->nd);
457 kfree(ml);
458 err = 0;
459 break;
460 }
461 }
462 spin_unlock(&memtype_lock);
463
464 if (err) {
Ingo Molnar28eb559b2008-04-03 10:14:33 +0200465 printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n",
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700466 current->comm, current->pid, start, end);
467 }
venkatesh.pallipadi@intel.com6997ab42008-03-18 17:00:25 -0700468
Venki Pallipadi77b52b42008-05-05 19:09:10 -0700469 dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end);
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700470 return err;
471}
472
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700473
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700474/*
475 * /dev/mem mmap interface. The memtype used for mapping varies:
476 * - Use UC for mappings with O_SYNC flag
477 * - Without O_SYNC flag, if there is any conflict in reserve_memtype,
478 * inherit the memtype from existing mapping.
479 * - Else use UC_MINUS memtype (for backward compatibility with existing
480 * X drivers.
481 */
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700482pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
483 unsigned long size, pgprot_t vma_prot)
484{
485 return vma_prot;
486}
487
Venki Pallipadi0124cec2008-04-26 11:32:12 -0700488#ifdef CONFIG_NONPROMISC_DEVMEM
489/* This check is done in drivers/char/mem.c in case of NONPROMISC_DEVMEM*/
490static inline int range_is_allowed(unsigned long pfn, unsigned long size)
491{
492 return 1;
493}
494#else
495static inline int range_is_allowed(unsigned long pfn, unsigned long size)
496{
497 u64 from = ((u64)pfn) << PAGE_SHIFT;
498 u64 to = from + size;
499 u64 cursor = from;
500
501 while (cursor < to) {
502 if (!devmem_is_allowed(pfn)) {
503 printk(KERN_INFO
504 "Program %s tried to access /dev/mem between %Lx->%Lx.\n",
505 current->comm, from, to);
506 return 0;
507 }
508 cursor += PAGE_SIZE;
509 pfn++;
510 }
511 return 1;
512}
513#endif /* CONFIG_NONPROMISC_DEVMEM */
514
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700515int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
516 unsigned long size, pgprot_t *vma_prot)
517{
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700518 u64 offset = ((u64) pfn) << PAGE_SHIFT;
519 unsigned long flags = _PAGE_CACHE_UC_MINUS;
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700520 int retval;
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700521
Venki Pallipadi0124cec2008-04-26 11:32:12 -0700522 if (!range_is_allowed(pfn, size))
523 return 0;
524
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700525 if (file->f_flags & O_SYNC) {
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700526 flags = _PAGE_CACHE_UC;
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700527 }
528
529#ifdef CONFIG_X86_32
530 /*
531 * On the PPro and successors, the MTRRs are used to set
532 * memory types for physical addresses outside main memory,
533 * so blindly setting UC or PWT on those pages is wrong.
534 * For Pentiums and earlier, the surround logic should disable
535 * caching for the high addresses through the KEN pin, but
536 * we maintain the tradition of paranoia in this code.
537 */
Andreas Herrmann499f8f82008-06-10 16:06:21 +0200538 if (!pat_enabled &&
Andreas Herrmanncd7a4e92008-06-10 16:05:39 +0200539 !(boot_cpu_has(X86_FEATURE_MTRR) ||
540 boot_cpu_has(X86_FEATURE_K6_MTRR) ||
541 boot_cpu_has(X86_FEATURE_CYRIX_ARR) ||
542 boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) &&
543 (pfn << PAGE_SHIFT) >= __pa(high_memory)) {
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700544 flags = _PAGE_CACHE_UC;
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700545 }
546#endif
547
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700548 /*
549 * With O_SYNC, we can only take UC mapping. Fail if we cannot.
550 * Without O_SYNC, we want to get
551 * - WB for WB-able memory and no other conflicting mappings
552 * - UC_MINUS for non-WB-able memory with no other conflicting mappings
553 * - Inherit from confliting mappings otherwise
554 */
555 if (flags != _PAGE_CACHE_UC_MINUS) {
556 retval = reserve_memtype(offset, offset + size, flags, NULL);
557 } else {
Ingo Molnarf022bfd2008-03-21 15:42:28 +0100558 retval = reserve_memtype(offset, offset + size, -1, &flags);
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700559 }
560
561 if (retval < 0)
562 return 0;
563
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700564 if (pfn <= max_pfn_mapped &&
Andreas Herrmanncd7a4e92008-06-10 16:05:39 +0200565 ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) {
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700566 free_memtype(offset, offset + size);
Ingo Molnar28eb559b2008-04-03 10:14:33 +0200567 printk(KERN_INFO
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700568 "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n",
569 current->comm, current->pid,
570 cattr_name(flags),
Pranith Kumarafc85342008-05-12 14:52:26 +0530571 offset, (unsigned long long)(offset + size));
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700572 return 0;
573 }
574
575 *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) |
576 flags);
venkatesh.pallipadi@intel.comf0970c12008-03-18 17:00:20 -0700577 return 1;
578}
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700579
580void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
581{
582 u64 addr = (u64)pfn << PAGE_SHIFT;
583 unsigned long flags;
584 unsigned long want_flags = (pgprot_val(vma_prot) & _PAGE_CACHE_MASK);
585
586 reserve_memtype(addr, addr + size, want_flags, &flags);
587 if (flags != want_flags) {
Ingo Molnar28eb559b2008-04-03 10:14:33 +0200588 printk(KERN_INFO
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700589 "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n",
590 current->comm, current->pid,
591 cattr_name(want_flags),
Pranith Kumarafc85342008-05-12 14:52:26 +0530592 addr, (unsigned long long)(addr + size),
venkatesh.pallipadi@intel.come7f260a2008-03-18 17:00:21 -0700593 cattr_name(flags));
594 }
595}
596
597void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
598{
599 u64 addr = (u64)pfn << PAGE_SHIFT;
600
601 free_memtype(addr, addr + size);
602}